ppc e500mc support
[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c
1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include <stdio.h>
24 #include "sysdep.h"
25 #include "dis-asm.h"
26 #include "opcode/ppc.h"
27
28 /* This file provides several disassembler functions, all of which use
29 the disassembler interface defined in dis-asm.h. Several functions
30 are provided because this file handles disassembly for the PowerPC
31 in both big and little endian mode and also for the POWER (RS/6000)
32 chip. */
33
34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
35
36 /* Determine which set of machines to disassemble for. PPC403/601 or
37 BookE. For convenience, also disassemble instructions supported
38 by the AltiVec vector unit. */
39
40 static int
41 powerpc_dialect (struct disassemble_info *info)
42 {
43 int dialect = PPC_OPCODE_PPC;
44
45 if (BFD_DEFAULT_TARGET_SIZE == 64)
46 dialect |= PPC_OPCODE_64;
47
48 if (info->disassembler_options
49 && strstr (info->disassembler_options, "ppcps") != NULL)
50 dialect |= PPC_OPCODE_PPCPS;
51 else if (info->disassembler_options
52 && strstr (info->disassembler_options, "booke") != NULL)
53 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
54 else if ((info->mach == bfd_mach_ppc_e500mc)
55 || (info->disassembler_options
56 && strstr (info->disassembler_options, "e500mc") != NULL))
57 dialect |= (PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
58 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
59 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
60 else if ((info->mach == bfd_mach_ppc_e500)
61 || (info->disassembler_options
62 && strstr (info->disassembler_options, "e500") != NULL))
63 dialect |= (PPC_OPCODE_BOOKE
64 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
65 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
66 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
67 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
68 else if (info->disassembler_options
69 && strstr (info->disassembler_options, "efs") != NULL)
70 dialect |= PPC_OPCODE_EFS;
71 else if (info->disassembler_options
72 && strstr (info->disassembler_options, "e300") != NULL)
73 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
74 else if (info->disassembler_options
75 && strstr (info->disassembler_options, "440") != NULL)
76 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
77 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
78 else
79 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
80 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
81
82 if (info->disassembler_options
83 && strstr (info->disassembler_options, "power4") != NULL)
84 dialect |= PPC_OPCODE_POWER4;
85
86 if (info->disassembler_options
87 && strstr (info->disassembler_options, "power5") != NULL)
88 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
89
90 if (info->disassembler_options
91 && strstr (info->disassembler_options, "cell") != NULL)
92 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
93
94 if (info->disassembler_options
95 && strstr (info->disassembler_options, "power6") != NULL)
96 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
97
98 if (info->disassembler_options
99 && strstr (info->disassembler_options, "any") != NULL)
100 dialect |= PPC_OPCODE_ANY;
101
102 if (info->disassembler_options)
103 {
104 if (strstr (info->disassembler_options, "32") != NULL)
105 dialect &= ~PPC_OPCODE_64;
106 else if (strstr (info->disassembler_options, "64") != NULL)
107 dialect |= PPC_OPCODE_64;
108 }
109
110 info->private_data = (char *) 0 + dialect;
111 return dialect;
112 }
113
114 /* Print a big endian PowerPC instruction. */
115
116 int
117 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
118 {
119 int dialect = (char *) info->private_data - (char *) 0;
120 return print_insn_powerpc (memaddr, info, 1, dialect);
121 }
122
123 /* Print a little endian PowerPC instruction. */
124
125 int
126 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
127 {
128 int dialect = (char *) info->private_data - (char *) 0;
129 return print_insn_powerpc (memaddr, info, 0, dialect);
130 }
131
132 /* Print a POWER (RS/6000) instruction. */
133
134 int
135 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
136 {
137 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
138 }
139
140 /* Extract the operand value from the PowerPC or POWER instruction. */
141
142 static long
143 operand_value_powerpc (const struct powerpc_operand *operand,
144 unsigned long insn, int dialect)
145 {
146 long value;
147 int invalid;
148 /* Extract the value from the instruction. */
149 if (operand->extract)
150 value = (*operand->extract) (insn, dialect, &invalid);
151 else
152 {
153 value = (insn >> operand->shift) & operand->bitm;
154 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
155 {
156 /* BITM is always some number of zeros followed by some
157 number of ones, followed by some numer of zeros. */
158 unsigned long top = operand->bitm;
159 /* top & -top gives the rightmost 1 bit, so this
160 fills in any trailing zeros. */
161 top |= (top & -top) - 1;
162 top &= ~(top >> 1);
163 value = (value ^ top) - top;
164 }
165 }
166
167 return value;
168 }
169
170 /* Determine whether the optional operand(s) should be printed. */
171
172 static int
173 skip_optional_operands (const unsigned char *opindex,
174 unsigned long insn, int dialect)
175 {
176 const struct powerpc_operand *operand;
177
178 for (; *opindex != 0; opindex++)
179 {
180 operand = &powerpc_operands[*opindex];
181 if ((operand->flags & PPC_OPERAND_NEXT) != 0
182 || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
183 && operand_value_powerpc (operand, insn, dialect) != 0))
184 return 0;
185 }
186
187 return 1;
188 }
189
190 /* Print a PowerPC or POWER instruction. */
191
192 static int
193 print_insn_powerpc (bfd_vma memaddr,
194 struct disassemble_info *info,
195 int bigendian,
196 int dialect)
197 {
198 bfd_byte buffer[4];
199 int status;
200 unsigned long insn;
201 const struct powerpc_opcode *opcode;
202 const struct powerpc_opcode *opcode_end;
203 unsigned long op;
204
205 if (dialect == 0)
206 dialect = powerpc_dialect (info);
207
208 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
209 if (status != 0)
210 {
211 (*info->memory_error_func) (status, memaddr, info);
212 return -1;
213 }
214
215 if (bigendian)
216 insn = bfd_getb32 (buffer);
217 else
218 insn = bfd_getl32 (buffer);
219
220 /* Get the major opcode of the instruction. */
221 op = PPC_OP (insn);
222
223 /* Find the first match in the opcode table. We could speed this up
224 a bit by doing a binary search on the major opcode. */
225 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
226 again:
227 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
228 {
229 unsigned long table_op;
230 const unsigned char *opindex;
231 const struct powerpc_operand *operand;
232 int invalid;
233 int need_comma;
234 int need_paren;
235 int skip_optional;
236
237 table_op = PPC_OP (opcode->opcode);
238 if (op < table_op)
239 break;
240 if (op > table_op)
241 continue;
242
243 if ((insn & opcode->mask) != opcode->opcode
244 || (opcode->flags & dialect) == 0)
245 continue;
246
247 /* Make two passes over the operands. First see if any of them
248 have extraction functions, and, if they do, make sure the
249 instruction is valid. */
250 invalid = 0;
251 for (opindex = opcode->operands; *opindex != 0; opindex++)
252 {
253 operand = powerpc_operands + *opindex;
254 if (operand->extract)
255 (*operand->extract) (insn, dialect, &invalid);
256 }
257 if (invalid)
258 continue;
259
260 /* The instruction is valid. */
261 if (opcode->operands[0] != 0)
262 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
263 else
264 (*info->fprintf_func) (info->stream, "%s", opcode->name);
265
266 /* Now extract and print the operands. */
267 need_comma = 0;
268 need_paren = 0;
269 skip_optional = -1;
270 for (opindex = opcode->operands; *opindex != 0; opindex++)
271 {
272 long value;
273
274 operand = powerpc_operands + *opindex;
275
276 /* Operands that are marked FAKE are simply ignored. We
277 already made sure that the extract function considered
278 the instruction to be valid. */
279 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
280 continue;
281
282 /* If all of the optional operands have the value zero,
283 then don't print any of them. */
284 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
285 {
286 if (skip_optional < 0)
287 skip_optional = skip_optional_operands (opindex, insn,
288 dialect);
289 if (skip_optional)
290 continue;
291 }
292
293 value = operand_value_powerpc (operand, insn, dialect);
294
295 if (need_comma)
296 {
297 (*info->fprintf_func) (info->stream, ",");
298 need_comma = 0;
299 }
300
301 /* Print the operand as directed by the flags. */
302 if ((operand->flags & PPC_OPERAND_GPR) != 0
303 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
304 (*info->fprintf_func) (info->stream, "r%ld", value);
305 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
306 (*info->fprintf_func) (info->stream, "f%ld", value);
307 else if ((operand->flags & PPC_OPERAND_VR) != 0)
308 (*info->fprintf_func) (info->stream, "v%ld", value);
309 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
310 (*info->print_address_func) (memaddr + value, info);
311 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
312 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
313 else if ((operand->flags & PPC_OPERAND_CR) == 0
314 || (dialect & PPC_OPCODE_PPC) == 0)
315 (*info->fprintf_func) (info->stream, "%ld", value);
316 else
317 {
318 if (operand->bitm == 7)
319 (*info->fprintf_func) (info->stream, "cr%ld", value);
320 else
321 {
322 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
323 int cr;
324 int cc;
325
326 cr = value >> 2;
327 if (cr != 0)
328 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
329 cc = value & 3;
330 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
331 }
332 }
333
334 if (need_paren)
335 {
336 (*info->fprintf_func) (info->stream, ")");
337 need_paren = 0;
338 }
339
340 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
341 need_comma = 1;
342 else
343 {
344 (*info->fprintf_func) (info->stream, "(");
345 need_paren = 1;
346 }
347 }
348
349 /* We have found and printed an instruction; return. */
350 return 4;
351 }
352
353 if ((dialect & PPC_OPCODE_ANY) != 0)
354 {
355 dialect = ~PPC_OPCODE_ANY;
356 goto again;
357 }
358
359 /* We could not find a match. */
360 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
361
362 return 4;
363 }
364
365 void
366 print_ppc_disassembler_options (FILE *stream)
367 {
368 fprintf (stream, "\n\
369 The following PPC specific disassembler options are supported for use with\n\
370 the -M switch:\n");
371
372 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
373 fprintf (stream, " e300 Disassemble the e300 instructions\n");
374 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
375 fprintf (stream, " e500mc Disassemble the e500mc instructions\n");
376 fprintf (stream, " 440 Disassemble the 440 instructions\n");
377 fprintf (stream, " efs Disassemble the EFS instructions\n");
378 fprintf (stream, " ppcps Disassemble the PowerPC paired singles instructions\n");
379 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
380 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
381 fprintf (stream, " power6 Disassemble the Power6 instructions\n");
382 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
383 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
384 }
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