opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   3    2008, 2009 Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opintl.h"
  27 #include "opcode/ppc.h"
  28
  29 /* This file provides several disassembler functions, all of which use
  30    the disassembler interface defined in dis-asm.h.  Several functions
  31    are provided because this file handles disassembly for the PowerPC
  32    in both big and little endian mode and also for the POWER (RS/6000)
  33    chip.  */
  34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  35                                ppc_cpu_t);
  36
  37 struct dis_private
  38 {
  39   /* Stash the result of parsing disassembler_options here.  */
  40   ppc_cpu_t dialect;
  41 };
  42
  43 #define POWERPC_DIALECT(INFO) \
  44   (((struct dis_private *) ((INFO)->private_data))->dialect)
  45
  46 struct ppc_mopt {
  47   const char *opt;
  48   ppc_cpu_t cpu;
  49   ppc_cpu_t sticky;
  50 };
  51
  52 struct ppc_mopt ppc_opts[] = {
  53   { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  54                 | PPC_OPCODE_32),
  55     0 },
  56   { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  57                 | PPC_OPCODE_405 | PPC_OPCODE_32),
  58     0 },
  59   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  60                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  61     0 },
  62   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  63                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  64     0 },
  65   { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_601
  66                 | PPC_OPCODE_32),
  67     0 },
  68   { "603",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  69     0 },
  70   { "604",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  71     0 },
  72   { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
  73     0 },
  74   { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  75                 | PPC_OPCODE_32),
  76     0 },
  77   { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  78                 | PPC_OPCODE_32),
  79     0 },
  80   { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  81                 | PPC_OPCODE_32),
  82     0 },
  83   { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  84                 | PPC_OPCODE_32),
  85     0 },
  86   { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
  87     , 0 },
  88   { "altivec", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
  89     PPC_OPCODE_ALTIVEC },
  90   { "any",     0,
  91     PPC_OPCODE_ANY },
  92   { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  93     0 },
  94   { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  95     0 },
  96   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
  97                 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
  98     0 },
  99   { "com",     (PPC_OPCODE_COMMON | PPC_OPCODE_32),
 100     0 },
 101   { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
 102                 | PPC_OPCODE_E300),
 103     0 },
 104   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 105                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 106                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 107                 | PPC_OPCODE_E500MC),
 108     0 },
 109   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 110                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 111                 | PPC_OPCODE_E500MC),
 112     0 },
 113   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 114                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 115                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 116                 | PPC_OPCODE_E500MC),
 117     0 },
 118   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 119     0 },
 120   { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 121                 | PPC_OPCODE_POWER4),
 122     0 },
 123   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 124                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 125     0 },
 126   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 127                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 128                 | PPC_OPCODE_ALTIVEC),
 129     0 },
 130   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
 131                 | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
 132                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
 133                 | PPC_OPCODE_VSX),
 134     0 },
 135   { "ppc",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 136     0 },
 137   { "ppc32",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 138     0 },
 139   { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
 140     0 },
 141   { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64_BRIDGE
 142                     | PPC_OPCODE_64),
 143     0 },
 144   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
 145                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK
 146                 | PPC_OPCODE_64 | PPC_OPCODE_A2),
 147     0 },
 148   { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 149     0 },
 150   { "pwr",     (PPC_OPCODE_POWER | PPC_OPCODE_32),
 151     0 },
 152   { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 153     0 },
 154   { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 155     0 },
 156   { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 157     PPC_OPCODE_SPE },
 158   { "vsx",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
 159     PPC_OPCODE_VSX },
 160 };
 161
 162 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 163
 164 ppc_cpu_t
 165 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
 166 {
 167   /* Sticky bits.  */
 168   ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 169                                       | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
 170   unsigned int i;
 171
 172   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 173     if (strcmp (ppc_opts[i].opt, arg) == 0)
 174       {
 175         if (ppc_opts[i].sticky)
 176           {
 177             retain_flags |= ppc_opts[i].sticky;
 178             if ((ppc_cpu & ~(PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 179                              | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
 180               break;
 181           }
 182         ppc_cpu = ppc_opts[i].cpu;
 183         break;
 184       }
 185   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
 186     return 0;
 187
 188   ppc_cpu |= retain_flags;
 189   return ppc_cpu;
 190 }
 191
 192 /* Determine which set of machines to disassemble for.  */
 193
 194 static int
 195 powerpc_init_dialect (struct disassemble_info *info)
 196 {
 197   ppc_cpu_t dialect = 0;
 198   char *arg;
 199   struct dis_private *priv = calloc (sizeof (*priv), 1);
 200
 201   if (priv == NULL)
 202     return FALSE;
 203
 204   arg = info->disassembler_options;
 205   while (arg != NULL)
 206     {
 207       ppc_cpu_t new_cpu = 0;
 208       char *end = strchr (arg, ',');
 209
 210       if (end != NULL)
 211         *end = 0;
 212
 213       if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
 214         dialect = new_cpu;
 215       else if (strcmp (arg, "32") == 0)
 216         {
 217           dialect &= ~PPC_OPCODE_64;
 218           dialect |= PPC_OPCODE_32;
 219         }
 220       else if (strcmp (arg, "64") == 0)
 221         {
 222           dialect |= PPC_OPCODE_64;
 223           dialect &= ~PPC_OPCODE_32;
 224         }
 225       else
 226         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 227
 228       if (end != NULL)
 229         *end++ = ',';
 230       arg = end;
 231     }
 232
 233   if ((dialect & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) == 0)
 234     {
 235       if (info->mach == bfd_mach_ppc64)
 236         dialect |= PPC_OPCODE_64;
 237       else
 238         dialect |= PPC_OPCODE_32;
 239       /* Choose a reasonable default.  */
 240       dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_CLASSIC
 241                   | PPC_OPCODE_601 | PPC_OPCODE_ALTIVEC);
 242     }
 243
 244   info->private_data = priv;
 245   POWERPC_DIALECT(info) = dialect;
 246
 247   return TRUE;
 248 }
 249
 250 /* Print a big endian PowerPC instruction.  */
 251
 252 int
 253 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 254 {
 255   if (info->private_data == NULL && !powerpc_init_dialect (info))
 256     return -1;
 257   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 258 }
 259
 260 /* Print a little endian PowerPC instruction.  */
 261
 262 int
 263 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 264 {
 265   if (info->private_data == NULL && !powerpc_init_dialect (info))
 266     return -1;
 267   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 268 }
 269
 270 /* Print a POWER (RS/6000) instruction.  */
 271
 272 int
 273 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 274 {
 275   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 276 }
 277
 278 /* Extract the operand value from the PowerPC or POWER instruction.  */
 279
 280 static long
 281 operand_value_powerpc (const struct powerpc_operand *operand,
 282                        unsigned long insn, ppc_cpu_t dialect)
 283 {
 284   long value;
 285   int invalid;
 286   /* Extract the value from the instruction.  */
 287   if (operand->extract)
 288     value = (*operand->extract) (insn, dialect, &invalid);
 289   else
 290     {
 291       value = (insn >> operand->shift) & operand->bitm;
 292       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 293         {
 294           /* BITM is always some number of zeros followed by some
 295              number of ones, followed by some numer of zeros.  */
 296           unsigned long top = operand->bitm;
 297           /* top & -top gives the rightmost 1 bit, so this
 298              fills in any trailing zeros.  */
 299           top |= (top & -top) - 1;
 300           top &= ~(top >> 1);
 301           value = (value ^ top) - top;
 302         }
 303     }
 304
 305   return value;
 306 }
 307
 308 /* Determine whether the optional operand(s) should be printed.  */
 309
 310 static int
 311 skip_optional_operands (const unsigned char *opindex,
 312                         unsigned long insn, ppc_cpu_t dialect)
 313 {
 314   const struct powerpc_operand *operand;
 315
 316   for (; *opindex != 0; opindex++)
 317     {
 318       operand = &powerpc_operands[*opindex];
 319       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 320           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 321               && operand_value_powerpc (operand, insn, dialect) != 0))
 322         return 0;
 323     }
 324
 325   return 1;
 326 }
 327
 328 /* Print a PowerPC or POWER instruction.  */
 329
 330 static int
 331 print_insn_powerpc (bfd_vma memaddr,
 332                     struct disassemble_info *info,
 333                     int bigendian,
 334                     ppc_cpu_t dialect)
 335 {
 336   bfd_byte buffer[4];
 337   int status;
 338   unsigned long insn;
 339   const struct powerpc_opcode *opcode;
 340   const struct powerpc_opcode *opcode_end;
 341   unsigned long op;
 342   ppc_cpu_t dialect_orig = dialect;
 343
 344   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 345   if (status != 0)
 346     {
 347       (*info->memory_error_func) (status, memaddr, info);
 348       return -1;
 349     }
 350
 351   if (bigendian)
 352     insn = bfd_getb32 (buffer);
 353   else
 354     insn = bfd_getl32 (buffer);
 355
 356   /* Get the major opcode of the instruction.  */
 357   op = PPC_OP (insn);
 358
 359   /* Find the first match in the opcode table.  We could speed this up
 360      a bit by doing a binary search on the major opcode.  */
 361   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 362  again:
 363   for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
 364     {
 365       unsigned long table_op;
 366       const unsigned char *opindex;
 367       const struct powerpc_operand *operand;
 368       int invalid;
 369       int need_comma;
 370       int need_paren;
 371       int skip_optional;
 372
 373       table_op = PPC_OP (opcode->opcode);
 374       if (op < table_op)
 375         break;
 376       if (op > table_op)
 377         continue;
 378
 379       if ((insn & opcode->mask) != opcode->opcode
 380           || (opcode->flags & dialect) == 0
 381           || (opcode->deprecated & dialect_orig) != 0)
 382         continue;
 383
 384       /* Make two passes over the operands.  First see if any of them
 385          have extraction functions, and, if they do, make sure the
 386          instruction is valid.  */
 387       invalid = 0;
 388       for (opindex = opcode->operands; *opindex != 0; opindex++)
 389         {
 390           operand = powerpc_operands + *opindex;
 391           if (operand->extract)
 392             (*operand->extract) (insn, dialect, &invalid);
 393         }
 394       if (invalid)
 395         continue;
 396
 397       /* The instruction is valid.  */
 398       if (opcode->operands[0] != 0)
 399         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 400       else
 401         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 402
 403       /* Now extract and print the operands.  */
 404       need_comma = 0;
 405       need_paren = 0;
 406       skip_optional = -1;
 407       for (opindex = opcode->operands; *opindex != 0; opindex++)
 408         {
 409           long value;
 410
 411           operand = powerpc_operands + *opindex;
 412
 413           /* Operands that are marked FAKE are simply ignored.  We
 414              already made sure that the extract function considered
 415              the instruction to be valid.  */
 416           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 417             continue;
 418
 419           /* If all of the optional operands have the value zero,
 420              then don't print any of them.  */
 421           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 422             {
 423               if (skip_optional < 0)
 424                 skip_optional = skip_optional_operands (opindex, insn,
 425                                                         dialect);
 426               if (skip_optional)
 427                 continue;
 428             }
 429
 430           value = operand_value_powerpc (operand, insn, dialect);
 431
 432           if (need_comma)
 433             {
 434               (*info->fprintf_func) (info->stream, ",");
 435               need_comma = 0;
 436             }
 437
 438           /* Print the operand as directed by the flags.  */
 439           if ((operand->flags & PPC_OPERAND_GPR) != 0
 440               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 441             (*info->fprintf_func) (info->stream, "r%ld", value);
 442           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 443             (*info->fprintf_func) (info->stream, "f%ld", value);
 444           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 445             (*info->fprintf_func) (info->stream, "v%ld", value);
 446           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 447             (*info->fprintf_func) (info->stream, "vs%ld", value);
 448           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 449             (*info->print_address_func) (memaddr + value, info);
 450           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 451             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 452           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 453             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 454           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 455             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 456           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 457             (*info->fprintf_func) (info->stream, "%ld", value);
 458           else if ((operand->flags & PPC_OPERAND_CR) != 0
 459                    && (dialect & PPC_OPCODE_PPC) != 0)
 460             {
 461               if (operand->bitm == 7)
 462                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 463               else
 464                 {
 465                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 466                   int cr;
 467                   int cc;
 468
 469                   cr = value >> 2;
 470                   if (cr != 0)
 471                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 472                   cc = value & 3;
 473                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 474                 }
 475             }
 476           else
 477             (*info->fprintf_func) (info->stream, "%ld", value);
 478
 479           if (need_paren)
 480             {
 481               (*info->fprintf_func) (info->stream, ")");
 482               need_paren = 0;
 483             }
 484
 485           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 486             need_comma = 1;
 487           else
 488             {
 489               (*info->fprintf_func) (info->stream, "(");
 490               need_paren = 1;
 491             }
 492         }
 493
 494       /* We have found and printed an instruction; return.  */
 495       return 4;
 496     }
 497
 498   if ((dialect & PPC_OPCODE_ANY) != 0)
 499     {
 500       dialect = ~PPC_OPCODE_ANY;
 501       goto again;
 502     }
 503
 504   /* We could not find a match.  */
 505   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 506
 507   return 4;
 508 }
 509
 510 void
 511 print_ppc_disassembler_options (FILE *stream)
 512 {
 513   unsigned int i, col;
 514
 515   fprintf (stream, _("\n\
 516 The following PPC specific disassembler options are supported for use with\n\
 517 the -M switch:\n"));
 518
 519   for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 520     {
 521       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 522       if (col > 66)
 523         {
 524           fprintf (stream, "\n");
 525           col = 0;
 526         }
 527     }
 528   fprintf (stream, " 32, 64\n");
 529 }