opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   3    2008, 2009 Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opintl.h"
  27 #include "opcode/ppc.h"
  28
  29 /* This file provides several disassembler functions, all of which use
  30    the disassembler interface defined in dis-asm.h.  Several functions
  31    are provided because this file handles disassembly for the PowerPC
  32    in both big and little endian mode and also for the POWER (RS/6000)
  33    chip.  */
  34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  35                                ppc_cpu_t);
  36
  37 struct dis_private
  38 {
  39   /* Stash the result of parsing disassembler_options here.  */
  40   ppc_cpu_t dialect;
  41 };
  42
  43 #define POWERPC_DIALECT(INFO) \
  44   (((struct dis_private *) ((INFO)->private_data))->dialect)
  45
  46 struct ppc_mopt {
  47   const char *opt;
  48   ppc_cpu_t cpu;
  49   ppc_cpu_t sticky;
  50 };
  51
  52 struct ppc_mopt ppc_opts[] = {
  53   { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  54                 | PPC_OPCODE_32),
  55     0 },
  56   { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
  57                 | PPC_OPCODE_405 | PPC_OPCODE_32),
  58     0 },
  59   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  60                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  61     0 },
  62   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
  63                 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  64     0 },
  65   { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_601
  66                 | PPC_OPCODE_32),
  67     0 },
  68   { "603",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  69     0 },
  70   { "604",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
  71     0 },
  72   { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
  73     0 },
  74   { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  75                 | PPC_OPCODE_32),
  76     0 },
  77   { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  78                 | PPC_OPCODE_32),
  79     0 },
  80   { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  81                 | PPC_OPCODE_32),
  82     0 },
  83   { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
  84                 | PPC_OPCODE_32),
  85     0 },
  86   { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
  87     , 0 },
  88   { "altivec", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
  89     PPC_OPCODE_ALTIVEC },
  90   { "any",     0,
  91     PPC_OPCODE_ANY },
  92   { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  93     0 },
  94   { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
  95     0 },
  96   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
  97                 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
  98     0 },
  99   { "com",     (PPC_OPCODE_COMMON | PPC_OPCODE_32),
 100     0 },
 101   { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
 102                 | PPC_OPCODE_E300),
 103     0 },
 104   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 105                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 106                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 107                 | PPC_OPCODE_E500MC),
 108     0 },
 109   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 110                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 111                 | PPC_OPCODE_E500MC),
 112     0 },
 113   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 114                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 115                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 116                 | PPC_OPCODE_E500MC),
 117     0 },
 118   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 119     0 },
 120   { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 121                 | PPC_OPCODE_POWER4),
 122     0 },
 123   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 124                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 125     0 },
 126   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
 127                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 128                 | PPC_OPCODE_ALTIVEC),
 129     0 },
 130   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
 131                 | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
 132                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
 133                 | PPC_OPCODE_VSX),
 134     0 },
 135   { "ppc",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 136     0 },
 137   { "ppc32",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 138     0 },
 139   { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
 140     0 },
 141   { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64_BRIDGE
 142                     | PPC_OPCODE_64),
 143     0 },
 144   { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 145     0 },
 146   { "pwr",     (PPC_OPCODE_POWER | PPC_OPCODE_32),
 147     0 },
 148   { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 149     0 },
 150   { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 151     0 },
 152   { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 153     PPC_OPCODE_SPE },
 154   { "vsx",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
 155     PPC_OPCODE_VSX },
 156 };
 157
 158 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 159
 160 ppc_cpu_t
 161 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
 162 {
 163   /* Sticky bits.  */
 164   ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 165                                       | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
 166   unsigned int i;
 167
 168   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 169     if (strcmp (ppc_opts[i].opt, arg) == 0)
 170       {
 171         if (ppc_opts[i].sticky)
 172           {
 173             retain_flags |= ppc_opts[i].sticky;
 174             if ((ppc_cpu & ~(PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 175                              | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
 176               break;
 177           }
 178         ppc_cpu = ppc_opts[i].cpu;
 179         break;
 180       }
 181   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
 182     return 0;
 183
 184   ppc_cpu |= retain_flags;
 185   return ppc_cpu;
 186 }
 187
 188 /* Determine which set of machines to disassemble for.  */
 189
 190 static int
 191 powerpc_init_dialect (struct disassemble_info *info)
 192 {
 193   ppc_cpu_t dialect = 0;
 194   char *arg;
 195   struct dis_private *priv = calloc (sizeof (*priv), 1);
 196
 197   if (priv == NULL)
 198     return FALSE;
 199
 200   arg = info->disassembler_options;
 201   while (arg != NULL)
 202     {
 203       ppc_cpu_t new_cpu = 0;
 204       char *end = strchr (arg, ',');
 205
 206       if (end != NULL)
 207         *end = 0;
 208
 209       if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
 210         dialect = new_cpu;
 211       else if (strcmp (arg, "32") == 0)
 212         {
 213           dialect &= ~PPC_OPCODE_64;
 214           dialect |= PPC_OPCODE_32;
 215         }
 216       else if (strcmp (arg, "64") == 0)
 217         {
 218           dialect |= PPC_OPCODE_64;
 219           dialect &= ~PPC_OPCODE_32;
 220         }
 221       else
 222         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 223
 224       if (end != NULL)
 225         *end++ = ',';
 226       arg = end;
 227     }
 228
 229   if ((dialect & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) == 0)
 230     {
 231       if (info->mach == bfd_mach_ppc64)
 232         dialect |= PPC_OPCODE_64;
 233       else
 234         dialect |= PPC_OPCODE_32;
 235       /* Choose a reasonable default.  */
 236       dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_CLASSIC
 237                   | PPC_OPCODE_601 | PPC_OPCODE_ALTIVEC);
 238     }
 239
 240   info->private_data = priv;
 241   POWERPC_DIALECT(info) = dialect;
 242
 243   return TRUE;
 244 }
 245
 246 /* Print a big endian PowerPC instruction.  */
 247
 248 int
 249 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 250 {
 251   if (info->private_data == NULL && !powerpc_init_dialect (info))
 252     return -1;
 253   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 254 }
 255
 256 /* Print a little endian PowerPC instruction.  */
 257
 258 int
 259 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 260 {
 261   if (info->private_data == NULL && !powerpc_init_dialect (info))
 262     return -1;
 263   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 264 }
 265
 266 /* Print a POWER (RS/6000) instruction.  */
 267
 268 int
 269 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 270 {
 271   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 272 }
 273
 274 /* Extract the operand value from the PowerPC or POWER instruction.  */
 275
 276 static long
 277 operand_value_powerpc (const struct powerpc_operand *operand,
 278                        unsigned long insn, ppc_cpu_t dialect)
 279 {
 280   long value;
 281   int invalid;
 282   /* Extract the value from the instruction.  */
 283   if (operand->extract)
 284     value = (*operand->extract) (insn, dialect, &invalid);
 285   else
 286     {
 287       value = (insn >> operand->shift) & operand->bitm;
 288       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 289         {
 290           /* BITM is always some number of zeros followed by some
 291              number of ones, followed by some numer of zeros.  */
 292           unsigned long top = operand->bitm;
 293           /* top & -top gives the rightmost 1 bit, so this
 294              fills in any trailing zeros.  */
 295           top |= (top & -top) - 1;
 296           top &= ~(top >> 1);
 297           value = (value ^ top) - top;
 298         }
 299     }
 300
 301   return value;
 302 }
 303
 304 /* Determine whether the optional operand(s) should be printed.  */
 305
 306 static int
 307 skip_optional_operands (const unsigned char *opindex,
 308                         unsigned long insn, ppc_cpu_t dialect)
 309 {
 310   const struct powerpc_operand *operand;
 311
 312   for (; *opindex != 0; opindex++)
 313     {
 314       operand = &powerpc_operands[*opindex];
 315       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 316           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 317               && operand_value_powerpc (operand, insn, dialect) != 0))
 318         return 0;
 319     }
 320
 321   return 1;
 322 }
 323
 324 /* Print a PowerPC or POWER instruction.  */
 325
 326 static int
 327 print_insn_powerpc (bfd_vma memaddr,
 328                     struct disassemble_info *info,
 329                     int bigendian,
 330                     ppc_cpu_t dialect)
 331 {
 332   bfd_byte buffer[4];
 333   int status;
 334   unsigned long insn;
 335   const struct powerpc_opcode *opcode;
 336   const struct powerpc_opcode *opcode_end;
 337   unsigned long op;
 338   ppc_cpu_t dialect_orig = dialect;
 339
 340   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 341   if (status != 0)
 342     {
 343       (*info->memory_error_func) (status, memaddr, info);
 344       return -1;
 345     }
 346
 347   if (bigendian)
 348     insn = bfd_getb32 (buffer);
 349   else
 350     insn = bfd_getl32 (buffer);
 351
 352   /* Get the major opcode of the instruction.  */
 353   op = PPC_OP (insn);
 354
 355   /* Find the first match in the opcode table.  We could speed this up
 356      a bit by doing a binary search on the major opcode.  */
 357   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 358  again:
 359   for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
 360     {
 361       unsigned long table_op;
 362       const unsigned char *opindex;
 363       const struct powerpc_operand *operand;
 364       int invalid;
 365       int need_comma;
 366       int need_paren;
 367       int skip_optional;
 368
 369       table_op = PPC_OP (opcode->opcode);
 370       if (op < table_op)
 371         break;
 372       if (op > table_op)
 373         continue;
 374
 375       if ((insn & opcode->mask) != opcode->opcode
 376           || (opcode->flags & dialect) == 0
 377           || (opcode->deprecated & dialect_orig) != 0)
 378         continue;
 379
 380       /* Make two passes over the operands.  First see if any of them
 381          have extraction functions, and, if they do, make sure the
 382          instruction is valid.  */
 383       invalid = 0;
 384       for (opindex = opcode->operands; *opindex != 0; opindex++)
 385         {
 386           operand = powerpc_operands + *opindex;
 387           if (operand->extract)
 388             (*operand->extract) (insn, dialect, &invalid);
 389         }
 390       if (invalid)
 391         continue;
 392
 393       /* The instruction is valid.  */
 394       if (opcode->operands[0] != 0)
 395         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 396       else
 397         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 398
 399       /* Now extract and print the operands.  */
 400       need_comma = 0;
 401       need_paren = 0;
 402       skip_optional = -1;
 403       for (opindex = opcode->operands; *opindex != 0; opindex++)
 404         {
 405           long value;
 406
 407           operand = powerpc_operands + *opindex;
 408
 409           /* Operands that are marked FAKE are simply ignored.  We
 410              already made sure that the extract function considered
 411              the instruction to be valid.  */
 412           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 413             continue;
 414
 415           /* If all of the optional operands have the value zero,
 416              then don't print any of them.  */
 417           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 418             {
 419               if (skip_optional < 0)
 420                 skip_optional = skip_optional_operands (opindex, insn,
 421                                                         dialect);
 422               if (skip_optional)
 423                 continue;
 424             }
 425
 426           value = operand_value_powerpc (operand, insn, dialect);
 427
 428           if (need_comma)
 429             {
 430               (*info->fprintf_func) (info->stream, ",");
 431               need_comma = 0;
 432             }
 433
 434           /* Print the operand as directed by the flags.  */
 435           if ((operand->flags & PPC_OPERAND_GPR) != 0
 436               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 437             (*info->fprintf_func) (info->stream, "r%ld", value);
 438           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 439             (*info->fprintf_func) (info->stream, "f%ld", value);
 440           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 441             (*info->fprintf_func) (info->stream, "v%ld", value);
 442           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 443             (*info->fprintf_func) (info->stream, "vs%ld", value);
 444           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 445             (*info->print_address_func) (memaddr + value, info);
 446           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 447             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 448           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 449             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 450           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 451             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 452           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 453             (*info->fprintf_func) (info->stream, "%ld", value);
 454           else if ((operand->flags & PPC_OPERAND_CR) != 0
 455                    && (dialect & PPC_OPCODE_PPC) != 0)
 456             {
 457               if (operand->bitm == 7)
 458                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 459               else
 460                 {
 461                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 462                   int cr;
 463                   int cc;
 464
 465                   cr = value >> 2;
 466                   if (cr != 0)
 467                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 468                   cc = value & 3;
 469                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 470                 }
 471             }
 472           else
 473             (*info->fprintf_func) (info->stream, "%ld", value);
 474
 475           if (need_paren)
 476             {
 477               (*info->fprintf_func) (info->stream, ")");
 478               need_paren = 0;
 479             }
 480
 481           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 482             need_comma = 1;
 483           else
 484             {
 485               (*info->fprintf_func) (info->stream, "(");
 486               need_paren = 1;
 487             }
 488         }
 489
 490       /* We have found and printed an instruction; return.  */
 491       return 4;
 492     }
 493
 494   if ((dialect & PPC_OPCODE_ANY) != 0)
 495     {
 496       dialect = ~PPC_OPCODE_ANY;
 497       goto again;
 498     }
 499
 500   /* We could not find a match.  */
 501   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 502
 503   return 4;
 504 }
 505
 506 void
 507 print_ppc_disassembler_options (FILE *stream)
 508 {
 509   unsigned int i, col;
 510
 511   fprintf (stream, _("\n\
 512 The following PPC specific disassembler options are supported for use with\n\
 513 the -M switch:\n"));
 514
 515   for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 516     {
 517       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 518       if (col > 66)
 519         {
 520           fprintf (stream, "\n");
 521           col = 0;
 522         }
 523     }
 524   fprintf (stream, " 32, 64\n");
 525 }