opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003
   3    Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6 This file is part of GDB, GAS, and the GNU binutils.
   7
   8 GDB, GAS, and the GNU binutils are free software; you can redistribute
   9 them and/or modify them under the terms of the GNU General Public
  10 License as published by the Free Software Foundation; either version
  11 2, or (at your option) any later version.
  12
  13 GDB, GAS, and the GNU binutils are distributed in the hope that they
  14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  16 the GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with this file; see the file COPYING.  If not, write to the Free
  20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  21
  22 #include <stdio.h>
  23 #include "sysdep.h"
  24 #include "dis-asm.h"
  25 #include "opcode/ppc.h"
  26
  27 /* This file provides several disassembler functions, all of which use
  28    the disassembler interface defined in dis-asm.h.  Several functions
  29    are provided because this file handles disassembly for the PowerPC
  30    in both big and little endian mode and also for the POWER (RS/6000)
  31    chip.  */
  32
  33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
  34
  35 /* Determine which set of machines to disassemble for.  PPC403/601 or
  36    BookE.  For convenience, also disassemble instructions supported
  37    by the AltiVec vector unit.  */
  38
  39 int
  40 powerpc_dialect (struct disassemble_info *info)
  41 {
  42   int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
  43
  44   if (BFD_DEFAULT_TARGET_SIZE == 64)
  45     dialect |= PPC_OPCODE_64;
  46
  47   if (info->disassembler_options
  48       && (strcmp (info->disassembler_options, "booke") == 0
  49           || strcmp (info->disassembler_options, "booke32") == 0
  50           || strcmp (info->disassembler_options, "booke64") == 0))
  51     dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  52   else
  53     if ((info->mach == bfd_mach_ppc_e500)
  54         || (info->disassembler_options
  55         && (   strcmp (info->disassembler_options, "e500") == 0
  56             || strcmp (info->disassembler_options, "e500x2") == 0)))
  57       {
  58         dialect |= PPC_OPCODE_BOOKE
  59           | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
  60           | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
  61           | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
  62           | PPC_OPCODE_RFMCI;
  63         /* efs* and AltiVec conflict.  */
  64         dialect &= ~PPC_OPCODE_ALTIVEC;
  65       }
  66   else
  67     if (info->disassembler_options
  68         && (strcmp (info->disassembler_options, "efs") == 0))
  69       {
  70         dialect |= PPC_OPCODE_EFS;
  71         /* efs* and AltiVec conflict.  */
  72         dialect &= ~PPC_OPCODE_ALTIVEC;
  73       }
  74   else
  75     dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
  76                 | PPC_OPCODE_COMMON);
  77
  78   if (info->disassembler_options
  79       && strcmp (info->disassembler_options, "power4") == 0)
  80     dialect |= PPC_OPCODE_POWER4;
  81
  82   if (info->disassembler_options)
  83     {
  84       if (strstr (info->disassembler_options, "32") != NULL)
  85         dialect &= ~PPC_OPCODE_64;
  86       else if (strstr (info->disassembler_options, "64") != NULL)
  87         dialect |= PPC_OPCODE_64;
  88     }
  89
  90   return dialect;
  91 }
  92
  93 /* Print a big endian PowerPC instruction.  */
  94
  95 int
  96 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
  97 {
  98   return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
  99 }
 100
 101 /* Print a little endian PowerPC instruction.  */
 102
 103 int
 104 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 105 {
 106   return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
 107 }
 108
 109 /* Print a POWER (RS/6000) instruction.  */
 110
 111 int
 112 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 113 {
 114   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 115 }
 116
 117 /* Print a PowerPC or POWER instruction.  */
 118
 119 static int
 120 print_insn_powerpc (bfd_vma memaddr,
 121                     struct disassemble_info *info,
 122                     int bigendian,
 123                     int dialect)
 124 {
 125   bfd_byte buffer[4];
 126   int status;
 127   unsigned long insn;
 128   const struct powerpc_opcode *opcode;
 129   const struct powerpc_opcode *opcode_end;
 130   unsigned long op;
 131
 132   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 133   if (status != 0)
 134     {
 135       (*info->memory_error_func) (status, memaddr, info);
 136       return -1;
 137     }
 138
 139   if (bigendian)
 140     insn = bfd_getb32 (buffer);
 141   else
 142     insn = bfd_getl32 (buffer);
 143
 144   /* Get the major opcode of the instruction.  */
 145   op = PPC_OP (insn);
 146
 147   /* Find the first match in the opcode table.  We could speed this up
 148      a bit by doing a binary search on the major opcode.  */
 149   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 150   for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
 151     {
 152       unsigned long table_op;
 153       const unsigned char *opindex;
 154       const struct powerpc_operand *operand;
 155       int invalid;
 156       int need_comma;
 157       int need_paren;
 158
 159       table_op = PPC_OP (opcode->opcode);
 160       if (op < table_op)
 161         break;
 162       if (op > table_op)
 163         continue;
 164
 165       if ((insn & opcode->mask) != opcode->opcode
 166           || (opcode->flags & dialect) == 0)
 167         continue;
 168
 169       if ((dialect & PPC_OPCODE_EFS) && (opcode->flags & PPC_OPCODE_ALTIVEC))
 170         continue;
 171
 172       /* Make two passes over the operands.  First see if any of them
 173          have extraction functions, and, if they do, make sure the
 174          instruction is valid.  */
 175       invalid = 0;
 176       for (opindex = opcode->operands; *opindex != 0; opindex++)
 177         {
 178           operand = powerpc_operands + *opindex;
 179           if (operand->extract)
 180             (*operand->extract) (insn, dialect, &invalid);
 181         }
 182       if (invalid)
 183         continue;
 184
 185       /* The instruction is valid.  */
 186       (*info->fprintf_func) (info->stream, "%s", opcode->name);
 187       if (opcode->operands[0] != 0)
 188         (*info->fprintf_func) (info->stream, "\t");
 189
 190       /* Now extract and print the operands.  */
 191       need_comma = 0;
 192       need_paren = 0;
 193       for (opindex = opcode->operands; *opindex != 0; opindex++)
 194         {
 195           long value;
 196
 197           operand = powerpc_operands + *opindex;
 198
 199           /* Operands that are marked FAKE are simply ignored.  We
 200              already made sure that the extract function considered
 201              the instruction to be valid.  */
 202           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 203             continue;
 204
 205           /* Extract the value from the instruction.  */
 206           if (operand->extract)
 207             value = (*operand->extract) (insn, dialect, &invalid);
 208           else
 209             {
 210               value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
 211               if ((operand->flags & PPC_OPERAND_SIGNED) != 0
 212                   && (value & (1 << (operand->bits - 1))) != 0)
 213                 value -= 1 << operand->bits;
 214             }
 215
 216           /* If the operand is optional, and the value is zero, don't
 217              print anything.  */
 218           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 219               && (operand->flags & PPC_OPERAND_NEXT) == 0
 220               && value == 0)
 221             continue;
 222
 223           if (need_comma)
 224             {
 225               (*info->fprintf_func) (info->stream, ",");
 226               need_comma = 0;
 227             }
 228
 229           /* Print the operand as directed by the flags.  */
 230           if ((operand->flags & PPC_OPERAND_GPR) != 0)
 231             (*info->fprintf_func) (info->stream, "r%ld", value);
 232           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 233             (*info->fprintf_func) (info->stream, "f%ld", value);
 234           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 235             (*info->fprintf_func) (info->stream, "v%ld", value);
 236           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 237             (*info->print_address_func) (memaddr + value, info);
 238           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 239             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 240           else if ((operand->flags & PPC_OPERAND_CR) == 0
 241                    || (dialect & PPC_OPCODE_PPC) == 0)
 242             (*info->fprintf_func) (info->stream, "%ld", value);
 243           else
 244             {
 245               if (operand->bits == 3)
 246                 (*info->fprintf_func) (info->stream, "cr%d", value);
 247               else
 248                 {
 249                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 250                   int cr;
 251                   int cc;
 252
 253                   cr = value >> 2;
 254                   if (cr != 0)
 255                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 256                   cc = value & 3;
 257                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 258                 }
 259             }
 260
 261           if (need_paren)
 262             {
 263               (*info->fprintf_func) (info->stream, ")");
 264               need_paren = 0;
 265             }
 266
 267           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 268             need_comma = 1;
 269           else
 270             {
 271               (*info->fprintf_func) (info->stream, "(");
 272               need_paren = 1;
 273             }
 274         }
 275
 276       /* We have found and printed an instruction; return.  */
 277       return 4;
 278     }
 279
 280   /* We could not find a match.  */
 281   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 282
 283   return 4;
 284 }
 285
 286 void
 287 print_ppc_disassembler_options (FILE *stream)
 288 {
 289   fprintf (stream, "\n\
 290 The following PPC specific disassembler options are supported for use with\n\
 291 the -M switch:\n");
 292
 293   fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
 294   fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
 295   fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
 296   fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
 297   fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
 298   fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
 299 }