Change source files over to GPLv3.
[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c
1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include <stdio.h>
24 #include "sysdep.h"
25 #include "dis-asm.h"
26 #include "opcode/ppc.h"
27
28 /* This file provides several disassembler functions, all of which use
29 the disassembler interface defined in dis-asm.h. Several functions
30 are provided because this file handles disassembly for the PowerPC
31 in both big and little endian mode and also for the POWER (RS/6000)
32 chip. */
33
34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
35
36 /* Determine which set of machines to disassemble for. PPC403/601 or
37 BookE. For convenience, also disassemble instructions supported
38 by the AltiVec vector unit. */
39
40 static int
41 powerpc_dialect (struct disassemble_info *info)
42 {
43 int dialect = PPC_OPCODE_PPC;
44
45 if (BFD_DEFAULT_TARGET_SIZE == 64)
46 dialect |= PPC_OPCODE_64;
47
48 if (info->disassembler_options
49 && strstr (info->disassembler_options, "booke") != NULL)
50 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
51 else if ((info->mach == bfd_mach_ppc_e500)
52 || (info->disassembler_options
53 && strstr (info->disassembler_options, "e500") != NULL))
54 dialect |= (PPC_OPCODE_BOOKE
55 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
56 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
57 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
58 | PPC_OPCODE_RFMCI);
59 else if (info->disassembler_options
60 && strstr (info->disassembler_options, "efs") != NULL)
61 dialect |= PPC_OPCODE_EFS;
62 else if (info->disassembler_options
63 && strstr (info->disassembler_options, "e300") != NULL)
64 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
65 else if (info->disassembler_options
66 && strstr (info->disassembler_options, "440") != NULL)
67 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
68 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
69 else
70 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
71 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
72
73 if (info->disassembler_options
74 && strstr (info->disassembler_options, "power4") != NULL)
75 dialect |= PPC_OPCODE_POWER4;
76
77 if (info->disassembler_options
78 && strstr (info->disassembler_options, "power5") != NULL)
79 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
80
81 if (info->disassembler_options
82 && strstr (info->disassembler_options, "cell") != NULL)
83 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
84
85 if (info->disassembler_options
86 && strstr (info->disassembler_options, "power6") != NULL)
87 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
88
89 if (info->disassembler_options
90 && strstr (info->disassembler_options, "any") != NULL)
91 dialect |= PPC_OPCODE_ANY;
92
93 if (info->disassembler_options)
94 {
95 if (strstr (info->disassembler_options, "32") != NULL)
96 dialect &= ~PPC_OPCODE_64;
97 else if (strstr (info->disassembler_options, "64") != NULL)
98 dialect |= PPC_OPCODE_64;
99 }
100
101 info->private_data = (char *) 0 + dialect;
102 return dialect;
103 }
104
105 /* Print a big endian PowerPC instruction. */
106
107 int
108 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
109 {
110 int dialect = (char *) info->private_data - (char *) 0;
111 return print_insn_powerpc (memaddr, info, 1, dialect);
112 }
113
114 /* Print a little endian PowerPC instruction. */
115
116 int
117 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
118 {
119 int dialect = (char *) info->private_data - (char *) 0;
120 return print_insn_powerpc (memaddr, info, 0, dialect);
121 }
122
123 /* Print a POWER (RS/6000) instruction. */
124
125 int
126 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
127 {
128 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
129 }
130
131 /* Extract the operand value from the PowerPC or POWER instruction. */
132
133 static long
134 operand_value_powerpc (const struct powerpc_operand *operand,
135 unsigned long insn, int dialect)
136 {
137 long value;
138 int invalid;
139 /* Extract the value from the instruction. */
140 if (operand->extract)
141 value = (*operand->extract) (insn, dialect, &invalid);
142 else
143 {
144 value = (insn >> operand->shift) & operand->bitm;
145 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
146 {
147 /* BITM is always some number of zeros followed by some
148 number of ones, followed by some numer of zeros. */
149 unsigned long top = operand->bitm;
150 /* top & -top gives the rightmost 1 bit, so this
151 fills in any trailing zeros. */
152 top |= (top & -top) - 1;
153 top &= ~(top >> 1);
154 value = (value ^ top) - top;
155 }
156 }
157
158 return value;
159 }
160
161 /* Determine whether the optional operand(s) should be printed. */
162
163 static int
164 skip_optional_operands (const unsigned char *opindex,
165 unsigned long insn, int dialect)
166 {
167 const struct powerpc_operand *operand;
168
169 for (; *opindex != 0; opindex++)
170 {
171 operand = &powerpc_operands[*opindex];
172 if ((operand->flags & PPC_OPERAND_NEXT) != 0
173 || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
174 && operand_value_powerpc (operand, insn, dialect) != 0))
175 return 0;
176 }
177
178 return 1;
179 }
180
181 /* Print a PowerPC or POWER instruction. */
182
183 static int
184 print_insn_powerpc (bfd_vma memaddr,
185 struct disassemble_info *info,
186 int bigendian,
187 int dialect)
188 {
189 bfd_byte buffer[4];
190 int status;
191 unsigned long insn;
192 const struct powerpc_opcode *opcode;
193 const struct powerpc_opcode *opcode_end;
194 unsigned long op;
195
196 if (dialect == 0)
197 dialect = powerpc_dialect (info);
198
199 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
200 if (status != 0)
201 {
202 (*info->memory_error_func) (status, memaddr, info);
203 return -1;
204 }
205
206 if (bigendian)
207 insn = bfd_getb32 (buffer);
208 else
209 insn = bfd_getl32 (buffer);
210
211 /* Get the major opcode of the instruction. */
212 op = PPC_OP (insn);
213
214 /* Find the first match in the opcode table. We could speed this up
215 a bit by doing a binary search on the major opcode. */
216 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
217 again:
218 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
219 {
220 unsigned long table_op;
221 const unsigned char *opindex;
222 const struct powerpc_operand *operand;
223 int invalid;
224 int need_comma;
225 int need_paren;
226 int skip_optional;
227
228 table_op = PPC_OP (opcode->opcode);
229 if (op < table_op)
230 break;
231 if (op > table_op)
232 continue;
233
234 if ((insn & opcode->mask) != opcode->opcode
235 || (opcode->flags & dialect) == 0)
236 continue;
237
238 /* Make two passes over the operands. First see if any of them
239 have extraction functions, and, if they do, make sure the
240 instruction is valid. */
241 invalid = 0;
242 for (opindex = opcode->operands; *opindex != 0; opindex++)
243 {
244 operand = powerpc_operands + *opindex;
245 if (operand->extract)
246 (*operand->extract) (insn, dialect, &invalid);
247 }
248 if (invalid)
249 continue;
250
251 /* The instruction is valid. */
252 if (opcode->operands[0] != 0)
253 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
254 else
255 (*info->fprintf_func) (info->stream, "%s", opcode->name);
256
257 /* Now extract and print the operands. */
258 need_comma = 0;
259 need_paren = 0;
260 skip_optional = -1;
261 for (opindex = opcode->operands; *opindex != 0; opindex++)
262 {
263 long value;
264
265 operand = powerpc_operands + *opindex;
266
267 /* Operands that are marked FAKE are simply ignored. We
268 already made sure that the extract function considered
269 the instruction to be valid. */
270 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
271 continue;
272
273 /* If all of the optional operands have the value zero,
274 then don't print any of them. */
275 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
276 {
277 if (skip_optional < 0)
278 skip_optional = skip_optional_operands (opindex, insn,
279 dialect);
280 if (skip_optional)
281 continue;
282 }
283
284 value = operand_value_powerpc (operand, insn, dialect);
285
286 if (need_comma)
287 {
288 (*info->fprintf_func) (info->stream, ",");
289 need_comma = 0;
290 }
291
292 /* Print the operand as directed by the flags. */
293 if ((operand->flags & PPC_OPERAND_GPR) != 0
294 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
295 (*info->fprintf_func) (info->stream, "r%ld", value);
296 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
297 (*info->fprintf_func) (info->stream, "f%ld", value);
298 else if ((operand->flags & PPC_OPERAND_VR) != 0)
299 (*info->fprintf_func) (info->stream, "v%ld", value);
300 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
301 (*info->print_address_func) (memaddr + value, info);
302 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
303 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
304 else if ((operand->flags & PPC_OPERAND_CR) == 0
305 || (dialect & PPC_OPCODE_PPC) == 0)
306 (*info->fprintf_func) (info->stream, "%ld", value);
307 else
308 {
309 if (operand->bitm == 7)
310 (*info->fprintf_func) (info->stream, "cr%ld", value);
311 else
312 {
313 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
314 int cr;
315 int cc;
316
317 cr = value >> 2;
318 if (cr != 0)
319 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
320 cc = value & 3;
321 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
322 }
323 }
324
325 if (need_paren)
326 {
327 (*info->fprintf_func) (info->stream, ")");
328 need_paren = 0;
329 }
330
331 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
332 need_comma = 1;
333 else
334 {
335 (*info->fprintf_func) (info->stream, "(");
336 need_paren = 1;
337 }
338 }
339
340 /* We have found and printed an instruction; return. */
341 return 4;
342 }
343
344 if ((dialect & PPC_OPCODE_ANY) != 0)
345 {
346 dialect = ~PPC_OPCODE_ANY;
347 goto again;
348 }
349
350 /* We could not find a match. */
351 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
352
353 return 4;
354 }
355
356 void
357 print_ppc_disassembler_options (FILE *stream)
358 {
359 fprintf (stream, "\n\
360 The following PPC specific disassembler options are supported for use with\n\
361 the -M switch:\n");
362
363 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
364 fprintf (stream, " e300 Disassemble the e300 instructions\n");
365 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
366 fprintf (stream, " 440 Disassemble the 440 instructions\n");
367 fprintf (stream, " efs Disassemble the EFS instructions\n");
368 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
369 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
370 fprintf (stream, " power6 Disassemble the Power6 instructions\n");
371 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
372 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
373 }
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