1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
27 #include "opcode/ppc.h"
29 /* This file provides several disassembler functions, all of which use
30 the disassembler interface defined in dis-asm.h. Several functions
31 are provided because this file handles disassembly for the PowerPC
32 in both big and little endian mode and also for the POWER (RS/6000)
34 static int print_insn_powerpc (bfd_vma
, struct disassemble_info
*, int,
39 /* Stash the result of parsing disassembler_options here. */
43 #define POWERPC_DIALECT(INFO) \
44 (((struct dis_private *) ((INFO)->private_data))->dialect)
52 struct ppc_mopt ppc_opts
[] = {
53 { "403", (PPC_OPCODE_PPC
| PPC_OPCODE_403
),
55 { "405", (PPC_OPCODE_PPC
| PPC_OPCODE_403
| PPC_OPCODE_405
),
57 { "440", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
58 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
60 { "464", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
61 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
63 { "476", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_440
64 | PPC_OPCODE_476
| PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
),
66 { "601", (PPC_OPCODE_PPC
| PPC_OPCODE_601
),
68 { "603", (PPC_OPCODE_PPC
),
70 { "604", (PPC_OPCODE_PPC
),
72 { "620", (PPC_OPCODE_PPC
| PPC_OPCODE_64
),
74 { "7400", (PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
),
76 { "7410", (PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
),
78 { "7450", (PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
),
80 { "7455", (PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
),
82 { "750cl", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
)
84 { "a2", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_POWER4
85 | PPC_OPCODE_POWER5
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_64
88 { "altivec", (PPC_OPCODE_PPC
),
92 { "booke", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
),
94 { "booke32", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
),
96 { "cell", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
97 | PPC_OPCODE_CELL
| PPC_OPCODE_ALTIVEC
),
99 { "com", (PPC_OPCODE_COMMON
),
101 { "e300", (PPC_OPCODE_PPC
| PPC_OPCODE_E300
),
103 { "e500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
104 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
105 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
108 { "e500mc", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
109 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
110 | PPC_OPCODE_E500MC
),
112 { "e500mc64", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
113 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
114 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER5
115 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
117 { "e5500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
118 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
119 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
120 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
121 | PPC_OPCODE_POWER7
),
123 { "e6500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
124 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
125 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_ALTIVEC
126 | PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_E6500
| PPC_OPCODE_POWER4
127 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
129 { "e500x2", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
130 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
131 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
134 { "efs", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
136 { "power4", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
),
138 { "power5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
139 | PPC_OPCODE_POWER5
),
141 { "power6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
142 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
144 { "power7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
145 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
146 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
148 { "ppc", (PPC_OPCODE_PPC
),
150 { "ppc32", (PPC_OPCODE_PPC
),
152 { "ppc64", (PPC_OPCODE_PPC
| PPC_OPCODE_64
),
154 { "ppc64bridge", (PPC_OPCODE_PPC
| PPC_OPCODE_64_BRIDGE
),
156 { "ppcps", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
),
158 { "pwr", (PPC_OPCODE_POWER
),
160 { "pwr2", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
),
162 { "pwr4", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
),
164 { "pwr5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
165 | PPC_OPCODE_POWER5
),
167 { "pwr5x", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
168 | PPC_OPCODE_POWER5
),
170 { "pwr6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
171 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
173 { "pwr7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
174 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
175 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
177 { "pwrx", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
),
179 { "spe", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
181 { "titan", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_PMR
182 | PPC_OPCODE_RFMCI
| PPC_OPCODE_TITAN
),
184 { "vsx", (PPC_OPCODE_PPC
),
188 /* Handle -m and -M options that set cpu type, and .machine arg. */
191 ppc_parse_cpu (ppc_cpu_t ppc_cpu
, const char *arg
)
194 ppc_cpu_t retain_flags
= ppc_cpu
& (PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
195 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
);
198 for (i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
199 if (strcmp (ppc_opts
[i
].opt
, arg
) == 0)
201 if (ppc_opts
[i
].sticky
)
203 retain_flags
|= ppc_opts
[i
].sticky
;
204 if ((ppc_cpu
& ~(ppc_cpu_t
) (PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
205 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
)) != 0)
208 ppc_cpu
= ppc_opts
[i
].cpu
;
211 if (i
>= sizeof (ppc_opts
) / sizeof (ppc_opts
[0]))
214 ppc_cpu
|= retain_flags
;
218 /* Determine which set of machines to disassemble for. */
221 powerpc_init_dialect (struct disassemble_info
*info
)
223 ppc_cpu_t dialect
= 0;
225 struct dis_private
*priv
= calloc (sizeof (*priv
), 1);
230 arg
= info
->disassembler_options
;
233 ppc_cpu_t new_cpu
= 0;
234 char *end
= strchr (arg
, ',');
239 if ((new_cpu
= ppc_parse_cpu (dialect
, arg
)) != 0)
241 else if (strcmp (arg
, "32") == 0)
242 dialect
&= ~(ppc_cpu_t
) PPC_OPCODE_64
;
243 else if (strcmp (arg
, "64") == 0)
244 dialect
|= PPC_OPCODE_64
;
246 fprintf (stderr
, _("warning: ignoring unknown -M%s option\n"), arg
);
253 if ((dialect
& ~(ppc_cpu_t
) PPC_OPCODE_64
) == 0)
255 if (info
->mach
== bfd_mach_ppc64
)
256 dialect
|= PPC_OPCODE_64
;
258 dialect
&= ~(ppc_cpu_t
) PPC_OPCODE_64
;
259 /* Choose a reasonable default. */
260 dialect
|= (PPC_OPCODE_PPC
| PPC_OPCODE_COMMON
| PPC_OPCODE_601
261 | PPC_OPCODE_ALTIVEC
);
264 info
->private_data
= priv
;
265 POWERPC_DIALECT(info
) = dialect
;
270 /* Print a big endian PowerPC instruction. */
273 print_insn_big_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
275 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
277 return print_insn_powerpc (memaddr
, info
, 1, POWERPC_DIALECT(info
));
280 /* Print a little endian PowerPC instruction. */
283 print_insn_little_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
285 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
287 return print_insn_powerpc (memaddr
, info
, 0, POWERPC_DIALECT(info
));
290 /* Print a POWER (RS/6000) instruction. */
293 print_insn_rs6000 (bfd_vma memaddr
, struct disassemble_info
*info
)
295 return print_insn_powerpc (memaddr
, info
, 1, PPC_OPCODE_POWER
);
298 /* Extract the operand value from the PowerPC or POWER instruction. */
301 operand_value_powerpc (const struct powerpc_operand
*operand
,
302 unsigned long insn
, ppc_cpu_t dialect
)
306 /* Extract the value from the instruction. */
307 if (operand
->extract
)
308 value
= (*operand
->extract
) (insn
, dialect
, &invalid
);
311 value
= (insn
>> operand
->shift
) & operand
->bitm
;
312 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
314 /* BITM is always some number of zeros followed by some
315 number of ones, followed by some numer of zeros. */
316 unsigned long top
= operand
->bitm
;
317 /* top & -top gives the rightmost 1 bit, so this
318 fills in any trailing zeros. */
319 top
|= (top
& -top
) - 1;
321 value
= (value
^ top
) - top
;
328 /* Determine whether the optional operand(s) should be printed. */
331 skip_optional_operands (const unsigned char *opindex
,
332 unsigned long insn
, ppc_cpu_t dialect
)
334 const struct powerpc_operand
*operand
;
336 for (; *opindex
!= 0; opindex
++)
338 operand
= &powerpc_operands
[*opindex
];
339 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0
340 || ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
341 && operand_value_powerpc (operand
, insn
, dialect
) != 0))
348 /* Print a PowerPC or POWER instruction. */
351 print_insn_powerpc (bfd_vma memaddr
,
352 struct disassemble_info
*info
,
359 const struct powerpc_opcode
*opcode
;
360 const struct powerpc_opcode
*opcode_end
;
363 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
366 (*info
->memory_error_func
) (status
, memaddr
, info
);
371 insn
= bfd_getb32 (buffer
);
373 insn
= bfd_getl32 (buffer
);
375 /* Get the major opcode of the instruction. */
378 /* Find the first match in the opcode table. We could speed this up
379 a bit by doing a binary search on the major opcode. */
380 opcode_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
382 for (opcode
= powerpc_opcodes
; opcode
< opcode_end
; opcode
++)
384 unsigned long table_op
;
385 const unsigned char *opindex
;
386 const struct powerpc_operand
*operand
;
392 table_op
= PPC_OP (opcode
->opcode
);
398 if ((insn
& opcode
->mask
) != opcode
->opcode
399 || (opcode
->flags
& dialect
) == 0
400 || (dialect
!= ~(ppc_cpu_t
) PPC_OPCODE_ANY
401 && (opcode
->deprecated
& dialect
) != 0))
404 /* Make two passes over the operands. First see if any of them
405 have extraction functions, and, if they do, make sure the
406 instruction is valid. */
408 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
410 operand
= powerpc_operands
+ *opindex
;
411 if (operand
->extract
)
412 (*operand
->extract
) (insn
, dialect
, &invalid
);
417 /* The instruction is valid. */
418 if (opcode
->operands
[0] != 0)
419 (*info
->fprintf_func
) (info
->stream
, "%-7s ", opcode
->name
);
421 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
423 /* Now extract and print the operands. */
427 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
431 operand
= powerpc_operands
+ *opindex
;
433 /* Operands that are marked FAKE are simply ignored. We
434 already made sure that the extract function considered
435 the instruction to be valid. */
436 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
439 /* If all of the optional operands have the value zero,
440 then don't print any of them. */
441 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
443 if (skip_optional
< 0)
444 skip_optional
= skip_optional_operands (opindex
, insn
,
450 value
= operand_value_powerpc (operand
, insn
, dialect
);
454 (*info
->fprintf_func
) (info
->stream
, ",");
458 /* Print the operand as directed by the flags. */
459 if ((operand
->flags
& PPC_OPERAND_GPR
) != 0
460 || ((operand
->flags
& PPC_OPERAND_GPR_0
) != 0 && value
!= 0))
461 (*info
->fprintf_func
) (info
->stream
, "r%ld", value
);
462 else if ((operand
->flags
& PPC_OPERAND_FPR
) != 0)
463 (*info
->fprintf_func
) (info
->stream
, "f%ld", value
);
464 else if ((operand
->flags
& PPC_OPERAND_VR
) != 0)
465 (*info
->fprintf_func
) (info
->stream
, "v%ld", value
);
466 else if ((operand
->flags
& PPC_OPERAND_VSR
) != 0)
467 (*info
->fprintf_func
) (info
->stream
, "vs%ld", value
);
468 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0)
469 (*info
->print_address_func
) (memaddr
+ value
, info
);
470 else if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
471 (*info
->print_address_func
) ((bfd_vma
) value
& 0xffffffff, info
);
472 else if ((operand
->flags
& PPC_OPERAND_FSL
) != 0)
473 (*info
->fprintf_func
) (info
->stream
, "fsl%ld", value
);
474 else if ((operand
->flags
& PPC_OPERAND_FCR
) != 0)
475 (*info
->fprintf_func
) (info
->stream
, "fcr%ld", value
);
476 else if ((operand
->flags
& PPC_OPERAND_UDI
) != 0)
477 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
478 else if ((operand
->flags
& PPC_OPERAND_CR
) != 0
479 && (dialect
& PPC_OPCODE_PPC
) != 0)
481 if (operand
->bitm
== 7)
482 (*info
->fprintf_func
) (info
->stream
, "cr%ld", value
);
485 static const char *cbnames
[4] = { "lt", "gt", "eq", "so" };
491 (*info
->fprintf_func
) (info
->stream
, "4*cr%d+", cr
);
493 (*info
->fprintf_func
) (info
->stream
, "%s", cbnames
[cc
]);
497 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
501 (*info
->fprintf_func
) (info
->stream
, ")");
505 if ((operand
->flags
& PPC_OPERAND_PARENS
) == 0)
509 (*info
->fprintf_func
) (info
->stream
, "(");
514 /* We have found and printed an instruction; return. */
518 if ((dialect
& PPC_OPCODE_ANY
) != 0)
520 dialect
= ~(ppc_cpu_t
) PPC_OPCODE_ANY
;
524 /* We could not find a match. */
525 (*info
->fprintf_func
) (info
->stream
, ".long 0x%lx", insn
);
531 print_ppc_disassembler_options (FILE *stream
)
535 fprintf (stream
, _("\n\
536 The following PPC specific disassembler options are supported for use with\n\
539 for (col
= 0, i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
541 col
+= fprintf (stream
, " %s,", ppc_opts
[i
].opt
);
544 fprintf (stream
, "\n");
548 fprintf (stream
, " 32, 64\n");
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