opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   3    2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opintl.h"
  27 #include "opcode/ppc.h"
  28
  29 /* This file provides several disassembler functions, all of which use
  30    the disassembler interface defined in dis-asm.h.  Several functions
  31    are provided because this file handles disassembly for the PowerPC
  32    in both big and little endian mode and also for the POWER (RS/6000)
  33    chip.  */
  34 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  35                                ppc_cpu_t);
  36
  37 struct dis_private
  38 {
  39   /* Stash the result of parsing disassembler_options here.  */
  40   ppc_cpu_t dialect;
  41 } private;
  42
  43 #define POWERPC_DIALECT(INFO) \
  44   (((struct dis_private *) ((INFO)->private_data))->dialect)
  45
  46 struct ppc_mopt {
  47   const char *opt;
  48   ppc_cpu_t cpu;
  49   ppc_cpu_t sticky;
  50 };
  51
  52 struct ppc_mopt ppc_opts[] = {
  53   { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_403),
  54     0 },
  55   { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405),
  56     0 },
  57   { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  58                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  59     0 },
  60   { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_440
  61                 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
  62     0 },
  63   { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_440
  64                 | PPC_OPCODE_476 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
  65     0 },
  66   { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_601),
  67     0 },
  68   { "603",     (PPC_OPCODE_PPC),
  69     0 },
  70   { "604",     (PPC_OPCODE_PPC),
  71     0 },
  72   { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_64),
  73     0 },
  74   { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  75     0 },
  76   { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  77     0 },
  78   { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  79     0 },
  80   { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC),
  81     0 },
  82   { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
  83     , 0 },
  84   { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_POWER4
  85                 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK | PPC_OPCODE_64
  86                 | PPC_OPCODE_A2),
  87     0 },
  88   { "altivec", (PPC_OPCODE_PPC),
  89     PPC_OPCODE_ALTIVEC },
  90   { "any",     0,
  91     PPC_OPCODE_ANY },
  92   { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
  93     0 },
  94   { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE),
  95     0 },
  96   { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
  97                 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
  98     0 },
  99   { "com",     (PPC_OPCODE_COMMON),
 100     0 },
 101   { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_E300),
 102     0 },
 103   { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 104                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 105                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 106                 | PPC_OPCODE_E500),
 107     0 },
 108   { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 109                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 110                 | PPC_OPCODE_E500MC),
 111     0 },
 112   { "e500mc64",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 113                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 114                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
 115                 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 116     0 },
 117   { "e5500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 118                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 119                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 120                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 121                 | PPC_OPCODE_POWER7),
 122     0 },
 123   { "e6500",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
 124                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 125                 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
 126                 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
 127                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
 128     0 },
 129   { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
 130                 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
 131                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
 132                 | PPC_OPCODE_E500),
 133     0 },
 134   { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 135     0 },
 136   { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
 137     0 },
 138   { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 139                 | PPC_OPCODE_POWER5),
 140     0 },
 141   { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 142                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 143     0 },
 144   { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 145                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 146                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 147     0 },
 148   { "ppc",     (PPC_OPCODE_PPC),
 149     0 },
 150   { "ppc32",   (PPC_OPCODE_PPC),
 151     0 },
 152   { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_64),
 153     0 },
 154   { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE),
 155     0 },
 156   { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 157     0 },
 158   { "pwr",     (PPC_OPCODE_POWER),
 159     0 },
 160   { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
 161     0 },
 162   { "pwr4",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4),
 163     0 },
 164   { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 165                 | PPC_OPCODE_POWER5),
 166     0 },
 167   { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 168                 | PPC_OPCODE_POWER5),
 169     0 },
 170   { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 171                 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC),
 172     0 },
 173   { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
 174                 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
 175                 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
 176     0 },
 177   { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2),
 178     0 },
 179   { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 180     PPC_OPCODE_SPE },
 181   { "titan",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
 182                 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN),
 183     0 },
 184   { "vsx",     (PPC_OPCODE_PPC),
 185     PPC_OPCODE_VSX },
 186 };
 187
 188 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 189
 190 ppc_cpu_t
 191 ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
 192 {
 193   /* Sticky bits.  */
 194   ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 195                                       | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
 196   unsigned int i;
 197
 198   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 199     if (strcmp (ppc_opts[i].opt, arg) == 0)
 200       {
 201         if (ppc_opts[i].sticky)
 202           {
 203             retain_flags |= ppc_opts[i].sticky;
 204             if ((ppc_cpu & ~(ppc_cpu_t) (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
 205                                          | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
 206               break;
 207           }
 208         ppc_cpu = ppc_opts[i].cpu;
 209         break;
 210       }
 211   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
 212     return 0;
 213
 214   ppc_cpu |= retain_flags;
 215   return ppc_cpu;
 216 }
 217
 218 /* Determine which set of machines to disassemble for.  */
 219
 220 static void
 221 powerpc_init_dialect (struct disassemble_info *info)
 222 {
 223   ppc_cpu_t dialect = 0;
 224   char *arg;
 225   struct dis_private *priv = calloc (sizeof (*priv), 1);
 226
 227   if (priv == NULL)
 228     priv = &private;
 229
 230   arg = info->disassembler_options;
 231   while (arg != NULL)
 232     {
 233       ppc_cpu_t new_cpu = 0;
 234       char *end = strchr (arg, ',');
 235
 236       if (end != NULL)
 237         *end = 0;
 238
 239       if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
 240         dialect = new_cpu;
 241       else if (strcmp (arg, "32") == 0)
 242         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 243       else if (strcmp (arg, "64") == 0)
 244         dialect |= PPC_OPCODE_64;
 245       else
 246         fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 247
 248       if (end != NULL)
 249         *end++ = ',';
 250       arg = end;
 251     }
 252
 253   if ((dialect & ~(ppc_cpu_t) PPC_OPCODE_64) == 0)
 254     {
 255       if (info->mach == bfd_mach_ppc64)
 256         dialect |= PPC_OPCODE_64;
 257       else
 258         dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
 259       /* Choose a reasonable default.  */
 260       dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
 261                   | PPC_OPCODE_ALTIVEC);
 262     }
 263
 264   info->private_data = priv;
 265   POWERPC_DIALECT(info) = dialect;
 266 }
 267
 268 #define PPC_OPCD_SEGS 64
 269 #define PPC_OP_TO_SEG(i) (i)
 270 static unsigned short powerpc_opcd_indices[PPC_OPCD_SEGS];
 271
 272 /* Calculate opcode table indices to speed up disassembly,
 273    and init dialect.  */
 274
 275 void
 276 disassemble_init_powerpc (struct disassemble_info *info)
 277 {
 278   int i;
 279
 280   for (i = 0; i < PPC_OPCD_SEGS; ++i)
 281     powerpc_opcd_indices[i] = powerpc_num_opcodes;
 282
 283   i = powerpc_num_opcodes;
 284   while (--i >= 0)
 285     {
 286       unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
 287       unsigned seg = PPC_OP_TO_SEG (op);
 288
 289       powerpc_opcd_indices[seg] = i;
 290     }
 291
 292   if (info->arch == bfd_arch_powerpc)
 293     powerpc_init_dialect (info);
 294 }
 295
 296 /* Print a big endian PowerPC instruction.  */
 297
 298 int
 299 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 300 {
 301   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 302 }
 303
 304 /* Print a little endian PowerPC instruction.  */
 305
 306 int
 307 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 308 {
 309   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 310 }
 311
 312 /* Print a POWER (RS/6000) instruction.  */
 313
 314 int
 315 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 316 {
 317   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 318 }
 319
 320 /* Extract the operand value from the PowerPC or POWER instruction.  */
 321
 322 static long
 323 operand_value_powerpc (const struct powerpc_operand *operand,
 324                        unsigned long insn, ppc_cpu_t dialect)
 325 {
 326   long value;
 327   int invalid;
 328   /* Extract the value from the instruction.  */
 329   if (operand->extract)
 330     value = (*operand->extract) (insn, dialect, &invalid);
 331   else
 332     {
 333       value = (insn >> operand->shift) & operand->bitm;
 334       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 335         {
 336           /* BITM is always some number of zeros followed by some
 337              number of ones, followed by some numer of zeros.  */
 338           unsigned long top = operand->bitm;
 339           /* top & -top gives the rightmost 1 bit, so this
 340              fills in any trailing zeros.  */
 341           top |= (top & -top) - 1;
 342           top &= ~(top >> 1);
 343           value = (value ^ top) - top;
 344         }
 345     }
 346
 347   return value;
 348 }
 349
 350 /* Determine whether the optional operand(s) should be printed.  */
 351
 352 static int
 353 skip_optional_operands (const unsigned char *opindex,
 354                         unsigned long insn, ppc_cpu_t dialect)
 355 {
 356   const struct powerpc_operand *operand;
 357
 358   for (; *opindex != 0; opindex++)
 359     {
 360       operand = &powerpc_operands[*opindex];
 361       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 362           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 363               && operand_value_powerpc (operand, insn, dialect) != 0))
 364         return 0;
 365     }
 366
 367   return 1;
 368 }
 369
 370 /* Print a PowerPC or POWER instruction.  */
 371
 372 static int
 373 print_insn_powerpc (bfd_vma memaddr,
 374                     struct disassemble_info *info,
 375                     int bigendian,
 376                     ppc_cpu_t dialect)
 377 {
 378   bfd_byte buffer[4];
 379   int status;
 380   unsigned long insn;
 381   const struct powerpc_opcode *opcode;
 382   const struct powerpc_opcode *opcode_end;
 383   unsigned long op;
 384
 385   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 386   if (status != 0)
 387     {
 388       (*info->memory_error_func) (status, memaddr, info);
 389       return -1;
 390     }
 391
 392   if (bigendian)
 393     insn = bfd_getb32 (buffer);
 394   else
 395     insn = bfd_getl32 (buffer);
 396
 397   /* Get the major opcode of the instruction.  */
 398   op = PPC_OP (insn);
 399
 400   /* Find the first match in the opcode table.
 401      We speed this up by segmenting the opcode table and starting the search
 402      at one of the segment boundaries.  */
 403   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 404  again:
 405   for (opcode = powerpc_opcodes + powerpc_opcd_indices[PPC_OP_TO_SEG (op)];
 406        opcode < opcode_end;
 407        ++opcode)
 408     {
 409       unsigned long table_op;
 410       const unsigned char *opindex;
 411       const struct powerpc_operand *operand;
 412       int invalid;
 413       int need_comma;
 414       int need_paren;
 415       int skip_optional;
 416
 417       table_op = PPC_OP (opcode->opcode);
 418       if (op > table_op)
 419         continue;
 420       if (op < table_op)
 421         break;
 422
 423       if ((insn & opcode->mask) != opcode->opcode
 424           || (opcode->flags & dialect) == 0
 425           || (dialect != ~(ppc_cpu_t) PPC_OPCODE_ANY
 426               && (opcode->deprecated & dialect) != 0))
 427         continue;
 428
 429       /* Make two passes over the operands.  First see if any of them
 430          have extraction functions, and, if they do, make sure the
 431          instruction is valid.  */
 432       invalid = 0;
 433       for (opindex = opcode->operands; *opindex != 0; opindex++)
 434         {
 435           operand = powerpc_operands + *opindex;
 436           if (operand->extract)
 437             (*operand->extract) (insn, dialect, &invalid);
 438         }
 439       if (invalid)
 440         continue;
 441
 442       /* The instruction is valid.  */
 443       if (opcode->operands[0] != 0)
 444         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 445       else
 446         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 447
 448       /* Now extract and print the operands.  */
 449       need_comma = 0;
 450       need_paren = 0;
 451       skip_optional = -1;
 452       for (opindex = opcode->operands; *opindex != 0; opindex++)
 453         {
 454           long value;
 455
 456           operand = powerpc_operands + *opindex;
 457
 458           /* Operands that are marked FAKE are simply ignored.  We
 459              already made sure that the extract function considered
 460              the instruction to be valid.  */
 461           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 462             continue;
 463
 464           /* If all of the optional operands have the value zero,
 465              then don't print any of them.  */
 466           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 467             {
 468               if (skip_optional < 0)
 469                 skip_optional = skip_optional_operands (opindex, insn,
 470                                                         dialect);
 471               if (skip_optional)
 472                 continue;
 473             }
 474
 475           value = operand_value_powerpc (operand, insn, dialect);
 476
 477           if (need_comma)
 478             {
 479               (*info->fprintf_func) (info->stream, ",");
 480               need_comma = 0;
 481             }
 482
 483           /* Print the operand as directed by the flags.  */
 484           if ((operand->flags & PPC_OPERAND_GPR) != 0
 485               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 486             (*info->fprintf_func) (info->stream, "r%ld", value);
 487           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 488             (*info->fprintf_func) (info->stream, "f%ld", value);
 489           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 490             (*info->fprintf_func) (info->stream, "v%ld", value);
 491           else if ((operand->flags & PPC_OPERAND_VSR) != 0)
 492             (*info->fprintf_func) (info->stream, "vs%ld", value);
 493           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 494             (*info->print_address_func) (memaddr + value, info);
 495           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 496             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 497           else if ((operand->flags & PPC_OPERAND_FSL) != 0)
 498             (*info->fprintf_func) (info->stream, "fsl%ld", value);
 499           else if ((operand->flags & PPC_OPERAND_FCR) != 0)
 500             (*info->fprintf_func) (info->stream, "fcr%ld", value);
 501           else if ((operand->flags & PPC_OPERAND_UDI) != 0)
 502             (*info->fprintf_func) (info->stream, "%ld", value);
 503           else if ((operand->flags & PPC_OPERAND_CR) != 0
 504                    && (dialect & PPC_OPCODE_PPC) != 0)
 505             {
 506               if (operand->bitm == 7)
 507                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 508               else
 509                 {
 510                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 511                   int cr;
 512                   int cc;
 513
 514                   cr = value >> 2;
 515                   if (cr != 0)
 516                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 517                   cc = value & 3;
 518                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 519                 }
 520             }
 521           else
 522             (*info->fprintf_func) (info->stream, "%ld", value);
 523
 524           if (need_paren)
 525             {
 526               (*info->fprintf_func) (info->stream, ")");
 527               need_paren = 0;
 528             }
 529
 530           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 531             need_comma = 1;
 532           else
 533             {
 534               (*info->fprintf_func) (info->stream, "(");
 535               need_paren = 1;
 536             }
 537         }
 538
 539       /* We have found and printed an instruction; return.  */
 540       return 4;
 541     }
 542
 543   if ((dialect & PPC_OPCODE_ANY) != 0)
 544     {
 545       dialect = ~(ppc_cpu_t) PPC_OPCODE_ANY;
 546       goto again;
 547     }
 548
 549   /* We could not find a match.  */
 550   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 551
 552   return 4;
 553 }
 554
 555 void
 556 print_ppc_disassembler_options (FILE *stream)
 557 {
 558   unsigned int i, col;
 559
 560   fprintf (stream, _("\n\
 561 The following PPC specific disassembler options are supported for use with\n\
 562 the -M switch:\n"));
 563
 564   for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
 565     {
 566       col += fprintf (stream, " %s,", ppc_opts[i].opt);
 567       if (col > 66)
 568         {
 569           fprintf (stream, "\n");
 570           col = 0;
 571         }
 572     }
 573   fprintf (stream, " 32, 64\n");
 574 }