include/opcode/
[deliverable/binutils-gdb.git] / opcodes / ppc-dis.c
1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
5
6 This file is part of GDB, GAS, and the GNU binutils.
7
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 2, or (at your option) any later version.
12
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
21
22 #include <stdio.h>
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "opcode/ppc.h"
26
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
31 chip. */
32
33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
34
35 /* Determine which set of machines to disassemble for. PPC403/601 or
36 BookE. For convenience, also disassemble instructions supported
37 by the AltiVec vector unit. */
38
39 static int
40 powerpc_dialect (struct disassemble_info *info)
41 {
42 int dialect = PPC_OPCODE_PPC;
43
44 if (BFD_DEFAULT_TARGET_SIZE == 64)
45 dialect |= PPC_OPCODE_64;
46
47 if (info->disassembler_options
48 && strstr (info->disassembler_options, "booke") != NULL)
49 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
50 else if ((info->mach == bfd_mach_ppc_e500)
51 || (info->disassembler_options
52 && strstr (info->disassembler_options, "e500") != NULL))
53 dialect |= (PPC_OPCODE_BOOKE
54 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
55 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
56 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
57 | PPC_OPCODE_RFMCI);
58 else if (info->disassembler_options
59 && strstr (info->disassembler_options, "efs") != NULL)
60 dialect |= PPC_OPCODE_EFS;
61 else if (info->disassembler_options
62 && strstr (info->disassembler_options, "e300") != NULL)
63 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
64 else if (info->disassembler_options
65 && strstr (info->disassembler_options, "440") != NULL)
66 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
67 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
68 else
69 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
70 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
71
72 if (info->disassembler_options
73 && strstr (info->disassembler_options, "power4") != NULL)
74 dialect |= PPC_OPCODE_POWER4;
75
76 if (info->disassembler_options
77 && strstr (info->disassembler_options, "power5") != NULL)
78 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
79
80 if (info->disassembler_options
81 && strstr (info->disassembler_options, "cell") != NULL)
82 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
83
84 if (info->disassembler_options
85 && strstr (info->disassembler_options, "power6") != NULL)
86 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
87
88 if (info->disassembler_options
89 && strstr (info->disassembler_options, "any") != NULL)
90 dialect |= PPC_OPCODE_ANY;
91
92 if (info->disassembler_options)
93 {
94 if (strstr (info->disassembler_options, "32") != NULL)
95 dialect &= ~PPC_OPCODE_64;
96 else if (strstr (info->disassembler_options, "64") != NULL)
97 dialect |= PPC_OPCODE_64;
98 }
99
100 info->private_data = (char *) 0 + dialect;
101 return dialect;
102 }
103
104 /* Print a big endian PowerPC instruction. */
105
106 int
107 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
108 {
109 int dialect = (char *) info->private_data - (char *) 0;
110 return print_insn_powerpc (memaddr, info, 1, dialect);
111 }
112
113 /* Print a little endian PowerPC instruction. */
114
115 int
116 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
117 {
118 int dialect = (char *) info->private_data - (char *) 0;
119 return print_insn_powerpc (memaddr, info, 0, dialect);
120 }
121
122 /* Print a POWER (RS/6000) instruction. */
123
124 int
125 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
126 {
127 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
128 }
129
130 /* Print a PowerPC or POWER instruction. */
131
132 static int
133 print_insn_powerpc (bfd_vma memaddr,
134 struct disassemble_info *info,
135 int bigendian,
136 int dialect)
137 {
138 bfd_byte buffer[4];
139 int status;
140 unsigned long insn;
141 const struct powerpc_opcode *opcode;
142 const struct powerpc_opcode *opcode_end;
143 unsigned long op;
144
145 if (dialect == 0)
146 dialect = powerpc_dialect (info);
147
148 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
149 if (status != 0)
150 {
151 (*info->memory_error_func) (status, memaddr, info);
152 return -1;
153 }
154
155 if (bigendian)
156 insn = bfd_getb32 (buffer);
157 else
158 insn = bfd_getl32 (buffer);
159
160 /* Get the major opcode of the instruction. */
161 op = PPC_OP (insn);
162
163 /* Find the first match in the opcode table. We could speed this up
164 a bit by doing a binary search on the major opcode. */
165 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
166 again:
167 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
168 {
169 unsigned long table_op;
170 const unsigned char *opindex;
171 const struct powerpc_operand *operand;
172 int invalid;
173 int need_comma;
174 int need_paren;
175
176 table_op = PPC_OP (opcode->opcode);
177 if (op < table_op)
178 break;
179 if (op > table_op)
180 continue;
181
182 if ((insn & opcode->mask) != opcode->opcode
183 || (opcode->flags & dialect) == 0)
184 continue;
185
186 /* Make two passes over the operands. First see if any of them
187 have extraction functions, and, if they do, make sure the
188 instruction is valid. */
189 invalid = 0;
190 for (opindex = opcode->operands; *opindex != 0; opindex++)
191 {
192 operand = powerpc_operands + *opindex;
193 if (operand->extract)
194 (*operand->extract) (insn, dialect, &invalid);
195 }
196 if (invalid)
197 continue;
198
199 /* The instruction is valid. */
200 if (opcode->operands[0] != 0)
201 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
202 else
203 (*info->fprintf_func) (info->stream, "%s", opcode->name);
204
205 /* Now extract and print the operands. */
206 need_comma = 0;
207 need_paren = 0;
208 for (opindex = opcode->operands; *opindex != 0; opindex++)
209 {
210 long value;
211
212 operand = powerpc_operands + *opindex;
213
214 /* Operands that are marked FAKE are simply ignored. We
215 already made sure that the extract function considered
216 the instruction to be valid. */
217 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
218 continue;
219
220 /* Extract the value from the instruction. */
221 if (operand->extract)
222 value = (*operand->extract) (insn, dialect, &invalid);
223 else
224 {
225 value = (insn >> operand->shift) & operand->bitm;
226 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
227 {
228 /* BITM is always some number of zeros followed by some
229 number of ones, followed by some numer of zeros. */
230 unsigned long top = operand->bitm;
231 /* top & -top gives the rightmost 1 bit, so this
232 fills in any trailing zeros. */
233 top |= (top & -top) - 1;
234 top &= ~(top >> 1);
235 value = (value ^ top) - top;
236 }
237 }
238
239 /* If the operand is optional, and the value is zero, don't
240 print anything. */
241 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
242 && (operand->flags & PPC_OPERAND_NEXT) == 0
243 && value == 0)
244 continue;
245
246 if (need_comma)
247 {
248 (*info->fprintf_func) (info->stream, ",");
249 need_comma = 0;
250 }
251
252 /* Print the operand as directed by the flags. */
253 if ((operand->flags & PPC_OPERAND_GPR) != 0
254 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
255 (*info->fprintf_func) (info->stream, "r%ld", value);
256 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
257 (*info->fprintf_func) (info->stream, "f%ld", value);
258 else if ((operand->flags & PPC_OPERAND_VR) != 0)
259 (*info->fprintf_func) (info->stream, "v%ld", value);
260 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
261 (*info->print_address_func) (memaddr + value, info);
262 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
263 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
264 else if ((operand->flags & PPC_OPERAND_CR) == 0
265 || (dialect & PPC_OPCODE_PPC) == 0)
266 (*info->fprintf_func) (info->stream, "%ld", value);
267 else
268 {
269 if (operand->bitm == 7)
270 (*info->fprintf_func) (info->stream, "cr%ld", value);
271 else
272 {
273 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
274 int cr;
275 int cc;
276
277 cr = value >> 2;
278 if (cr != 0)
279 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
280 cc = value & 3;
281 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
282 }
283 }
284
285 if (need_paren)
286 {
287 (*info->fprintf_func) (info->stream, ")");
288 need_paren = 0;
289 }
290
291 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
292 need_comma = 1;
293 else
294 {
295 (*info->fprintf_func) (info->stream, "(");
296 need_paren = 1;
297 }
298 }
299
300 /* We have found and printed an instruction; return. */
301 return 4;
302 }
303
304 if ((dialect & PPC_OPCODE_ANY) != 0)
305 {
306 dialect = ~PPC_OPCODE_ANY;
307 goto again;
308 }
309
310 /* We could not find a match. */
311 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
312
313 return 4;
314 }
315
316 void
317 print_ppc_disassembler_options (FILE *stream)
318 {
319 fprintf (stream, "\n\
320 The following PPC specific disassembler options are supported for use with\n\
321 the -M switch:\n");
322
323 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
324 fprintf (stream, " e300 Disassemble the e300 instructions\n");
325 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
326 fprintf (stream, " 440 Disassemble the 440 instructions\n");
327 fprintf (stream, " efs Disassemble the EFS instructions\n");
328 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
329 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
330 fprintf (stream, " power6 Disassemble the Power6 instructions\n");
331 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
332 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
333 }
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