opcodes/ppc-dis.c

   1 /* ppc-dis.c -- Disassemble PowerPC instructions
   2    Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
   3    Free Software Foundation, Inc.
   4    Written by Ian Lance Taylor, Cygnus Support
   5
   6    This file is part of the GNU opcodes library.
   7
   8    This library is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3, or (at your option)
  11    any later version.
  12
  13    It is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this file; see the file COPYING.  If not, write to the
  20    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
  21    MA 02110-1301, USA.  */
  22
  23 #include <stdio.h>
  24 #include "sysdep.h"
  25 #include "dis-asm.h"
  26 #include "opcode/ppc.h"
  27
  28 /* This file provides several disassembler functions, all of which use
  29    the disassembler interface defined in dis-asm.h.  Several functions
  30    are provided because this file handles disassembly for the PowerPC
  31    in both big and little endian mode and also for the POWER (RS/6000)
  32    chip.  */
  33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
  34                                ppc_cpu_t);
  35
  36 struct dis_private
  37 {
  38   /* Stash the result of parsing disassembler_options here.  */
  39   ppc_cpu_t dialect;
  40 };
  41
  42 #define POWERPC_DIALECT(INFO) \
  43   (((struct dis_private *) ((INFO)->private_data))->dialect)
  44
  45 /* Determine which set of machines to disassemble for.  PPC403/601 or
  46    BookE.  For convenience, also disassemble instructions supported
  47    by the AltiVec vector unit.  */
  48
  49 static int
  50 powerpc_init_dialect (struct disassemble_info *info)
  51 {
  52   ppc_cpu_t dialect = PPC_OPCODE_PPC;
  53   struct dis_private *priv = calloc (sizeof (*priv), 1);
  54
  55   if (priv == NULL)
  56     return FALSE;
  57
  58   if (BFD_DEFAULT_TARGET_SIZE == 64)
  59     dialect |= PPC_OPCODE_64;
  60
  61   if (info->disassembler_options
  62       && strstr (info->disassembler_options, "ppcps") != NULL)
  63     dialect |= PPC_OPCODE_PPCPS;
  64   else if (info->disassembler_options
  65       && strstr (info->disassembler_options, "booke") != NULL)
  66     dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
  67   else if ((info->mach == bfd_mach_ppc_e500mc)
  68            || (info->disassembler_options
  69                && strstr (info->disassembler_options, "e500mc") != NULL))
  70     dialect |= (PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
  71                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
  72                 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
  73   else if ((info->mach == bfd_mach_ppc_e500)
  74            || (info->disassembler_options
  75                && strstr (info->disassembler_options, "e500") != NULL))
  76     dialect |= (PPC_OPCODE_BOOKE
  77                 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
  78                 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
  79                 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
  80                 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
  81   else if (info->disassembler_options
  82            && strstr (info->disassembler_options, "efs") != NULL)
  83     dialect |= PPC_OPCODE_EFS;
  84   else if (info->disassembler_options
  85            && strstr (info->disassembler_options, "e300") != NULL)
  86     dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
  87   else if (info->disassembler_options
  88            && strstr (info->disassembler_options, "440") != NULL)
  89     dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_32
  90       | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI;
  91   else
  92     dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
  93                 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
  94
  95   if (info->disassembler_options
  96       && strstr (info->disassembler_options, "power4") != NULL)
  97     dialect |= PPC_OPCODE_POWER4;
  98
  99   if (info->disassembler_options
 100       && strstr (info->disassembler_options, "power5") != NULL)
 101     dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
 102
 103   if (info->disassembler_options
 104       && strstr (info->disassembler_options, "cell") != NULL)
 105     dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
 106
 107   if (info->disassembler_options
 108       && strstr (info->disassembler_options, "power6") != NULL)
 109     dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
 110
 111   if (info->disassembler_options
 112       && strstr (info->disassembler_options, "any") != NULL)
 113     dialect |= PPC_OPCODE_ANY;
 114
 115   if (info->disassembler_options)
 116     {
 117       if (strstr (info->disassembler_options, "32") != NULL)
 118         dialect &= ~PPC_OPCODE_64;
 119       else if (strstr (info->disassembler_options, "64") != NULL)
 120         dialect |= PPC_OPCODE_64;
 121     }
 122
 123   info->private_data = priv;
 124   POWERPC_DIALECT(info) = dialect;
 125
 126   return TRUE;
 127 }
 128
 129 /* Print a big endian PowerPC instruction.  */
 130
 131 int
 132 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 133 {
 134   if (info->private_data == NULL && !powerpc_init_dialect (info))
 135     return -1;
 136   return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
 137 }
 138
 139 /* Print a little endian PowerPC instruction.  */
 140
 141 int
 142 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
 143 {
 144   if (info->private_data == NULL && !powerpc_init_dialect (info))
 145     return -1;
 146   return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
 147 }
 148
 149 /* Print a POWER (RS/6000) instruction.  */
 150
 151 int
 152 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 153 {
 154   return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
 155 }
 156
 157 /* Extract the operand value from the PowerPC or POWER instruction.  */
 158
 159 static long
 160 operand_value_powerpc (const struct powerpc_operand *operand,
 161                        unsigned long insn, ppc_cpu_t dialect)
 162 {
 163   long value;
 164   int invalid;
 165   /* Extract the value from the instruction.  */
 166   if (operand->extract)
 167     value = (*operand->extract) (insn, dialect, &invalid);
 168   else
 169     {
 170       value = (insn >> operand->shift) & operand->bitm;
 171       if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
 172         {
 173           /* BITM is always some number of zeros followed by some
 174              number of ones, followed by some numer of zeros.  */
 175           unsigned long top = operand->bitm;
 176           /* top & -top gives the rightmost 1 bit, so this
 177              fills in any trailing zeros.  */
 178           top |= (top & -top) - 1;
 179           top &= ~(top >> 1);
 180           value = (value ^ top) - top;
 181         }
 182     }
 183
 184   return value;
 185 }
 186
 187 /* Determine whether the optional operand(s) should be printed.  */
 188
 189 static int
 190 skip_optional_operands (const unsigned char *opindex,
 191                         unsigned long insn, ppc_cpu_t dialect)
 192 {
 193   const struct powerpc_operand *operand;
 194
 195   for (; *opindex != 0; opindex++)
 196     {
 197       operand = &powerpc_operands[*opindex];
 198       if ((operand->flags & PPC_OPERAND_NEXT) != 0
 199           || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
 200               && operand_value_powerpc (operand, insn, dialect) != 0))
 201         return 0;
 202     }
 203
 204   return 1;
 205 }
 206
 207 /* Print a PowerPC or POWER instruction.  */
 208
 209 static int
 210 print_insn_powerpc (bfd_vma memaddr,
 211                     struct disassemble_info *info,
 212                     int bigendian,
 213                     ppc_cpu_t dialect)
 214 {
 215   bfd_byte buffer[4];
 216   int status;
 217   unsigned long insn;
 218   const struct powerpc_opcode *opcode;
 219   const struct powerpc_opcode *opcode_end;
 220   unsigned long op;
 221
 222   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 223   if (status != 0)
 224     {
 225       (*info->memory_error_func) (status, memaddr, info);
 226       return -1;
 227     }
 228
 229   if (bigendian)
 230     insn = bfd_getb32 (buffer);
 231   else
 232     insn = bfd_getl32 (buffer);
 233
 234   /* Get the major opcode of the instruction.  */
 235   op = PPC_OP (insn);
 236
 237   /* Find the first match in the opcode table.  We could speed this up
 238      a bit by doing a binary search on the major opcode.  */
 239   opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 240  again:
 241   for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
 242     {
 243       unsigned long table_op;
 244       const unsigned char *opindex;
 245       const struct powerpc_operand *operand;
 246       int invalid;
 247       int need_comma;
 248       int need_paren;
 249       int skip_optional;
 250
 251       table_op = PPC_OP (opcode->opcode);
 252       if (op < table_op)
 253         break;
 254       if (op > table_op)
 255         continue;
 256
 257       if ((insn & opcode->mask) != opcode->opcode
 258           || (opcode->flags & dialect) == 0)
 259         continue;
 260
 261       /* Make two passes over the operands.  First see if any of them
 262          have extraction functions, and, if they do, make sure the
 263          instruction is valid.  */
 264       invalid = 0;
 265       for (opindex = opcode->operands; *opindex != 0; opindex++)
 266         {
 267           operand = powerpc_operands + *opindex;
 268           if (operand->extract)
 269             (*operand->extract) (insn, dialect, &invalid);
 270         }
 271       if (invalid)
 272         continue;
 273
 274       /* The instruction is valid.  */
 275       if (opcode->operands[0] != 0)
 276         (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
 277       else
 278         (*info->fprintf_func) (info->stream, "%s", opcode->name);
 279
 280       /* Now extract and print the operands.  */
 281       need_comma = 0;
 282       need_paren = 0;
 283       skip_optional = -1;
 284       for (opindex = opcode->operands; *opindex != 0; opindex++)
 285         {
 286           long value;
 287
 288           operand = powerpc_operands + *opindex;
 289
 290           /* Operands that are marked FAKE are simply ignored.  We
 291              already made sure that the extract function considered
 292              the instruction to be valid.  */
 293           if ((operand->flags & PPC_OPERAND_FAKE) != 0)
 294             continue;
 295
 296           /* If all of the optional operands have the value zero,
 297              then don't print any of them.  */
 298           if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 299             {
 300               if (skip_optional < 0)
 301                 skip_optional = skip_optional_operands (opindex, insn,
 302                                                         dialect);
 303               if (skip_optional)
 304                 continue;
 305             }
 306
 307           value = operand_value_powerpc (operand, insn, dialect);
 308
 309           if (need_comma)
 310             {
 311               (*info->fprintf_func) (info->stream, ",");
 312               need_comma = 0;
 313             }
 314
 315           /* Print the operand as directed by the flags.  */
 316           if ((operand->flags & PPC_OPERAND_GPR) != 0
 317               || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
 318             (*info->fprintf_func) (info->stream, "r%ld", value);
 319           else if ((operand->flags & PPC_OPERAND_FPR) != 0)
 320             (*info->fprintf_func) (info->stream, "f%ld", value);
 321           else if ((operand->flags & PPC_OPERAND_VR) != 0)
 322             (*info->fprintf_func) (info->stream, "v%ld", value);
 323           else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 324             (*info->print_address_func) (memaddr + value, info);
 325           else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 326             (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 327           else if ((operand->flags & PPC_OPERAND_CR) == 0
 328                    || (dialect & PPC_OPCODE_PPC) == 0)
 329             (*info->fprintf_func) (info->stream, "%ld", value);
 330           else
 331             {
 332               if (operand->bitm == 7)
 333                 (*info->fprintf_func) (info->stream, "cr%ld", value);
 334               else
 335                 {
 336                   static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
 337                   int cr;
 338                   int cc;
 339
 340                   cr = value >> 2;
 341                   if (cr != 0)
 342                     (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
 343                   cc = value & 3;
 344                   (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 345                 }
 346             }
 347
 348           if (need_paren)
 349             {
 350               (*info->fprintf_func) (info->stream, ")");
 351               need_paren = 0;
 352             }
 353
 354           if ((operand->flags & PPC_OPERAND_PARENS) == 0)
 355             need_comma = 1;
 356           else
 357             {
 358               (*info->fprintf_func) (info->stream, "(");
 359               need_paren = 1;
 360             }
 361         }
 362
 363       /* We have found and printed an instruction; return.  */
 364       return 4;
 365     }
 366
 367   if ((dialect & PPC_OPCODE_ANY) != 0)
 368     {
 369       dialect = ~PPC_OPCODE_ANY;
 370       goto again;
 371     }
 372
 373   /* We could not find a match.  */
 374   (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 375
 376   return 4;
 377 }
 378
 379 void
 380 print_ppc_disassembler_options (FILE *stream)
 381 {
 382   fprintf (stream, "\n\
 383 The following PPC specific disassembler options are supported for use with\n\
 384 the -M switch:\n");
 385
 386   fprintf (stream, "  booke|booke32|booke64    Disassemble the BookE instructions\n");
 387   fprintf (stream, "  e300                     Disassemble the e300 instructions\n");
 388   fprintf (stream, "  e500|e500x2              Disassemble the e500 instructions\n");
 389   fprintf (stream, "  e500mc                   Disassemble the e500mc instructions\n");
 390   fprintf (stream, "  440                      Disassemble the 440 instructions\n");
 391   fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
 392   fprintf (stream, "  ppcps                    Disassemble the PowerPC paired singles instructions\n");
 393   fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
 394   fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
 395   fprintf (stream, "  power6                   Disassemble the Power6 instructions\n");
 396   fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
 397   fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
 398 }