opcodes/tic4x-dis.c

   1 /* Print instructions for the Texas TMS320C[34]X, for GDB and GNU Binutils.
   2
   3    Copyright 2002 Free Software Foundation, Inc.
   4
   5    Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #include <math.h>
  22 #include "libiberty.h"
  23 #include "dis-asm.h"
  24 #include "opcode/tic4x.h"
  25
  26 #define C4X_DEBUG 0
  27
  28 #define C4X_HASH_SIZE 11 /* 11 and above should give unique entries.  */
  29
  30 typedef enum
  31   {
  32     IMMED_SINT,
  33     IMMED_SUINT,
  34     IMMED_SFLOAT,
  35     IMMED_INT,
  36     IMMED_UINT,
  37     IMMED_FLOAT
  38   }
  39 immed_t;
  40
  41 typedef enum
  42   {
  43     INDIRECT_SHORT,
  44     INDIRECT_LONG,
  45     INDIRECT_C4X
  46   }
  47 indirect_t;
  48
  49 static int c4x_version = 0;
  50 static int c4x_dp = 0;
  51
  52 static int c4x_pc_offset
  53     PARAMS ((unsigned int));
  54 static int c4x_print_char
  55     PARAMS ((struct disassemble_info *, char));
  56 static int c4x_print_str
  57     PARAMS ((struct disassemble_info *, char *));
  58 static int c4x_print_register
  59     PARAMS ((struct disassemble_info *, unsigned long));
  60 static int c4x_print_addr
  61     PARAMS ((struct disassemble_info *, unsigned long));
  62 static int c4x_print_relative
  63     PARAMS ((struct disassemble_info *, unsigned long, long, unsigned long));
  64 void c4x_print_ftoa
  65     PARAMS ((unsigned int, FILE *, fprintf_ftype));
  66 static int c4x_print_direct
  67     PARAMS ((struct disassemble_info *, unsigned long));
  68 static int c4x_print_immed
  69     PARAMS ((struct disassemble_info *, immed_t, unsigned long));
  70 static int c4x_print_cond
  71     PARAMS ((struct disassemble_info *, unsigned int));
  72 static int c4x_print_indirect
  73     PARAMS ((struct disassemble_info *, indirect_t, unsigned long));
  74 static int c4x_print_op
  75     PARAMS ((struct disassemble_info *, unsigned long, c4x_inst_t *, unsigned long));
  76 static void c4x_hash_opcode
  77     PARAMS ((c4x_inst_t **, const c4x_inst_t *));
  78 static int c4x_disassemble
  79     PARAMS ((unsigned long, unsigned long, struct disassemble_info *));
  80 int print_insn_tic4x
  81     PARAMS ((bfd_vma, struct disassemble_info *));
  82
  83
  84 static int
  85 c4x_pc_offset (op)
  86      unsigned int op;
  87 {
  88   /* Determine the PC offset for a C[34]x instruction.
  89      This could be simplified using some boolean algebra
  90      but at the expense of readability.  */
  91   switch (op >> 24)
  92     {
  93     case 0x60:  /* br */
  94     case 0x62:  /* call  (C4x) */
  95     case 0x64:  /* rptb  (C4x) */
  96       return 1;
  97     case 0x61:  /* brd */
  98     case 0x63:  /* laj */
  99     case 0x65:  /* rptbd (C4x) */
 100       return 3;
 101     case 0x66:  /* swi */
 102     case 0x67:
 103       return 0;
 104     default:
 105       break;
 106     }
 107
 108   switch ((op & 0xffe00000) >> 20)
 109     {
 110     case 0x6a0: /* bB */
 111     case 0x720: /* callB */
 112     case 0x740: /* trapB */
 113       return 1;
 114
 115     case 0x6a2: /* bBd */
 116     case 0x6a6: /* bBat */
 117     case 0x6aa: /* bBaf */
 118     case 0x722: /* lajB */
 119     case 0x748: /* latB */
 120     case 0x798: /* rptbd */
 121       return 3;
 122
 123     default:
 124       break;
 125     }
 126
 127   switch ((op & 0xfe200000) >> 20)
 128     {
 129     case 0x6e0: /* dbB */
 130       return 1;
 131
 132     case 0x6e2: /* dbBd */
 133       return 3;
 134
 135     default:
 136       break;
 137     }
 138
 139   return 0;
 140 }
 141
 142 static int
 143 c4x_print_char (info, ch)
 144      struct disassemble_info * info;
 145      char ch;
 146 {
 147   if (info != NULL)
 148     (*info->fprintf_func) (info->stream, "%c", ch);
 149   return 1;
 150 }
 151
 152 static int
 153 c4x_print_str (info, str)
 154      struct disassemble_info *info;
 155      char *str;
 156 {
 157   if (info != NULL)
 158     (*info->fprintf_func) (info->stream, "%s", str);
 159   return 1;
 160 }
 161
 162 static int
 163 c4x_print_register (info, regno)
 164      struct disassemble_info *info;
 165      unsigned long regno;
 166 {
 167   static c4x_register_t **registertable = NULL;
 168   unsigned int i;
 169
 170   if (registertable == NULL)
 171     {
 172       registertable = (c4x_register_t **)
 173         xmalloc (sizeof (c4x_register_t *) * REG_TABLE_SIZE);
 174       for (i = 0; i < c3x_num_registers; i++)
 175         registertable[c3x_registers[i].regno] = (void *)&c3x_registers[i];
 176       if (IS_CPU_C4X (c4x_version))
 177         {
 178           /* Add C4x additional registers, overwriting
 179              any C3x registers if necessary.  */
 180           for (i = 0; i < c4x_num_registers; i++)
 181             registertable[c4x_registers[i].regno] = (void *)&c4x_registers[i];
 182         }
 183     }
 184   if ((int) regno > (IS_CPU_C4X (c4x_version) ? C4X_REG_MAX : C3X_REG_MAX))
 185     return 0;
 186   if (info != NULL)
 187     (*info->fprintf_func) (info->stream, "%s", registertable[regno]->name);
 188   return 1;
 189 }
 190
 191 static int
 192 c4x_print_addr (info, addr)
 193      struct disassemble_info *info;
 194      unsigned long addr;
 195 {
 196   if (info != NULL)
 197     (*info->print_address_func)(addr, info);
 198   return 1;
 199 }
 200
 201 static int
 202 c4x_print_relative (info, pc, offset, opcode)
 203      struct disassemble_info *info;
 204      unsigned long pc;
 205      long offset;
 206      unsigned long opcode;
 207 {
 208   return c4x_print_addr (info, pc + offset + c4x_pc_offset (opcode));
 209 }
 210
 211 static int
 212 c4x_print_direct (info, arg)
 213      struct disassemble_info *info;
 214      unsigned long arg;
 215 {
 216   if (info != NULL)
 217     {
 218       (*info->fprintf_func) (info->stream, "@");
 219       c4x_print_addr (info, arg + (c4x_dp << 16));
 220     }
 221   return 1;
 222 }
 223
 224 /* FIXME: make the floating point stuff not rely on host
 225    floating point arithmetic.  */
 226 void
 227 c4x_print_ftoa (val, stream, pfunc)
 228      unsigned int val;
 229      FILE *stream;
 230      fprintf_ftype pfunc;
 231 {
 232   int e;
 233   int s;
 234   int f;
 235   double num = 0.0;
 236
 237   e = EXTRS (val, 31, 24);      /* exponent */
 238   if (e != -128)
 239     {
 240       s = EXTRU (val, 23, 23);  /* sign bit */
 241       f = EXTRU (val, 22, 0);   /* mantissa */
 242       if (s)
 243         f += -2 * (1 << 23);
 244       else
 245         f += (1 << 23);
 246       num = f / (double)(1 << 23);
 247       num = ldexp (num, e);
 248     }
 249   (*pfunc)(stream, "%.9g", num);
 250 }
 251
 252 static int
 253 c4x_print_immed (info, type, arg)
 254      struct disassemble_info *info;
 255      immed_t type;
 256      unsigned long arg;
 257 {
 258   int s;
 259   int f;
 260   int e;
 261   double num = 0.0;
 262
 263   if (info == NULL)
 264     return 1;
 265   switch (type)
 266     {
 267     case IMMED_SINT:
 268     case IMMED_INT:
 269       (*info->fprintf_func) (info->stream, "%d", (long)arg);
 270       break;
 271
 272     case IMMED_SUINT:
 273     case IMMED_UINT:
 274       (*info->fprintf_func) (info->stream, "%u", arg);
 275       break;
 276
 277     case IMMED_SFLOAT:
 278       e = EXTRS (arg, 15, 12);
 279       if (e != -8)
 280         {
 281           s = EXTRU (arg, 11, 11);
 282           f = EXTRU (arg, 10, 0);
 283           if (s)
 284             f += -2 * (1 << 11);
 285           else
 286             f += (1 << 11);
 287           num = f / (double)(1 << 11);
 288           num = ldexp (num, e);
 289         }
 290       (*info->fprintf_func) (info->stream, "%f", num);
 291       break;
 292     case IMMED_FLOAT:
 293       e = EXTRS (arg, 31, 24);
 294       if (e != -128)
 295         {
 296           s = EXTRU (arg, 23, 23);
 297           f = EXTRU (arg, 22, 0);
 298           if (s)
 299             f += -2 * (1 << 23);
 300           else
 301             f += (1 << 23);
 302           num = f / (double)(1 << 23);
 303           num = ldexp (num, e);
 304         }
 305       (*info->fprintf_func) (info->stream, "%f", num);
 306       break;
 307     }
 308   return 1;
 309 }
 310
 311 static int
 312 c4x_print_cond (info, cond)
 313      struct disassemble_info *info;
 314      unsigned int cond;
 315 {
 316   static c4x_cond_t **condtable = NULL;
 317   unsigned int i;
 318
 319   if (condtable == NULL)
 320     {
 321       condtable = (c4x_cond_t **)xmalloc (sizeof (c4x_cond_t *) * 32);
 322       for (i = 0; i < num_conds; i++)
 323         condtable[c4x_conds[i].cond] = (void *)&c4x_conds[i];
 324     }
 325   if (cond > 31 || condtable[cond] == NULL)
 326     return 0;
 327   if (info != NULL)
 328     (*info->fprintf_func) (info->stream, "%s", condtable[cond]->name);
 329   return 1;
 330 }
 331
 332 static int
 333 c4x_print_indirect (info, type, arg)
 334      struct disassemble_info *info;
 335      indirect_t type;
 336      unsigned long arg;
 337 {
 338   unsigned int aregno;
 339   unsigned int modn;
 340   unsigned int disp;
 341   char *a;
 342
 343   aregno = 0;
 344   modn = 0;
 345   disp = 1;
 346   switch(type)
 347     {
 348     case INDIRECT_C4X:          /* *+ARn(disp) */
 349       disp = EXTRU (arg, 7, 3);
 350       aregno = EXTRU (arg, 2, 0) + REG_AR0;
 351       modn = 0;
 352       break;
 353     case INDIRECT_SHORT:
 354       disp = 1;
 355       aregno = EXTRU (arg, 2, 0) + REG_AR0;
 356       modn = EXTRU (arg, 7, 3);
 357       break;
 358     case INDIRECT_LONG:
 359       disp = EXTRU (arg, 7, 0);
 360       aregno = EXTRU (arg, 10, 8) + REG_AR0;
 361       modn = EXTRU (arg, 15, 11);
 362       if (modn > 7 && disp != 0)
 363         return 0;
 364       break;
 365     default:
 366       abort ();
 367     }
 368   if (modn > C3X_MODN_MAX)
 369     return 0;
 370   a = c4x_indirects[modn].name;
 371   while (*a)
 372     {
 373       switch (*a)
 374         {
 375         case 'a':
 376           c4x_print_register (info, aregno);
 377           break;
 378         case 'd':
 379           c4x_print_immed (info, IMMED_UINT, disp);
 380           break;
 381         case 'y':
 382           c4x_print_str (info, "ir0");
 383           break;
 384         case 'z':
 385           c4x_print_str (info, "ir1");
 386           break;
 387         default:
 388           c4x_print_char (info, *a);
 389           break;
 390         }
 391       a++;
 392     }
 393   return 1;
 394 }
 395
 396 static int
 397 c4x_print_op (info, instruction, p, pc)
 398      struct disassemble_info *info;
 399      unsigned long instruction;
 400      c4x_inst_t *p;
 401      unsigned long pc;
 402 {
 403   int val;
 404   char *s;
 405   char *parallel = NULL;
 406
 407   /* Print instruction name.  */
 408   s = p->name;
 409   while (*s && parallel == NULL)
 410     {
 411       switch (*s)
 412         {
 413         case 'B':
 414           if (! c4x_print_cond (info, EXTRU (instruction, 20, 16)))
 415             return 0;
 416           break;
 417         case 'C':
 418           if (! c4x_print_cond (info, EXTRU (instruction, 27, 23)))
 419             return 0;
 420           break;
 421         case '_':
 422           parallel = s + 1;     /* Skip past `_' in name */
 423           break;
 424         default:
 425           c4x_print_char (info, *s);
 426           break;
 427         }
 428       s++;
 429     }
 430
 431   /* Print arguments.  */
 432   s = p->args;
 433   if (*s)
 434     c4x_print_char (info, ' ');
 435
 436   while (*s)
 437     {
 438       switch (*s)
 439         {
 440         case '*': /* indirect 0--15 */
 441           if (! c4x_print_indirect (info, INDIRECT_LONG,
 442                                     EXTRU (instruction, 15, 0)))
 443             return 0;
 444           break;
 445
 446         case '#': /* only used for ldp, ldpk */
 447           c4x_print_immed (info, IMMED_UINT, EXTRU (instruction, 15, 0));
 448           break;
 449
 450         case '@': /* direct 0--15 */
 451           c4x_print_direct (info, EXTRU (instruction, 15, 0));
 452           break;
 453
 454         case 'A': /* address register 24--22 */
 455           if (! c4x_print_register (info, EXTRU (instruction, 24, 22) +
 456                                     REG_AR0))
 457             return 0;
 458           break;
 459
 460         case 'B': /* 24-bit unsigned int immediate br(d)/call/rptb
 461                      address 0--23.  */
 462           if (IS_CPU_C4X (c4x_version))
 463             c4x_print_relative (info, pc, EXTRS (instruction, 23, 0),
 464                                 p->opcode);
 465           else
 466             c4x_print_addr (info, EXTRU (instruction, 23, 0));
 467           break;
 468
 469         case 'C': /* indirect (short C4x) 0--7 */
 470           if (! IS_CPU_C4X (c4x_version))
 471             return 0;
 472           if (! c4x_print_indirect (info, INDIRECT_C4X,
 473                                     EXTRU (instruction, 7, 0)))
 474             return 0;
 475           break;
 476
 477         case 'D':
 478           /* Cockup if get here...  */
 479           break;
 480
 481         case 'E': /* register 0--7 */
 482           if (! c4x_print_register (info, EXTRU (instruction, 7, 0)))
 483             return 0;
 484           break;
 485
 486         case 'F': /* 16-bit float immediate 0--15 */
 487           c4x_print_immed (info, IMMED_SFLOAT,
 488                            EXTRU (instruction, 15, 0));
 489           break;
 490
 491         case 'I': /* indirect (short) 0--7 */
 492           if (! c4x_print_indirect (info, INDIRECT_SHORT,
 493                                     EXTRU (instruction, 7, 0)))
 494             return 0;
 495           break;
 496
 497         case 'J': /* indirect (short) 8--15 */
 498           if (! c4x_print_indirect (info, INDIRECT_SHORT,
 499                                     EXTRU (instruction, 15, 8)))
 500             return 0;
 501           break;
 502
 503         case 'G': /* register 8--15 */
 504           if (! c4x_print_register (info, EXTRU (instruction, 15, 8)))
 505             return 0;
 506           break;
 507
 508         case 'H': /* register 16--18 */
 509           if (! c4x_print_register (info, EXTRU (instruction, 18, 16)))
 510             return 0;
 511           break;
 512
 513         case 'K': /* register 19--21 */
 514           if (! c4x_print_register (info, EXTRU (instruction, 21, 19)))
 515             return 0;
 516           break;
 517
 518         case 'L': /* register 22--24 */
 519           if (! c4x_print_register (info, EXTRU (instruction, 24, 22)))
 520             return 0;
 521           break;
 522
 523         case 'M': /* register 22--22 */
 524           c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R2);
 525           break;
 526
 527         case 'N': /* register 23--23 */
 528           c4x_print_register (info, EXTRU (instruction, 22, 22) + REG_R0);
 529           break;
 530
 531         case 'O': /* indirect (short C4x) 8--15 */
 532           if (! IS_CPU_C4X (c4x_version))
 533             return 0;
 534           if (! c4x_print_indirect (info, INDIRECT_C4X,
 535                                     EXTRU (instruction, 15, 8)))
 536             return 0;
 537           break;
 538
 539         case 'P': /* displacement 0--15 (used by Bcond and BcondD) */
 540           c4x_print_relative (info, pc, EXTRS (instruction, 15, 0),
 541                               p->opcode);
 542           break;
 543
 544         case 'Q': /* register 0--15 */
 545           if (! c4x_print_register (info, EXTRU (instruction, 15, 0)))
 546             return 0;
 547           break;
 548
 549         case 'R': /* register 16--20 */
 550           if (! c4x_print_register (info, EXTRU (instruction, 20, 16)))
 551             return 0;
 552           break;
 553
 554         case 'S': /* 16-bit signed immediate 0--15 */
 555           c4x_print_immed (info, IMMED_SINT,
 556                            EXTRS (instruction, 15, 0));
 557           break;
 558
 559         case 'T': /* 5-bit signed immediate 16--20  (C4x stik) */
 560           if (! IS_CPU_C4X (c4x_version))
 561             return 0;
 562           if (! c4x_print_immed (info, IMMED_SUINT,
 563                                  EXTRU (instruction, 20, 16)))
 564             return 0;
 565           break;
 566
 567         case 'U': /* 16-bit unsigned int immediate 0--15 */
 568           c4x_print_immed (info, IMMED_SUINT, EXTRU (instruction, 15, 0));
 569           break;
 570
 571         case 'V': /* 5/9-bit unsigned vector 0--4/8 */
 572           c4x_print_immed (info, IMMED_SUINT,
 573                            IS_CPU_C4X (c4x_version) ?
 574                            EXTRU (instruction, 8, 0) :
 575                            EXTRU (instruction, 4, 0) & ~0x20);
 576           break;
 577
 578         case 'W': /* 8-bit signed immediate 0--7 */
 579           if (! IS_CPU_C4X (c4x_version))
 580             return 0;
 581           c4x_print_immed (info, IMMED_SINT, EXTRS (instruction, 7, 0));
 582           break;
 583
 584         case 'X': /* expansion register 4--0 */
 585           val = EXTRU (instruction, 4, 0) + REG_IVTP;
 586           if (val < REG_IVTP || val > REG_TVTP)
 587             return 0;
 588           if (! c4x_print_register (info, val))
 589             return 0;
 590           break;
 591
 592         case 'Y': /* address register 16--20 */
 593           val = EXTRU (instruction, 20, 16);
 594           if (val < REG_AR0 || val > REG_SP)
 595             return 0;
 596           if (! c4x_print_register (info, val))
 597             return 0;
 598           break;
 599
 600         case 'Z': /* expansion register 16--20 */
 601           val = EXTRU (instruction, 20, 16) + REG_IVTP;
 602           if (val < REG_IVTP || val > REG_TVTP)
 603             return 0;
 604           if (! c4x_print_register (info, val))
 605             return 0;
 606           break;
 607
 608         case '|':               /* Parallel instruction */
 609           c4x_print_str (info, " || ");
 610           c4x_print_str (info, parallel);
 611           c4x_print_char (info, ' ');
 612           break;
 613
 614         case ';':
 615           c4x_print_char (info, ',');
 616           break;
 617
 618         default:
 619           c4x_print_char (info, *s);
 620           break;
 621         }
 622       s++;
 623     }
 624   return 1;
 625 }
 626
 627 static void
 628 c4x_hash_opcode (optable, inst)
 629      c4x_inst_t **optable;
 630      const c4x_inst_t *inst;
 631 {
 632   int j;
 633   int opcode = inst->opcode >> (32 - C4X_HASH_SIZE);
 634   int opmask = inst->opmask >> (32 - C4X_HASH_SIZE);
 635
 636   /* Use a C4X_HASH_SIZE bit index as a hash index.  We should
 637      have unique entries so there's no point having a linked list
 638      for each entry? */
 639   for (j = opcode; j < opmask; j++)
 640     if ((j & opmask) == opcode)
 641       {
 642 #if C4X_DEBUG
 643         /* We should only have collisions for synonyms like
 644            ldp for ldi.  */
 645         if (optable[j] != NULL)
 646           printf("Collision at index %d, %s and %s\n",
 647                  j, optable[j]->name, inst->name);
 648 #endif
 649         optable[j] = (void *)inst;
 650       }
 651 }
 652
 653 /* Disassemble the instruction in 'instruction'.
 654    'pc' should be the address of this instruction, it will
 655    be used to print the target address if this is a relative jump or call
 656    the disassembled instruction is written to 'info'.
 657    The function returns the length of this instruction in words.  */
 658
 659 static int
 660 c4x_disassemble (pc, instruction, info)
 661      unsigned long pc;
 662      unsigned long instruction;
 663      struct disassemble_info *info;
 664 {
 665   static c4x_inst_t **optable = NULL;
 666   c4x_inst_t *p;
 667   int i;
 668
 669   c4x_version = info->mach;
 670
 671   if (optable == NULL)
 672     {
 673       optable = (c4x_inst_t **)
 674         xcalloc (sizeof (c4x_inst_t *), (1 << C4X_HASH_SIZE));
 675       /* Install opcodes in reverse order so that preferred
 676          forms overwrite synonyms.  */
 677       for (i = c3x_num_insts - 1; i >= 0; i--)
 678         c4x_hash_opcode (optable, &c3x_insts[i]);
 679       if (IS_CPU_C4X (c4x_version))
 680         {
 681           for (i = c4x_num_insts - 1; i >= 0; i--)
 682             c4x_hash_opcode (optable, &c4x_insts[i]);
 683         }
 684     }
 685
 686   /* See if we can pick up any loading of the DP register...  */
 687   if ((instruction >> 16) == 0x5070 || (instruction >> 16) == 0x1f70)
 688     c4x_dp = EXTRU (instruction, 15, 0);
 689
 690   p = optable[instruction >> (32 - C4X_HASH_SIZE)];
 691   if (p != NULL && ((instruction & p->opmask) == p->opcode)
 692       && c4x_print_op (NULL, instruction, p, pc))
 693     c4x_print_op (info, instruction, p, pc);
 694   else
 695     (*info->fprintf_func) (info->stream, "%08x", instruction);
 696
 697   /* Return size of insn in words.  */
 698   return 1;
 699 }
 700
 701 /* The entry point from objdump and gdb.  */
 702 int
 703 print_insn_tic4x (memaddr, info)
 704      bfd_vma memaddr;
 705      struct disassemble_info *info;
 706 {
 707   int status;
 708   unsigned long pc;
 709   unsigned long op;
 710   bfd_byte buffer[4];
 711
 712   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
 713   if (status != 0)
 714     {
 715       (*info->memory_error_func) (status, memaddr, info);
 716       return -1;
 717     }
 718
 719   pc = memaddr;
 720   op = bfd_getl32 (buffer);
 721   info->bytes_per_line = 4;
 722   info->bytes_per_chunk = 4;
 723   info->octets_per_byte = 4;
 724   info->display_endian = BFD_ENDIAN_LITTLE;
 725   return c4x_disassemble (pc, op, info) * 4;
 726 }