sim/aarch64/ChangeLog

   1 2017-01-09  Jim Wilson  <jim.wilson@linaro.org>
   2
   3         * simulator.c (do_vec_UZP): Rewrite.
   4
   5 2017-01-04  Jim Wilson  <jim.wilson@linaro.org>
   6
   7         * cpustate.c: Include math.h.
   8         (aarch64_set_FP_float): Use signbit to check for signed zero.
   9         (aarch64_set_FP_double): Likewise.
  10         * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
  11         (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
  12         args same size as third arg.
  13         (fmaxnm): Use isnan instead of fpclassify.
  14         (fminnm, dmaxnm, dminnm): Likewise.
  15         (do_vec_MLS): Reverse order of subtraction operands.
  16         (dexSimpleFPCondSelect): Call aarch64_get_FP_double or
  17         aarch64_get_FP_float to get source register contents.
  18         (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
  19         DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
  20         DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
  21         (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
  22         raise_exception calls.
  23
  24 2016-12-21  Jim Wilson  <jim.wilson@linaro.org>
  25
  26         * simulator.c (set_flags_for_float_compare): Add code to handle Inf.
  27         Add comment to document NaN issue.
  28         (set_flags_for_double_compare): Likewise.
  29
  30 2016-12-13  Jim Wilson  <jim.wilson@linaro.org>
  31
  32         * simulator.c (NEG, POS): Move before set_flags_for_add64.
  33         (set_flags_for_add64): Replace with a modified copy of
  34         set_flags_for_sub64.
  35
  36 2016-12-03  Jim Wilson  <jim.wilson@linaro.org>
  37
  38         * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
  39         (dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
  40
  41 2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
  42
  43         * simulator.c (fsturs): Switch use of rn and st variables.
  44         (fsturd, fsturq): Likewise
  45
  46 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * interp.c: Include bfd.h.
  49         (symcount, symtab, aarch64_get_sym_value): Delete.
  50         (remove_useless_symbols): Change count type to long.
  51         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
  52         and symtab local variables.
  53         (sim_create_inferior): Delete storage.  Replace symbol code
  54         with a call to trace_load_symbols.
  55         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
  56         includes.
  57         (aarch64_get_heap_start): Change aarch64_get_sym_value to
  58         trace_sym_value.
  59         * memory.h: Delete bfd.h include.
  60         (mem_add_blk): Delete unused prototype.
  61         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
  62         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
  63         (aarch64_get_sym_value): Delete.
  64
  65 2016-08-12  Nick Clifton  <nickc@redhat.com>
  66
  67         * simulator.c (aarch64_step): Revert pervious delta.
  68         (aarch64_run): Call sim_events_tick after each
  69         instruction is simulated, and if necessary call
  70         sim_events_process.
  71         * simulator.h: Revert previous delta.
  72
  73 2016-08-11  Nick Clifton  <nickc@redhat.com>
  74
  75         * interp.c (sim_create_inferior): Allow for being called with a
  76         NULL abfd parameter.  If a bfd is provided, initialise the sim
  77         with that start address.
  78         * simulator.c (HALT_NYI): Just print out the numeric value of the
  79         instruction when not tracing.
  80         (aarch64_step): Change from static to global.
  81         * simulator.h: Add a prototype for aarch64_step().
  82
  83 2016-07-27  Alan Modra  <amodra@gmail.com>
  84
  85         * memory.c: Don't include libbfd.h.
  86
  87 2016-07-21  Nick Clifton  <nickc@redhat.com>
  88
  89         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
  90
  91 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
  92
  93         * cpustate.h: Include config.h.
  94         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
  95         use anonymous structs to align members.
  96         * simulator.c (aarch64_step): Use sim_core_read_buffer and
  97         endian_le2h_4 to read instruction from pc.
  98
  99 2016-05-06  Nick Clifton  <nickc@redhat.com>
 100
 101         * simulator.c (do_FMLA_by_element): New function.
 102         (do_vec_op2): Call it.
 103
 104 2016-04-27  Nick Clifton  <nickc@redhat.com>
 105
 106         * simulator.c: Add TRACE_DECODE statements to all emulation
 107         functions.
 108
 109 2016-03-30  Nick Clifton  <nickc@redhat.com>
 110
 111         * cpustate.c (aarch64_set_reg_s32): New function.
 112         (aarch64_set_reg_u32): New function.
 113         (aarch64_get_FP_half): Place half precision value into the correct
 114         slot of the union.
 115         (aarch64_set_FP_half): Likewise.
 116         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
 117         aarch64_set_reg_u32.
 118         * memory.c (FETCH_FUNC): Cast the read value to the access type
 119         before converting it to the return type.  Rename to FETCH_FUNC64.
 120         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
 121         accesses.  Use for 32-bit memory access functions.
 122         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
 123         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
 124         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
 125         (ldrsh_scale_ext, ldrsw_abs): Likewise.
 126         (ldrh32_abs): Store 32 bit value not 64-bits.
 127         (ldrh32_wb, ldrh32_scale_ext): Likewise.
 128         (do_vec_MOV_immediate): Fix computation of val.
 129         (do_vec_MVNI): Likewise.
 130         (DO_VEC_WIDENING_MUL): New macro.
 131         (do_vec_mull): Use new macro.
 132         (do_vec_mul): Use new macro.
 133         (do_vec_MLA): Read values before writing.
 134         (do_vec_xtl): Likewise.
 135         (do_vec_SSHL): Select correct shift value.
 136         (do_vec_USHL): Likewise.
 137         (do_scalar_UCVTF): New function.
 138         (do_scalar_vec): Call new function.
 139         (store_pair_u64): Treat reads of SP as reads of XZR.
 140
 141 2016-03-29  Nick Clifton  <nickc@redhat.com>
 142
 143         * cpustate.c: Remove space after asterisk in function parameters.
 144         * decode.h (greg): Delete unused function.
 145         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 146         * simulator.c: Use INSTR macro in more places.
 147         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 148         Remove extraneous whitespace.
 149
 150 2016-03-23  Nick Clifton  <nickc@redhat.com>
 151
 152         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 153         register as a half precision floating point number.
 154         (aarch64_set_FP_half): New function.  Similar, but for setting
 155         a half precision register.
 156         (aarch64_get_thread_id): New function.  Returns the value of the
 157         CPU's TPIDR register.
 158         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 159         floating point control register.
 160         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 161         register.
 162         * cpustate.h: Add prototypes for new functions.
 163         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 164         * memory.c: Use unaligned core access functions for all memory
 165         reads and writes.
 166         * simulator.c (HALT_NYI): Generate an error message if tracing
 167         will not tell the user why the simulator is halting.
 168         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 169         (INSTR): New time-saver macro.
 170         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 171         offset.
 172         (fldrh_abs): New function.  Likewise for 16-bit values.
 173         (do_vec_SSHL): Allow for negative shift values.
 174         (do_vec_USHL): Likewise.
 175         (do_vec_SHL): Correct computation of shift amount.
 176         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 177         shifts and computation of shift value.
 178         (clz): New function.  Counts leading zero bits.
 179         (do_vec_CLZ): New function.  Implements CLZ (vector).
 180         (do_vec_MOV_element): Call do_vec_CLZ.
 181         (dexSimpleFPCondCompare): Implement.
 182         (do_FCVT_half_to_single): New function.  Implements one of the
 183         FCVT operations.
 184         (do_FCVT_half_to_double): New function.  Likewise.
 185         (do_FCVT_single_to_half): New function.  Likewise.
 186         (do_FCVT_double_to_half): New function.  Likewise.
 187         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 188         (do_scalar_SHL): Handle negative shifts.
 189         (do_scalar_shift): Handle SSHR.
 190         (do_scalar_USHL): New function.
 191         (do_double_add): Simplify to just performing a double precision
 192         add operation.  Move remaining code into...
 193         (do_scalar_vec): ... New function.
 194         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 195         functions.
 196         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 197         registers.
 198         (system_set): New function.
 199         (do_MSR_immediate): New function.  Stub for now.
 200         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 201         instruction.
 202         (do_SYS): New function.  Stub for now,
 203         (dexSystem): Call new functions.
 204
 205 2016-03-18  Nick Clifton  <nickc@redhat.com>
 206
 207         * cpustate.c: Remove spurious spaces from TRACE strings.
 208         Print hex equivalents of floats and doubles.
 209         Check element number against array size when accessing vector
 210         registers.
 211         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 212         element index.
 213         (SET_VEC_ELEMENT): Likewise.
 214         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 215
 216         * memory.c: Trace memory reads when --trace-memory is enabled.
 217         Remove float and double load and store functions.
 218         * memory.h (aarch64_get_mem_float): Delete prototype.
 219         (aarch64_get_mem_double): Likewise.
 220         (aarch64_set_mem_float): Likewise.
 221         (aarch64_set_mem_double): Likewise.
 222         * simulator (IS_SET): Always return either 0 or 1.
 223         (IS_CLEAR): Likewise.
 224         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 225         and doubles using 64-bit memory accesses.
 226         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 227         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 228         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 229         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 230         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 231         (do_vec_MUL_by_element): New function.
 232         (do_vec_op2): Call do_vec_MUL_by_element.
 233         (do_scalar_NEG): New function.
 234         (do_double_add): Call do_scalar_NEG.
 235
 236 2016-03-03  Nick Clifton  <nickc@redhat.com>
 237
 238         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 239         (CondCompare): Swap interpretation of bit 30.
 240         (DO_ADDP): Delete macro.
 241         (do_vec_ADDP): Copy source registers before starting to update
 242         destination register.
 243         (do_vec_FADDP): Likewise.
 244         (do_vec_load_store): Fix computation of sizeof_operation.
 245         (rbit64): Fix type of constant.
 246         (aarch64_step): When displaying insn value, display all 32 bits.
 247
 248 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * config.in, configure: Regenerate.
 251
 252 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 253
 254         * configure: Regenerate.
 255
 256 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 257
 258         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 259         * configure: Regenerate.
 260
 261 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 262
 263         * configure: Regenerate.
 264
 265 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 266
 267         * configure: Regenerate.
 268
 269 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 270
 271         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 272         * configure: Regenerate.
 273
 274 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * configure: Regenerate.
 277
 278 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 279
 280         * configure: Regenerate.
 281
 282 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * config.in, configure: Regenerate.
 285
 286 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 287
 288         * interp.c (sim_create_inferior): Mark argv and env const.
 289         (sim_open): Mark argv const.
 290
 291 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 292
 293         * interp.c: Delete dis-asm.h include.
 294         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 295         (sim_create_inferior): Delete disassemble init logic.
 296         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 297         (sim_open): Delete sim_add_option_table call.
 298         * memory.c (mem_error): Delete disas check.
 299         * simulator.c: Delete dis-asm.h include.
 300         (disas): Delete.
 301         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 302         (HALT_NYI): Likewise.
 303         (handle_halt): Delete disas call.
 304         (aarch64_step): Replace disas logic with TRACE_DISASM.
 305         * simulator.h: Delete dis-asm.h include.
 306         (aarch64_print_insn): Delete.
 307
 308 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 309
 310         * simulator.c (MAX, MIN): Delete.
 311         (do_vec_maxv): Change MAX to max and MIN to min.
 312         (do_vec_fminmaxV): Likewise.
 313
 314 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 315
 316         * simulator.c: Remove syscall.h include.
 317
 318 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 319
 320         * configure: Regenerate.
 321
 322 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 323
 324         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 325         * configure: Regenerate.
 326
 327 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 328
 329         * configure: Regenerate.
 330
 331 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 332
 333         * interp.c (sim_dis_read): Change private_data to application_data.
 334         (sim_create_inferior): Likewise.
 335
 336 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 337
 338         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 339
 340 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 341
 342         * config.in, configure: Regenerate.
 343
 344 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 345
 346         * interp.c (sim_create_inferior): Update comment and argv check.
 347
 348 2015-12-14  Nick Clifton  <nickc@redhat.com>
 349
 350         * simulator.c (system_get): New function.  Provides read
 351         access to the dczid system register.
 352         (do_mrs): New function - implements the MRS instruction.
 353         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 354         unimplemented system instructions.
 355
 356 2015-11-24  Nick Clifton  <nickc@redhat.com>
 357
 358         * configure.ac: New configure template.
 359         * aclocal.m4: Generate.
 360         * config.in: Generate.
 361         * configure: Generate.
 362         * cpustate.c: New file - functions for accessing AArch64 registers.
 363         * cpustate.h: New header.
 364         * decode.h: New header.
 365         * interp.c: New file - interface between GDB and simulator.
 366         * Makefile.in: New makefile template.
 367         * memory.c: New file - functions for simulating aarch64 memory
 368         accesses.
 369         * memory.h: New header.
 370         * sim-main.h: New header.
 371         * simulator.c: New file - aarch64 simulator functions.
 372         * simulator.h: New header.