gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / sim / frv / Makefile.in
1 # Makefile template for Configure for the frv simulator
2 # Copyright (C) 1998-2020 Free Software Foundation, Inc.
3 # Contributed by Red Hat.
4 #
5 # This program is free software; you can redistribute it and/or modify
6 # it under the terms of the GNU General Public License as published by
7 # the Free Software Foundation; either version 3 of the License, or
8 # (at your option) any later version.
9 #
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 # GNU General Public License for more details.
14 #
15 # You should have received a copy of the GNU General Public License
16 # along with this program. If not, see <http://www.gnu.org/licenses/>.
17
18 ## COMMON_PRE_CONFIG_FRAG
19
20 FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
21
22 SIM_OBJS = \
23 $(SIM_NEW_COMMON_OBJS) \
24 cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
25 cgen-run.o \
26 sim-if.o arch.o \
27 $(FRV_OBJS) \
28 traps.o interrupts.o memory.o cache.o pipeline.o \
29 profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
30 reset.o registers.o
31
32 # Extra headers included by sim-main.h.
33 SIM_EXTRA_DEPS = \
34 $(CGEN_INCLUDE_DEPS) \
35 arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
36 registers.h profile.h \
37 $(sim-options_h)
38
39 SIM_EXTRA_CFLAGS = @sim_trapdump@
40
41 SIM_EXTRA_CLEAN = frv-clean
42
43 # This selects the frv newlib/libgloss syscall definitions.
44 NL_TARGET = -DNL_TARGET_frv
45
46 ## COMMON_POST_CONFIG_FRAG
47
48 arch = frv
49
50 arch.o: arch.c $(SIM_MAIN_DEPS)
51
52 devices.o: devices.c $(SIM_MAIN_DEPS)
53
54 # FRV objs
55
56 FRVBF_INCLUDE_DEPS = \
57 $(CGEN_MAIN_CPU_DEPS) \
58 $(SIM_EXTRA_DEPS) \
59 cpu.h decode.h eng.h
60
61 frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
62 traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
63 pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
64 interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
65 memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
66 cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
67 options.o: options.c $(FRVBF_INCLUDE_DEPS)
68 reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
69 registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
70 profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
71 profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
72 profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
73 profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
74 profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
75 sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
76
77
78 # FIXME: Use of `mono' is wip.
79 mloop.c eng.h: stamp-mloop
80 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
81 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
82 -mono -scache -parallel-generic-write -parallel-only \
83 -cpu frvbf -infile $(srcdir)/mloop.in
84 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
85 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
86 touch stamp-mloop
87 mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
88
89 cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
90 decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
91 sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
92 model.o: model.c $(FRVBF_INCLUDE_DEPS)
93
94 frv-clean:
95 rm -f mloop.c eng.h stamp-mloop
96 rm -f tmp-*
97 rm -f stamp-arch stamp-cpu
98
99 # cgen support, enable with --enable-cgen-maint
100 CGEN_MAINT = ; @true
101 # The following line is commented in or out depending upon --enable-cgen-maint.
102 @CGEN_MAINT@CGEN_MAINT =
103
104 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
105 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
106 archfile=$(srcdir)/../../cpu/frv.cpu \
107 FLAGS="with-scache"
108 touch stamp-arch
109 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
110 # @true
111
112 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
113 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
114 cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
115 archfile=$(srcdir)/../../cpu/frv.cpu \
116 FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
117 EXTRAFILES="$(CGEN_CPU_SEM)"
118 touch stamp-cpu
119 cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
120 # @true
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