gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / sim / lm32 / Makefile.in
1 # Makefile for Lattice Mico32 simulator.
2 # Contributed by Jon Beniston <jon@beniston.com>
3
4 ## COMMON_PRE_CONFIG_FRAG
5
6 # List of object files, less common parts.
7 SIM_OBJS = \
8 $(SIM_NEW_COMMON_OBJS) \
9 cgen-utils.o cgen-trace.o cgen-scache.o \
10 cgen-run.o \
11 sim-if.o arch.o \
12 cpu.o decode.o sem.o model.o mloop.o \
13 lm32.o traps.o user.o
14
15 # List of extra dependencies.
16 # Generally this consists of simulator specific files included by sim-main.h.
17 SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h
18
19 # List of flags to always pass to $(CC).
20 #SIM_EXTRA_CFLAGS =
21
22 SIM_EXTRA_CLEAN = lm32-clean
23
24 # This selects the lm32 newlib/libgloss syscall definitions.
25 NL_TARGET = -DNL_TARGET_lm32
26
27 ## COMMON_POST_CONFIG_FRAG
28
29 arch = lm32
30
31 arch.o: arch.c $(SIM_MAIN_DEPS)
32
33 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
34
35 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
36
37 LM32BF_INCLUDE_DEPS = \
38 $(CGEN_MAIN_CPU_DEPS) \
39 cpu.h decode.h eng.h
40
41 lm32.o: lm32.c $(LM32BF_INCLUDE_DEPS)
42
43 # FIXME: Use of `mono' is wip.
44 mloop.c eng.h: stamp-mloop
45 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
46 $(SHELL) $(srccom)/genmloop.sh \
47 -mono -fast -pbb -switch sem-switch.c \
48 -cpu lm32bf -infile $(srcdir)/mloop.in
49 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
50 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
51 touch stamp-mloop
52 mloop.o: mloop.c sem-switch.c
53
54 cpu.o: cpu.c $(LM32BF_INCLUDE_DEPS)
55 decode.o: decode.c $(LM32BF_INCLUDE_DEPS)
56 sem.o: sem.c $(LM32BF_INCLUDE_DEPS)
57 model.o: model.c $(LM32BF_INCLUDE_DEPS)
58
59 lm32-clean:
60 rm -f mloop.c eng.h stamp-mloop
61 rm -f stamp-arch stamp-cpu
62 rm -f tmp-*
63
64 # cgen support, enable with --enable-cgen-maint
65 CGEN_MAINT = ; @true
66 # The following line is commented in or out depending upon --enable-cgen-maint.
67 @CGEN_MAINT@CGEN_MAINT =
68
69 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu
70 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
71 archfile=$(CPU_DIR)/lm32.cpu \
72 FLAGS="with-scache with-profile=fn"
73 touch stamp-arch
74 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
75
76 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu
77 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
78 cpu=lm32bf mach=lm32 SUFFIX= \
79 archfile=$(CPU_DIR)/lm32.cpu \
80 FLAGS="with-scache with-profile=fn" \
81 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
82 touch stamp-cpu
83 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
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