gdb: add target_ops::supports_displaced_step
[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2020 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 cgen-utils.o cgen-trace.o cgen-scache.o \
30 cgen-run.o \
31 sim-if.o arch.o \
32 $(M32R_OBJS) \
33 $(M32RX_OBJS) \
34 $(M32R2_OBJS) \
35 $(TRAPS_OBJ)
36
37 # Extra headers included by sim-main.h.
38 SIM_EXTRA_DEPS = \
39 $(CGEN_INCLUDE_DEPS) \
40 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
41
42 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
43
44 SIM_EXTRA_CLEAN = m32r-clean
45
46 # This selects the m32r newlib/libgloss syscall definitions.
47 NL_TARGET = -DNL_TARGET_m32r
48
49 ## COMMON_POST_CONFIG_FRAG
50
51 arch = m32r
52
53 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
54
55 arch.o: arch.c $(SIM_MAIN_DEPS)
56
57 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
58 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
59 devices.o: devices.c $(SIM_MAIN_DEPS)
60
61 # M32R objs
62
63 M32RBF_INCLUDE_DEPS = \
64 $(CGEN_MAIN_CPU_DEPS) \
65 cpu.h decode.h eng.h
66
67 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
68
69 # FIXME: Use of `mono' is wip.
70 mloop.c eng.h: stamp-mloop ; @true
71 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
72 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
73 -mono -fast -pbb -switch sem-switch.c \
74 -cpu m32rbf -infile $(srcdir)/mloop.in
75 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
76 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
77 touch stamp-mloop
78 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
79
80 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
81 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
82 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
83 model.o: model.c $(M32RBF_INCLUDE_DEPS)
84
85 # M32RX objs
86
87 M32RXF_INCLUDE_DEPS = \
88 $(CGEN_MAIN_CPU_DEPS) \
89 cpux.h decodex.h engx.h
90
91 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
92
93 # FIXME: Use of `mono' is wip.
94 mloopx.c engx.h: stamp-xmloop ; @true
95 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
96 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
97 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
98 -cpu m32rxf -infile $(srcdir)/mloopx.in \
99 -outfile-suffix x
100 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
101 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
102 touch stamp-xmloop
103 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
104
105 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
106 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
107 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
108 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
109
110 # M32R2 objs
111
112 M32R2F_INCLUDE_DEPS = \
113 $(CGEN_MAIN_CPU_DEPS) \
114 cpu2.h decode2.h eng2.h
115
116 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
117
118 # FIXME: Use of `mono' is wip.
119 mloop2.c eng2.h: stamp-2mloop ; @true
120 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
121 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
122 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
123 -cpu m32r2f -infile $(srcdir)/mloop2.in \
124 -outfile-suffix 2
125 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
126 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
127 touch stamp-2mloop
128
129 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
130 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
131 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
132 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
133 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
134
135 m32r-clean:
136 rm -f mloop.c eng.h stamp-mloop
137 rm -f mloopx.c engx.h stamp-xmloop
138 rm -f mloop2.c eng2.h stamp-2mloop
139 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
140 rm -f tmp-*
141
142 # cgen support, enable with --enable-cgen-maint
143 CGEN_MAINT = ; @true
144 # The following line is commented in or out depending upon --enable-cgen-maint.
145 @CGEN_MAINT@CGEN_MAINT =
146
147 # NOTE: Generated source files are specified as full paths,
148 # e.g. $(srcdir)/arch.c, because make may decide the files live
149 # in objdir otherwise.
150
151 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
152 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
153 archfile=$(CPU_DIR)/m32r.cpu \
154 FLAGS="with-scache with-profile=fn"
155 touch stamp-arch
156 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
157 @true
158
159 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
160 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
161 cpu=m32rbf mach=m32r SUFFIX= \
162 archfile=$(CPU_DIR)/m32r.cpu \
163 FLAGS="with-scache with-profile=fn" \
164 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
165 touch stamp-cpu
166 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
167 @true
168
169 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
170 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
171 cpu=m32rxf mach=m32rx SUFFIX=x \
172 archfile=$(CPU_DIR)/m32r.cpu \
173 FLAGS="with-scache with-profile=fn" \
174 EXTRAFILES="$(CGEN_CPU_SEMSW)"
175 touch stamp-xcpu
176 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
177 @true
178
179 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
180 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
181 cpu=m32r2f mach=m32r2 SUFFIX=2 \
182 archfile=$(CPU_DIR)/m32r.cpu \
183 FLAGS="with-scache with-profile=fn" \
184 EXTRAFILES="$(CGEN_CPU_SEMSW)"
185 touch stamp-2cpu
186 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
187 @true
This page took 0.044517 seconds and 4 git commands to generate.