sim/m32r/sem.c

   1 /* Simulator instruction semantics for m32rbf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #define WANT_CPU m32rbf
  26 #define WANT_CPU_M32RBF
  27
  28 #include "sim-main.h"
  29 #include "cgen-mem.h"
  30 #include "cgen-ops.h"
  31
  32 #undef GET_ATTR
  33 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
  34
  35 /* This is used so that we can compile two copies of the semantic code,
  36    one with full feature support and one without that runs fast(er).
  37    FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */
  38 #if FAST_P
  39 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
  40 #undef TRACE_RESULT
  41 #define TRACE_RESULT(cpu, abuf, name, type, val)
  42 #else
  43 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
  44 #endif
  45
  46 /* x-invalid: --invalid-- */
  47
  48 static SEM_PC
  49 SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  50 {
  51 #define FLD(f) abuf->fields.fmt_empty.f
  52   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  53   int UNUSED written = 0;
  54   IADDR UNUSED pc = abuf->addr;
  55   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  56
  57   {
  58 #if WITH_SCACHE
  59     /* Update the recorded pc in the cpu state struct.  */
  60     SET_H_PC (pc);
  61 #endif
  62     sim_engine_invalid_insn (current_cpu, pc);
  63     sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
  64     /* NOTREACHED */
  65   }
  66
  67   return vpc;
  68 #undef FLD
  69 }
  70
  71 /* x-after: --after-- */
  72
  73 static SEM_PC
  74 SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  75 {
  76 #define FLD(f) abuf->fields.fmt_empty.f
  77   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  78   int UNUSED written = 0;
  79   IADDR UNUSED pc = abuf->addr;
  80   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  81
  82   {
  83 #if WITH_SCACHE_PBB_M32RBF
  84     m32rbf_pbb_after (current_cpu, sem_arg);
  85 #endif
  86   }
  87
  88   return vpc;
  89 #undef FLD
  90 }
  91
  92 /* x-before: --before-- */
  93
  94 static SEM_PC
  95 SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  96 {
  97 #define FLD(f) abuf->fields.fmt_empty.f
  98   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  99   int UNUSED written = 0;
 100   IADDR UNUSED pc = abuf->addr;
 101   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 102
 103   {
 104 #if WITH_SCACHE_PBB_M32RBF
 105     m32rbf_pbb_before (current_cpu, sem_arg);
 106 #endif
 107   }
 108
 109   return vpc;
 110 #undef FLD
 111 }
 112
 113 /* x-cti-chain: --cti-chain-- */
 114
 115 static SEM_PC
 116 SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 117 {
 118 #define FLD(f) abuf->fields.fmt_empty.f
 119   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 120   int UNUSED written = 0;
 121   IADDR UNUSED pc = abuf->addr;
 122   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 123
 124   {
 125 #if WITH_SCACHE_PBB_M32RBF
 126 #ifdef DEFINE_SWITCH
 127     vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
 128                                pbb_br_type, pbb_br_npc);
 129     BREAK (sem);
 130 #else
 131     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 132     vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
 133                                CPU_PBB_BR_TYPE (current_cpu),
 134                                CPU_PBB_BR_NPC (current_cpu));
 135 #endif
 136 #endif
 137   }
 138
 139   return vpc;
 140 #undef FLD
 141 }
 142
 143 /* x-chain: --chain-- */
 144
 145 static SEM_PC
 146 SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 147 {
 148 #define FLD(f) abuf->fields.fmt_empty.f
 149   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 150   int UNUSED written = 0;
 151   IADDR UNUSED pc = abuf->addr;
 152   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 153
 154   {
 155 #if WITH_SCACHE_PBB_M32RBF
 156     vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
 157 #ifdef DEFINE_SWITCH
 158     BREAK (sem);
 159 #endif
 160 #endif
 161   }
 162
 163   return vpc;
 164 #undef FLD
 165 }
 166
 167 /* x-begin: --begin-- */
 168
 169 static SEM_PC
 170 SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 171 {
 172 #define FLD(f) abuf->fields.fmt_empty.f
 173   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 174   int UNUSED written = 0;
 175   IADDR UNUSED pc = abuf->addr;
 176   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 177
 178   {
 179 #if WITH_SCACHE_PBB_M32RBF
 180 #ifdef DEFINE_SWITCH
 181     /* In the switch case FAST_P is a constant, allowing several optimizations
 182        in any called inline functions.  */
 183     vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
 184 #else
 185     vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 186 #endif
 187 #endif
 188   }
 189
 190   return vpc;
 191 #undef FLD
 192 }
 193
 194 /* add: add $dr,$sr */
 195
 196 static SEM_PC
 197 SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 198 {
 199 #define FLD(f) abuf->fields.sfmt_add.f
 200   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 201   int UNUSED written = 0;
 202   IADDR UNUSED pc = abuf->addr;
 203   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 204
 205   {
 206     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 207     * FLD (i_dr) = opval;
 208     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 209   }
 210
 211   return vpc;
 212 #undef FLD
 213 }
 214
 215 /* add3: add3 $dr,$sr,$hash$slo16 */
 216
 217 static SEM_PC
 218 SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 219 {
 220 #define FLD(f) abuf->fields.sfmt_add3.f
 221   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 222   int UNUSED written = 0;
 223   IADDR UNUSED pc = abuf->addr;
 224   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 225
 226   {
 227     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 228     * FLD (i_dr) = opval;
 229     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 230   }
 231
 232   return vpc;
 233 #undef FLD
 234 }
 235
 236 /* and: and $dr,$sr */
 237
 238 static SEM_PC
 239 SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 240 {
 241 #define FLD(f) abuf->fields.sfmt_add.f
 242   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 243   int UNUSED written = 0;
 244   IADDR UNUSED pc = abuf->addr;
 245   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 246
 247   {
 248     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 249     * FLD (i_dr) = opval;
 250     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 251   }
 252
 253   return vpc;
 254 #undef FLD
 255 }
 256
 257 /* and3: and3 $dr,$sr,$uimm16 */
 258
 259 static SEM_PC
 260 SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 261 {
 262 #define FLD(f) abuf->fields.sfmt_and3.f
 263   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 264   int UNUSED written = 0;
 265   IADDR UNUSED pc = abuf->addr;
 266   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 267
 268   {
 269     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 270     * FLD (i_dr) = opval;
 271     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 272   }
 273
 274   return vpc;
 275 #undef FLD
 276 }
 277
 278 /* or: or $dr,$sr */
 279
 280 static SEM_PC
 281 SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 282 {
 283 #define FLD(f) abuf->fields.sfmt_add.f
 284   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 285   int UNUSED written = 0;
 286   IADDR UNUSED pc = abuf->addr;
 287   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 288
 289   {
 290     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 291     * FLD (i_dr) = opval;
 292     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 293   }
 294
 295   return vpc;
 296 #undef FLD
 297 }
 298
 299 /* or3: or3 $dr,$sr,$hash$ulo16 */
 300
 301 static SEM_PC
 302 SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 303 {
 304 #define FLD(f) abuf->fields.sfmt_and3.f
 305   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 306   int UNUSED written = 0;
 307   IADDR UNUSED pc = abuf->addr;
 308   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 309
 310   {
 311     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 312     * FLD (i_dr) = opval;
 313     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 314   }
 315
 316   return vpc;
 317 #undef FLD
 318 }
 319
 320 /* xor: xor $dr,$sr */
 321
 322 static SEM_PC
 323 SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 324 {
 325 #define FLD(f) abuf->fields.sfmt_add.f
 326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 327   int UNUSED written = 0;
 328   IADDR UNUSED pc = abuf->addr;
 329   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 330
 331   {
 332     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 333     * FLD (i_dr) = opval;
 334     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 335   }
 336
 337   return vpc;
 338 #undef FLD
 339 }
 340
 341 /* xor3: xor3 $dr,$sr,$uimm16 */
 342
 343 static SEM_PC
 344 SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 345 {
 346 #define FLD(f) abuf->fields.sfmt_and3.f
 347   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 348   int UNUSED written = 0;
 349   IADDR UNUSED pc = abuf->addr;
 350   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 351
 352   {
 353     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 354     * FLD (i_dr) = opval;
 355     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 356   }
 357
 358   return vpc;
 359 #undef FLD
 360 }
 361
 362 /* addi: addi $dr,$simm8 */
 363
 364 static SEM_PC
 365 SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 366 {
 367 #define FLD(f) abuf->fields.sfmt_addi.f
 368   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 369   int UNUSED written = 0;
 370   IADDR UNUSED pc = abuf->addr;
 371   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 372
 373   {
 374     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 375     * FLD (i_dr) = opval;
 376     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 377   }
 378
 379   return vpc;
 380 #undef FLD
 381 }
 382
 383 /* addv: addv $dr,$sr */
 384
 385 static SEM_PC
 386 SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 387 {
 388 #define FLD(f) abuf->fields.sfmt_add.f
 389   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 390   int UNUSED written = 0;
 391   IADDR UNUSED pc = abuf->addr;
 392   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 393
 394 {
 395   SI temp0;BI temp1;
 396   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 397   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 398   {
 399     SI opval = temp0;
 400     * FLD (i_dr) = opval;
 401     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 402   }
 403   {
 404     BI opval = temp1;
 405     CPU (h_cond) = opval;
 406     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 407   }
 408 }
 409
 410   return vpc;
 411 #undef FLD
 412 }
 413
 414 /* addv3: addv3 $dr,$sr,$simm16 */
 415
 416 static SEM_PC
 417 SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 418 {
 419 #define FLD(f) abuf->fields.sfmt_add3.f
 420   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 421   int UNUSED written = 0;
 422   IADDR UNUSED pc = abuf->addr;
 423   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 424
 425 {
 426   SI temp0;BI temp1;
 427   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 428   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 429   {
 430     SI opval = temp0;
 431     * FLD (i_dr) = opval;
 432     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 433   }
 434   {
 435     BI opval = temp1;
 436     CPU (h_cond) = opval;
 437     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 438   }
 439 }
 440
 441   return vpc;
 442 #undef FLD
 443 }
 444
 445 /* addx: addx $dr,$sr */
 446
 447 static SEM_PC
 448 SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 449 {
 450 #define FLD(f) abuf->fields.sfmt_add.f
 451   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 452   int UNUSED written = 0;
 453   IADDR UNUSED pc = abuf->addr;
 454   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 455
 456 {
 457   SI temp0;BI temp1;
 458   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 459   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 460   {
 461     SI opval = temp0;
 462     * FLD (i_dr) = opval;
 463     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 464   }
 465   {
 466     BI opval = temp1;
 467     CPU (h_cond) = opval;
 468     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 469   }
 470 }
 471
 472   return vpc;
 473 #undef FLD
 474 }
 475
 476 /* bc8: bc.s $disp8 */
 477
 478 static SEM_PC
 479 SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 480 {
 481 #define FLD(f) abuf->fields.sfmt_bl8.f
 482   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 483   int UNUSED written = 0;
 484   IADDR UNUSED pc = abuf->addr;
 485   SEM_BRANCH_INIT
 486   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 487
 488 if (CPU (h_cond)) {
 489   {
 490     USI opval = FLD (i_disp8);
 491     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 492     written |= (1 << 2);
 493     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 494   }
 495 }
 496
 497   abuf->written = written;
 498   SEM_BRANCH_FINI (vpc);
 499   return vpc;
 500 #undef FLD
 501 }
 502
 503 /* bc24: bc.l $disp24 */
 504
 505 static SEM_PC
 506 SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 507 {
 508 #define FLD(f) abuf->fields.sfmt_bl24.f
 509   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 510   int UNUSED written = 0;
 511   IADDR UNUSED pc = abuf->addr;
 512   SEM_BRANCH_INIT
 513   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 514
 515 if (CPU (h_cond)) {
 516   {
 517     USI opval = FLD (i_disp24);
 518     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 519     written |= (1 << 2);
 520     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 521   }
 522 }
 523
 524   abuf->written = written;
 525   SEM_BRANCH_FINI (vpc);
 526   return vpc;
 527 #undef FLD
 528 }
 529
 530 /* beq: beq $src1,$src2,$disp16 */
 531
 532 static SEM_PC
 533 SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 534 {
 535 #define FLD(f) abuf->fields.sfmt_beq.f
 536   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 537   int UNUSED written = 0;
 538   IADDR UNUSED pc = abuf->addr;
 539   SEM_BRANCH_INIT
 540   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 541
 542 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 543   {
 544     USI opval = FLD (i_disp16);
 545     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 546     written |= (1 << 3);
 547     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 548   }
 549 }
 550
 551   abuf->written = written;
 552   SEM_BRANCH_FINI (vpc);
 553   return vpc;
 554 #undef FLD
 555 }
 556
 557 /* beqz: beqz $src2,$disp16 */
 558
 559 static SEM_PC
 560 SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 561 {
 562 #define FLD(f) abuf->fields.sfmt_beq.f
 563   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 564   int UNUSED written = 0;
 565   IADDR UNUSED pc = abuf->addr;
 566   SEM_BRANCH_INIT
 567   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 568
 569 if (EQSI (* FLD (i_src2), 0)) {
 570   {
 571     USI opval = FLD (i_disp16);
 572     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 573     written |= (1 << 2);
 574     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 575   }
 576 }
 577
 578   abuf->written = written;
 579   SEM_BRANCH_FINI (vpc);
 580   return vpc;
 581 #undef FLD
 582 }
 583
 584 /* bgez: bgez $src2,$disp16 */
 585
 586 static SEM_PC
 587 SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 588 {
 589 #define FLD(f) abuf->fields.sfmt_beq.f
 590   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 591   int UNUSED written = 0;
 592   IADDR UNUSED pc = abuf->addr;
 593   SEM_BRANCH_INIT
 594   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 595
 596 if (GESI (* FLD (i_src2), 0)) {
 597   {
 598     USI opval = FLD (i_disp16);
 599     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 600     written |= (1 << 2);
 601     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 602   }
 603 }
 604
 605   abuf->written = written;
 606   SEM_BRANCH_FINI (vpc);
 607   return vpc;
 608 #undef FLD
 609 }
 610
 611 /* bgtz: bgtz $src2,$disp16 */
 612
 613 static SEM_PC
 614 SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 615 {
 616 #define FLD(f) abuf->fields.sfmt_beq.f
 617   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 618   int UNUSED written = 0;
 619   IADDR UNUSED pc = abuf->addr;
 620   SEM_BRANCH_INIT
 621   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 622
 623 if (GTSI (* FLD (i_src2), 0)) {
 624   {
 625     USI opval = FLD (i_disp16);
 626     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 627     written |= (1 << 2);
 628     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 629   }
 630 }
 631
 632   abuf->written = written;
 633   SEM_BRANCH_FINI (vpc);
 634   return vpc;
 635 #undef FLD
 636 }
 637
 638 /* blez: blez $src2,$disp16 */
 639
 640 static SEM_PC
 641 SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 642 {
 643 #define FLD(f) abuf->fields.sfmt_beq.f
 644   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 645   int UNUSED written = 0;
 646   IADDR UNUSED pc = abuf->addr;
 647   SEM_BRANCH_INIT
 648   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 649
 650 if (LESI (* FLD (i_src2), 0)) {
 651   {
 652     USI opval = FLD (i_disp16);
 653     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 654     written |= (1 << 2);
 655     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 656   }
 657 }
 658
 659   abuf->written = written;
 660   SEM_BRANCH_FINI (vpc);
 661   return vpc;
 662 #undef FLD
 663 }
 664
 665 /* bltz: bltz $src2,$disp16 */
 666
 667 static SEM_PC
 668 SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 669 {
 670 #define FLD(f) abuf->fields.sfmt_beq.f
 671   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 672   int UNUSED written = 0;
 673   IADDR UNUSED pc = abuf->addr;
 674   SEM_BRANCH_INIT
 675   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 676
 677 if (LTSI (* FLD (i_src2), 0)) {
 678   {
 679     USI opval = FLD (i_disp16);
 680     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 681     written |= (1 << 2);
 682     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 683   }
 684 }
 685
 686   abuf->written = written;
 687   SEM_BRANCH_FINI (vpc);
 688   return vpc;
 689 #undef FLD
 690 }
 691
 692 /* bnez: bnez $src2,$disp16 */
 693
 694 static SEM_PC
 695 SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 696 {
 697 #define FLD(f) abuf->fields.sfmt_beq.f
 698   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 699   int UNUSED written = 0;
 700   IADDR UNUSED pc = abuf->addr;
 701   SEM_BRANCH_INIT
 702   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 703
 704 if (NESI (* FLD (i_src2), 0)) {
 705   {
 706     USI opval = FLD (i_disp16);
 707     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 708     written |= (1 << 2);
 709     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 710   }
 711 }
 712
 713   abuf->written = written;
 714   SEM_BRANCH_FINI (vpc);
 715   return vpc;
 716 #undef FLD
 717 }
 718
 719 /* bl8: bl.s $disp8 */
 720
 721 static SEM_PC
 722 SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 723 {
 724 #define FLD(f) abuf->fields.sfmt_bl8.f
 725   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 726   int UNUSED written = 0;
 727   IADDR UNUSED pc = abuf->addr;
 728   SEM_BRANCH_INIT
 729   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 730
 731 {
 732   {
 733     SI opval = ADDSI (ANDSI (pc, -4), 4);
 734     CPU (h_gr[((UINT) 14)]) = opval;
 735     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
 736   }
 737   {
 738     USI opval = FLD (i_disp8);
 739     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 740     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 741   }
 742 }
 743
 744   SEM_BRANCH_FINI (vpc);
 745   return vpc;
 746 #undef FLD
 747 }
 748
 749 /* bl24: bl.l $disp24 */
 750
 751 static SEM_PC
 752 SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 753 {
 754 #define FLD(f) abuf->fields.sfmt_bl24.f
 755   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 756   int UNUSED written = 0;
 757   IADDR UNUSED pc = abuf->addr;
 758   SEM_BRANCH_INIT
 759   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 760
 761 {
 762   {
 763     SI opval = ADDSI (pc, 4);
 764     CPU (h_gr[((UINT) 14)]) = opval;
 765     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
 766   }
 767   {
 768     USI opval = FLD (i_disp24);
 769     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 770     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 771   }
 772 }
 773
 774   SEM_BRANCH_FINI (vpc);
 775   return vpc;
 776 #undef FLD
 777 }
 778
 779 /* bnc8: bnc.s $disp8 */
 780
 781 static SEM_PC
 782 SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 783 {
 784 #define FLD(f) abuf->fields.sfmt_bl8.f
 785   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 786   int UNUSED written = 0;
 787   IADDR UNUSED pc = abuf->addr;
 788   SEM_BRANCH_INIT
 789   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 790
 791 if (NOTBI (CPU (h_cond))) {
 792   {
 793     USI opval = FLD (i_disp8);
 794     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 795     written |= (1 << 2);
 796     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 797   }
 798 }
 799
 800   abuf->written = written;
 801   SEM_BRANCH_FINI (vpc);
 802   return vpc;
 803 #undef FLD
 804 }
 805
 806 /* bnc24: bnc.l $disp24 */
 807
 808 static SEM_PC
 809 SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 810 {
 811 #define FLD(f) abuf->fields.sfmt_bl24.f
 812   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 813   int UNUSED written = 0;
 814   IADDR UNUSED pc = abuf->addr;
 815   SEM_BRANCH_INIT
 816   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 817
 818 if (NOTBI (CPU (h_cond))) {
 819   {
 820     USI opval = FLD (i_disp24);
 821     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 822     written |= (1 << 2);
 823     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 824   }
 825 }
 826
 827   abuf->written = written;
 828   SEM_BRANCH_FINI (vpc);
 829   return vpc;
 830 #undef FLD
 831 }
 832
 833 /* bne: bne $src1,$src2,$disp16 */
 834
 835 static SEM_PC
 836 SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 837 {
 838 #define FLD(f) abuf->fields.sfmt_beq.f
 839   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 840   int UNUSED written = 0;
 841   IADDR UNUSED pc = abuf->addr;
 842   SEM_BRANCH_INIT
 843   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 844
 845 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
 846   {
 847     USI opval = FLD (i_disp16);
 848     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 849     written |= (1 << 3);
 850     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 851   }
 852 }
 853
 854   abuf->written = written;
 855   SEM_BRANCH_FINI (vpc);
 856   return vpc;
 857 #undef FLD
 858 }
 859
 860 /* bra8: bra.s $disp8 */
 861
 862 static SEM_PC
 863 SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 864 {
 865 #define FLD(f) abuf->fields.sfmt_bl8.f
 866   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 867   int UNUSED written = 0;
 868   IADDR UNUSED pc = abuf->addr;
 869   SEM_BRANCH_INIT
 870   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 871
 872   {
 873     USI opval = FLD (i_disp8);
 874     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 875     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 876   }
 877
 878   SEM_BRANCH_FINI (vpc);
 879   return vpc;
 880 #undef FLD
 881 }
 882
 883 /* bra24: bra.l $disp24 */
 884
 885 static SEM_PC
 886 SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 887 {
 888 #define FLD(f) abuf->fields.sfmt_bl24.f
 889   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 890   int UNUSED written = 0;
 891   IADDR UNUSED pc = abuf->addr;
 892   SEM_BRANCH_INIT
 893   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 894
 895   {
 896     USI opval = FLD (i_disp24);
 897     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 898     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 899   }
 900
 901   SEM_BRANCH_FINI (vpc);
 902   return vpc;
 903 #undef FLD
 904 }
 905
 906 /* cmp: cmp $src1,$src2 */
 907
 908 static SEM_PC
 909 SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 910 {
 911 #define FLD(f) abuf->fields.sfmt_st_plus.f
 912   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 913   int UNUSED written = 0;
 914   IADDR UNUSED pc = abuf->addr;
 915   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 916
 917   {
 918     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
 919     CPU (h_cond) = opval;
 920     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 921   }
 922
 923   return vpc;
 924 #undef FLD
 925 }
 926
 927 /* cmpi: cmpi $src2,$simm16 */
 928
 929 static SEM_PC
 930 SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 931 {
 932 #define FLD(f) abuf->fields.sfmt_st_d.f
 933   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 934   int UNUSED written = 0;
 935   IADDR UNUSED pc = abuf->addr;
 936   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 937
 938   {
 939     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
 940     CPU (h_cond) = opval;
 941     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 942   }
 943
 944   return vpc;
 945 #undef FLD
 946 }
 947
 948 /* cmpu: cmpu $src1,$src2 */
 949
 950 static SEM_PC
 951 SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 952 {
 953 #define FLD(f) abuf->fields.sfmt_st_plus.f
 954   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 955   int UNUSED written = 0;
 956   IADDR UNUSED pc = abuf->addr;
 957   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 958
 959   {
 960     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
 961     CPU (h_cond) = opval;
 962     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 963   }
 964
 965   return vpc;
 966 #undef FLD
 967 }
 968
 969 /* cmpui: cmpui $src2,$simm16 */
 970
 971 static SEM_PC
 972 SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 973 {
 974 #define FLD(f) abuf->fields.sfmt_st_d.f
 975   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 976   int UNUSED written = 0;
 977   IADDR UNUSED pc = abuf->addr;
 978   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 979
 980   {
 981     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
 982     CPU (h_cond) = opval;
 983     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 984   }
 985
 986   return vpc;
 987 #undef FLD
 988 }
 989
 990 /* div: div $dr,$sr */
 991
 992 static SEM_PC
 993 SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 994 {
 995 #define FLD(f) abuf->fields.sfmt_add.f
 996   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 997   int UNUSED written = 0;
 998   IADDR UNUSED pc = abuf->addr;
 999   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1000
1001 if (NESI (* FLD (i_sr), 0)) {
1002   {
1003     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1004     * FLD (i_dr) = opval;
1005     written |= (1 << 2);
1006     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1007   }
1008 }
1009
1010   abuf->written = written;
1011   return vpc;
1012 #undef FLD
1013 }
1014
1015 /* divu: divu $dr,$sr */
1016
1017 static SEM_PC
1018 SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1019 {
1020 #define FLD(f) abuf->fields.sfmt_add.f
1021   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1022   int UNUSED written = 0;
1023   IADDR UNUSED pc = abuf->addr;
1024   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1025
1026 if (NESI (* FLD (i_sr), 0)) {
1027   {
1028     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1029     * FLD (i_dr) = opval;
1030     written |= (1 << 2);
1031     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1032   }
1033 }
1034
1035   abuf->written = written;
1036   return vpc;
1037 #undef FLD
1038 }
1039
1040 /* rem: rem $dr,$sr */
1041
1042 static SEM_PC
1043 SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1044 {
1045 #define FLD(f) abuf->fields.sfmt_add.f
1046   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1047   int UNUSED written = 0;
1048   IADDR UNUSED pc = abuf->addr;
1049   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1050
1051 if (NESI (* FLD (i_sr), 0)) {
1052   {
1053     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1054     * FLD (i_dr) = opval;
1055     written |= (1 << 2);
1056     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1057   }
1058 }
1059
1060   abuf->written = written;
1061   return vpc;
1062 #undef FLD
1063 }
1064
1065 /* remu: remu $dr,$sr */
1066
1067 static SEM_PC
1068 SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1069 {
1070 #define FLD(f) abuf->fields.sfmt_add.f
1071   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1072   int UNUSED written = 0;
1073   IADDR UNUSED pc = abuf->addr;
1074   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1075
1076 if (NESI (* FLD (i_sr), 0)) {
1077   {
1078     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1079     * FLD (i_dr) = opval;
1080     written |= (1 << 2);
1081     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1082   }
1083 }
1084
1085   abuf->written = written;
1086   return vpc;
1087 #undef FLD
1088 }
1089
1090 /* jl: jl $sr */
1091
1092 static SEM_PC
1093 SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1094 {
1095 #define FLD(f) abuf->fields.sfmt_jl.f
1096   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1097   int UNUSED written = 0;
1098   IADDR UNUSED pc = abuf->addr;
1099   SEM_BRANCH_INIT
1100   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1101
1102 {
1103   SI temp0;USI temp1;
1104   temp0 = ADDSI (ANDSI (pc, -4), 4);
1105   temp1 = ANDSI (* FLD (i_sr), -4);
1106   {
1107     SI opval = temp0;
1108     CPU (h_gr[((UINT) 14)]) = opval;
1109     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1110   }
1111   {
1112     USI opval = temp1;
1113     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1114     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1115   }
1116 }
1117
1118   SEM_BRANCH_FINI (vpc);
1119   return vpc;
1120 #undef FLD
1121 }
1122
1123 /* jmp: jmp $sr */
1124
1125 static SEM_PC
1126 SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1127 {
1128 #define FLD(f) abuf->fields.sfmt_mvtc.f
1129   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1130   int UNUSED written = 0;
1131   IADDR UNUSED pc = abuf->addr;
1132   SEM_BRANCH_INIT
1133   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1134
1135   {
1136     USI opval = ANDSI (* FLD (i_sr), -4);
1137     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1138     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1139   }
1140
1141   SEM_BRANCH_FINI (vpc);
1142   return vpc;
1143 #undef FLD
1144 }
1145
1146 /* ld: ld $dr,@$sr */
1147
1148 static SEM_PC
1149 SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1150 {
1151 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1153   int UNUSED written = 0;
1154   IADDR UNUSED pc = abuf->addr;
1155   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1156
1157   {
1158     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1159     * FLD (i_dr) = opval;
1160     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1161   }
1162
1163   return vpc;
1164 #undef FLD
1165 }
1166
1167 /* ld-d: ld $dr,@($slo16,$sr) */
1168
1169 static SEM_PC
1170 SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1171 {
1172 #define FLD(f) abuf->fields.sfmt_add3.f
1173   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1174   int UNUSED written = 0;
1175   IADDR UNUSED pc = abuf->addr;
1176   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1177
1178   {
1179     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1180     * FLD (i_dr) = opval;
1181     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1182   }
1183
1184   return vpc;
1185 #undef FLD
1186 }
1187
1188 /* ldb: ldb $dr,@$sr */
1189
1190 static SEM_PC
1191 SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1192 {
1193 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1194   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1195   int UNUSED written = 0;
1196   IADDR UNUSED pc = abuf->addr;
1197   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1198
1199   {
1200     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1201     * FLD (i_dr) = opval;
1202     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1203   }
1204
1205   return vpc;
1206 #undef FLD
1207 }
1208
1209 /* ldb-d: ldb $dr,@($slo16,$sr) */
1210
1211 static SEM_PC
1212 SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1213 {
1214 #define FLD(f) abuf->fields.sfmt_add3.f
1215   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1216   int UNUSED written = 0;
1217   IADDR UNUSED pc = abuf->addr;
1218   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1219
1220   {
1221     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1222     * FLD (i_dr) = opval;
1223     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1224   }
1225
1226   return vpc;
1227 #undef FLD
1228 }
1229
1230 /* ldh: ldh $dr,@$sr */
1231
1232 static SEM_PC
1233 SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1234 {
1235 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1236   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1237   int UNUSED written = 0;
1238   IADDR UNUSED pc = abuf->addr;
1239   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1240
1241   {
1242     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1243     * FLD (i_dr) = opval;
1244     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1245   }
1246
1247   return vpc;
1248 #undef FLD
1249 }
1250
1251 /* ldh-d: ldh $dr,@($slo16,$sr) */
1252
1253 static SEM_PC
1254 SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1255 {
1256 #define FLD(f) abuf->fields.sfmt_add3.f
1257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1258   int UNUSED written = 0;
1259   IADDR UNUSED pc = abuf->addr;
1260   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1261
1262   {
1263     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1264     * FLD (i_dr) = opval;
1265     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1266   }
1267
1268   return vpc;
1269 #undef FLD
1270 }
1271
1272 /* ldub: ldub $dr,@$sr */
1273
1274 static SEM_PC
1275 SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1276 {
1277 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1278   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1279   int UNUSED written = 0;
1280   IADDR UNUSED pc = abuf->addr;
1281   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1282
1283   {
1284     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1285     * FLD (i_dr) = opval;
1286     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1287   }
1288
1289   return vpc;
1290 #undef FLD
1291 }
1292
1293 /* ldub-d: ldub $dr,@($slo16,$sr) */
1294
1295 static SEM_PC
1296 SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1297 {
1298 #define FLD(f) abuf->fields.sfmt_add3.f
1299   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1300   int UNUSED written = 0;
1301   IADDR UNUSED pc = abuf->addr;
1302   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1303
1304   {
1305     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1306     * FLD (i_dr) = opval;
1307     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1308   }
1309
1310   return vpc;
1311 #undef FLD
1312 }
1313
1314 /* lduh: lduh $dr,@$sr */
1315
1316 static SEM_PC
1317 SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1318 {
1319 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1320   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1321   int UNUSED written = 0;
1322   IADDR UNUSED pc = abuf->addr;
1323   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1324
1325   {
1326     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1327     * FLD (i_dr) = opval;
1328     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1329   }
1330
1331   return vpc;
1332 #undef FLD
1333 }
1334
1335 /* lduh-d: lduh $dr,@($slo16,$sr) */
1336
1337 static SEM_PC
1338 SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1339 {
1340 #define FLD(f) abuf->fields.sfmt_add3.f
1341   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1342   int UNUSED written = 0;
1343   IADDR UNUSED pc = abuf->addr;
1344   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1345
1346   {
1347     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1348     * FLD (i_dr) = opval;
1349     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1350   }
1351
1352   return vpc;
1353 #undef FLD
1354 }
1355
1356 /* ld-plus: ld $dr,@$sr+ */
1357
1358 static SEM_PC
1359 SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1360 {
1361 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1362   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1363   int UNUSED written = 0;
1364   IADDR UNUSED pc = abuf->addr;
1365   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1366
1367 {
1368   SI temp0;SI temp1;
1369   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1370   temp1 = ADDSI (* FLD (i_sr), 4);
1371   {
1372     SI opval = temp0;
1373     * FLD (i_dr) = opval;
1374     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1375   }
1376   {
1377     SI opval = temp1;
1378     * FLD (i_sr) = opval;
1379     TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1380   }
1381 }
1382
1383   return vpc;
1384 #undef FLD
1385 }
1386
1387 /* ld24: ld24 $dr,$uimm24 */
1388
1389 static SEM_PC
1390 SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1391 {
1392 #define FLD(f) abuf->fields.sfmt_ld24.f
1393   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1394   int UNUSED written = 0;
1395   IADDR UNUSED pc = abuf->addr;
1396   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1397
1398   {
1399     SI opval = FLD (i_uimm24);
1400     * FLD (i_dr) = opval;
1401     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1402   }
1403
1404   return vpc;
1405 #undef FLD
1406 }
1407
1408 /* ldi8: ldi8 $dr,$simm8 */
1409
1410 static SEM_PC
1411 SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1412 {
1413 #define FLD(f) abuf->fields.sfmt_addi.f
1414   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1415   int UNUSED written = 0;
1416   IADDR UNUSED pc = abuf->addr;
1417   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1418
1419   {
1420     SI opval = FLD (f_simm8);
1421     * FLD (i_dr) = opval;
1422     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1423   }
1424
1425   return vpc;
1426 #undef FLD
1427 }
1428
1429 /* ldi16: ldi16 $dr,$hash$slo16 */
1430
1431 static SEM_PC
1432 SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1433 {
1434 #define FLD(f) abuf->fields.sfmt_add3.f
1435   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1436   int UNUSED written = 0;
1437   IADDR UNUSED pc = abuf->addr;
1438   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1439
1440   {
1441     SI opval = FLD (f_simm16);
1442     * FLD (i_dr) = opval;
1443     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1444   }
1445
1446   return vpc;
1447 #undef FLD
1448 }
1449
1450 /* lock: lock $dr,@$sr */
1451
1452 static SEM_PC
1453 SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1454 {
1455 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1456   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1457   int UNUSED written = 0;
1458   IADDR UNUSED pc = abuf->addr;
1459   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1460
1461 {
1462   {
1463     BI opval = 1;
1464     CPU (h_lock) = opval;
1465     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1466   }
1467   {
1468     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1469     * FLD (i_dr) = opval;
1470     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1471   }
1472 }
1473
1474   return vpc;
1475 #undef FLD
1476 }
1477
1478 /* machi: machi $src1,$src2 */
1479
1480 static SEM_PC
1481 SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1482 {
1483 #define FLD(f) abuf->fields.sfmt_st_plus.f
1484   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1485   int UNUSED written = 0;
1486   IADDR UNUSED pc = abuf->addr;
1487   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1488
1489   {
1490     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1491     SET_H_ACCUM (opval);
1492     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1493   }
1494
1495   return vpc;
1496 #undef FLD
1497 }
1498
1499 /* maclo: maclo $src1,$src2 */
1500
1501 static SEM_PC
1502 SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1503 {
1504 #define FLD(f) abuf->fields.sfmt_st_plus.f
1505   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1506   int UNUSED written = 0;
1507   IADDR UNUSED pc = abuf->addr;
1508   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1509
1510   {
1511     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1512     SET_H_ACCUM (opval);
1513     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1514   }
1515
1516   return vpc;
1517 #undef FLD
1518 }
1519
1520 /* macwhi: macwhi $src1,$src2 */
1521
1522 static SEM_PC
1523 SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1524 {
1525 #define FLD(f) abuf->fields.sfmt_st_plus.f
1526   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1527   int UNUSED written = 0;
1528   IADDR UNUSED pc = abuf->addr;
1529   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1530
1531   {
1532     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1533     SET_H_ACCUM (opval);
1534     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1535   }
1536
1537   return vpc;
1538 #undef FLD
1539 }
1540
1541 /* macwlo: macwlo $src1,$src2 */
1542
1543 static SEM_PC
1544 SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1545 {
1546 #define FLD(f) abuf->fields.sfmt_st_plus.f
1547   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1548   int UNUSED written = 0;
1549   IADDR UNUSED pc = abuf->addr;
1550   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1551
1552   {
1553     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1554     SET_H_ACCUM (opval);
1555     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1556   }
1557
1558   return vpc;
1559 #undef FLD
1560 }
1561
1562 /* mul: mul $dr,$sr */
1563
1564 static SEM_PC
1565 SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1566 {
1567 #define FLD(f) abuf->fields.sfmt_add.f
1568   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1569   int UNUSED written = 0;
1570   IADDR UNUSED pc = abuf->addr;
1571   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1572
1573   {
1574     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
1575     * FLD (i_dr) = opval;
1576     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1577   }
1578
1579   return vpc;
1580 #undef FLD
1581 }
1582
1583 /* mulhi: mulhi $src1,$src2 */
1584
1585 static SEM_PC
1586 SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1587 {
1588 #define FLD(f) abuf->fields.sfmt_st_plus.f
1589   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1590   int UNUSED written = 0;
1591   IADDR UNUSED pc = abuf->addr;
1592   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1593
1594   {
1595     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
1596     SET_H_ACCUM (opval);
1597     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1598   }
1599
1600   return vpc;
1601 #undef FLD
1602 }
1603
1604 /* mullo: mullo $src1,$src2 */
1605
1606 static SEM_PC
1607 SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1608 {
1609 #define FLD(f) abuf->fields.sfmt_st_plus.f
1610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1611   int UNUSED written = 0;
1612   IADDR UNUSED pc = abuf->addr;
1613   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1614
1615   {
1616     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
1617     SET_H_ACCUM (opval);
1618     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1619   }
1620
1621   return vpc;
1622 #undef FLD
1623 }
1624
1625 /* mulwhi: mulwhi $src1,$src2 */
1626
1627 static SEM_PC
1628 SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1629 {
1630 #define FLD(f) abuf->fields.sfmt_st_plus.f
1631   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1632   int UNUSED written = 0;
1633   IADDR UNUSED pc = abuf->addr;
1634   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1635
1636   {
1637     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
1638     SET_H_ACCUM (opval);
1639     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1640   }
1641
1642   return vpc;
1643 #undef FLD
1644 }
1645
1646 /* mulwlo: mulwlo $src1,$src2 */
1647
1648 static SEM_PC
1649 SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1650 {
1651 #define FLD(f) abuf->fields.sfmt_st_plus.f
1652   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1653   int UNUSED written = 0;
1654   IADDR UNUSED pc = abuf->addr;
1655   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1656
1657   {
1658     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
1659     SET_H_ACCUM (opval);
1660     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1661   }
1662
1663   return vpc;
1664 #undef FLD
1665 }
1666
1667 /* mv: mv $dr,$sr */
1668
1669 static SEM_PC
1670 SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1671 {
1672 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1673   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1674   int UNUSED written = 0;
1675   IADDR UNUSED pc = abuf->addr;
1676   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1677
1678   {
1679     SI opval = * FLD (i_sr);
1680     * FLD (i_dr) = opval;
1681     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1682   }
1683
1684   return vpc;
1685 #undef FLD
1686 }
1687
1688 /* mvfachi: mvfachi $dr */
1689
1690 static SEM_PC
1691 SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1692 {
1693 #define FLD(f) abuf->fields.sfmt_seth.f
1694   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1695   int UNUSED written = 0;
1696   IADDR UNUSED pc = abuf->addr;
1697   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1698
1699   {
1700     SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
1701     * FLD (i_dr) = opval;
1702     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1703   }
1704
1705   return vpc;
1706 #undef FLD
1707 }
1708
1709 /* mvfaclo: mvfaclo $dr */
1710
1711 static SEM_PC
1712 SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1713 {
1714 #define FLD(f) abuf->fields.sfmt_seth.f
1715   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1716   int UNUSED written = 0;
1717   IADDR UNUSED pc = abuf->addr;
1718   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1719
1720   {
1721     SI opval = TRUNCDISI (GET_H_ACCUM ());
1722     * FLD (i_dr) = opval;
1723     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1724   }
1725
1726   return vpc;
1727 #undef FLD
1728 }
1729
1730 /* mvfacmi: mvfacmi $dr */
1731
1732 static SEM_PC
1733 SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1734 {
1735 #define FLD(f) abuf->fields.sfmt_seth.f
1736   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1737   int UNUSED written = 0;
1738   IADDR UNUSED pc = abuf->addr;
1739   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1740
1741   {
1742     SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
1743     * FLD (i_dr) = opval;
1744     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1745   }
1746
1747   return vpc;
1748 #undef FLD
1749 }
1750
1751 /* mvfc: mvfc $dr,$scr */
1752
1753 static SEM_PC
1754 SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1755 {
1756 #define FLD(f) abuf->fields.sfmt_mvfc.f
1757   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1758   int UNUSED written = 0;
1759   IADDR UNUSED pc = abuf->addr;
1760   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1761
1762   {
1763     SI opval = GET_H_CR (FLD (f_r2));
1764     * FLD (i_dr) = opval;
1765     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1766   }
1767
1768   return vpc;
1769 #undef FLD
1770 }
1771
1772 /* mvtachi: mvtachi $src1 */
1773
1774 static SEM_PC
1775 SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1776 {
1777 #define FLD(f) abuf->fields.sfmt_st_plus.f
1778   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1779   int UNUSED written = 0;
1780   IADDR UNUSED pc = abuf->addr;
1781   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1782
1783   {
1784     DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
1785     SET_H_ACCUM (opval);
1786     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1787   }
1788
1789   return vpc;
1790 #undef FLD
1791 }
1792
1793 /* mvtaclo: mvtaclo $src1 */
1794
1795 static SEM_PC
1796 SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1797 {
1798 #define FLD(f) abuf->fields.sfmt_st_plus.f
1799   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1800   int UNUSED written = 0;
1801   IADDR UNUSED pc = abuf->addr;
1802   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1803
1804   {
1805     DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
1806     SET_H_ACCUM (opval);
1807     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1808   }
1809
1810   return vpc;
1811 #undef FLD
1812 }
1813
1814 /* mvtc: mvtc $sr,$dcr */
1815
1816 static SEM_PC
1817 SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1818 {
1819 #define FLD(f) abuf->fields.sfmt_mvtc.f
1820   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1821   int UNUSED written = 0;
1822   IADDR UNUSED pc = abuf->addr;
1823   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1824
1825   {
1826     USI opval = * FLD (i_sr);
1827     SET_H_CR (FLD (f_r1), opval);
1828     TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
1829   }
1830
1831   return vpc;
1832 #undef FLD
1833 }
1834
1835 /* neg: neg $dr,$sr */
1836
1837 static SEM_PC
1838 SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1839 {
1840 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1842   int UNUSED written = 0;
1843   IADDR UNUSED pc = abuf->addr;
1844   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1845
1846   {
1847     SI opval = NEGSI (* FLD (i_sr));
1848     * FLD (i_dr) = opval;
1849     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1850   }
1851
1852   return vpc;
1853 #undef FLD
1854 }
1855
1856 /* nop: nop */
1857
1858 static SEM_PC
1859 SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1860 {
1861 #define FLD(f) abuf->fields.fmt_empty.f
1862   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1863   int UNUSED written = 0;
1864   IADDR UNUSED pc = abuf->addr;
1865   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1866
1867 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
1868
1869   return vpc;
1870 #undef FLD
1871 }
1872
1873 /* not: not $dr,$sr */
1874
1875 static SEM_PC
1876 SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1877 {
1878 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1879   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1880   int UNUSED written = 0;
1881   IADDR UNUSED pc = abuf->addr;
1882   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1883
1884   {
1885     SI opval = INVSI (* FLD (i_sr));
1886     * FLD (i_dr) = opval;
1887     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1888   }
1889
1890   return vpc;
1891 #undef FLD
1892 }
1893
1894 /* rac: rac */
1895
1896 static SEM_PC
1897 SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1898 {
1899 #define FLD(f) abuf->fields.fmt_empty.f
1900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1901   int UNUSED written = 0;
1902   IADDR UNUSED pc = abuf->addr;
1903   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1904
1905 {
1906   DI tmp_tmp1;
1907   tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
1908   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
1909   {
1910     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
1911     SET_H_ACCUM (opval);
1912     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1913   }
1914 }
1915
1916   return vpc;
1917 #undef FLD
1918 }
1919
1920 /* rach: rach */
1921
1922 static SEM_PC
1923 SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1924 {
1925 #define FLD(f) abuf->fields.fmt_empty.f
1926   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1927   int UNUSED written = 0;
1928   IADDR UNUSED pc = abuf->addr;
1929   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1930
1931 {
1932   DI tmp_tmp1;
1933   tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
1934 if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
1935   tmp_tmp1 = MAKEDI (16383, 0x80000000);
1936 } else {
1937 if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
1938   tmp_tmp1 = MAKEDI (16760832, 0);
1939 } else {
1940   tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1941 }
1942 }
1943   tmp_tmp1 = SLLDI (tmp_tmp1, 1);
1944   {
1945     DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
1946     SET_H_ACCUM (opval);
1947     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1948   }
1949 }
1950
1951   return vpc;
1952 #undef FLD
1953 }
1954
1955 /* rte: rte */
1956
1957 static SEM_PC
1958 SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1959 {
1960 #define FLD(f) abuf->fields.fmt_empty.f
1961   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1962   int UNUSED written = 0;
1963   IADDR UNUSED pc = abuf->addr;
1964   SEM_BRANCH_INIT
1965   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1966
1967 {
1968   {
1969     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
1970     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1971     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1972   }
1973   {
1974     USI opval = GET_H_CR (((UINT) 14));
1975     SET_H_CR (((UINT) 6), opval);
1976     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
1977   }
1978   {
1979     UQI opval = CPU (h_bpsw);
1980     SET_H_PSW (opval);
1981     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
1982   }
1983   {
1984     UQI opval = CPU (h_bbpsw);
1985     CPU (h_bpsw) = opval;
1986     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
1987   }
1988 }
1989
1990   SEM_BRANCH_FINI (vpc);
1991   return vpc;
1992 #undef FLD
1993 }
1994
1995 /* seth: seth $dr,$hash$hi16 */
1996
1997 static SEM_PC
1998 SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1999 {
2000 #define FLD(f) abuf->fields.sfmt_seth.f
2001   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2002   int UNUSED written = 0;
2003   IADDR UNUSED pc = abuf->addr;
2004   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2005
2006   {
2007     SI opval = SLLSI (FLD (f_hi16), 16);
2008     * FLD (i_dr) = opval;
2009     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2010   }
2011
2012   return vpc;
2013 #undef FLD
2014 }
2015
2016 /* sll: sll $dr,$sr */
2017
2018 static SEM_PC
2019 SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2020 {
2021 #define FLD(f) abuf->fields.sfmt_add.f
2022   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2023   int UNUSED written = 0;
2024   IADDR UNUSED pc = abuf->addr;
2025   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2026
2027   {
2028     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2029     * FLD (i_dr) = opval;
2030     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2031   }
2032
2033   return vpc;
2034 #undef FLD
2035 }
2036
2037 /* sll3: sll3 $dr,$sr,$simm16 */
2038
2039 static SEM_PC
2040 SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2041 {
2042 #define FLD(f) abuf->fields.sfmt_add3.f
2043   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2044   int UNUSED written = 0;
2045   IADDR UNUSED pc = abuf->addr;
2046   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2047
2048   {
2049     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2050     * FLD (i_dr) = opval;
2051     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2052   }
2053
2054   return vpc;
2055 #undef FLD
2056 }
2057
2058 /* slli: slli $dr,$uimm5 */
2059
2060 static SEM_PC
2061 SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2062 {
2063 #define FLD(f) abuf->fields.sfmt_slli.f
2064   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2065   int UNUSED written = 0;
2066   IADDR UNUSED pc = abuf->addr;
2067   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2068
2069   {
2070     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2071     * FLD (i_dr) = opval;
2072     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2073   }
2074
2075   return vpc;
2076 #undef FLD
2077 }
2078
2079 /* sra: sra $dr,$sr */
2080
2081 static SEM_PC
2082 SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2083 {
2084 #define FLD(f) abuf->fields.sfmt_add.f
2085   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2086   int UNUSED written = 0;
2087   IADDR UNUSED pc = abuf->addr;
2088   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2089
2090   {
2091     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2092     * FLD (i_dr) = opval;
2093     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2094   }
2095
2096   return vpc;
2097 #undef FLD
2098 }
2099
2100 /* sra3: sra3 $dr,$sr,$simm16 */
2101
2102 static SEM_PC
2103 SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2104 {
2105 #define FLD(f) abuf->fields.sfmt_add3.f
2106   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2107   int UNUSED written = 0;
2108   IADDR UNUSED pc = abuf->addr;
2109   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2110
2111   {
2112     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2113     * FLD (i_dr) = opval;
2114     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2115   }
2116
2117   return vpc;
2118 #undef FLD
2119 }
2120
2121 /* srai: srai $dr,$uimm5 */
2122
2123 static SEM_PC
2124 SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2125 {
2126 #define FLD(f) abuf->fields.sfmt_slli.f
2127   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2128   int UNUSED written = 0;
2129   IADDR UNUSED pc = abuf->addr;
2130   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2131
2132   {
2133     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2134     * FLD (i_dr) = opval;
2135     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2136   }
2137
2138   return vpc;
2139 #undef FLD
2140 }
2141
2142 /* srl: srl $dr,$sr */
2143
2144 static SEM_PC
2145 SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2146 {
2147 #define FLD(f) abuf->fields.sfmt_add.f
2148   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2149   int UNUSED written = 0;
2150   IADDR UNUSED pc = abuf->addr;
2151   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2152
2153   {
2154     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2155     * FLD (i_dr) = opval;
2156     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2157   }
2158
2159   return vpc;
2160 #undef FLD
2161 }
2162
2163 /* srl3: srl3 $dr,$sr,$simm16 */
2164
2165 static SEM_PC
2166 SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2167 {
2168 #define FLD(f) abuf->fields.sfmt_add3.f
2169   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2170   int UNUSED written = 0;
2171   IADDR UNUSED pc = abuf->addr;
2172   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2173
2174   {
2175     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2176     * FLD (i_dr) = opval;
2177     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2178   }
2179
2180   return vpc;
2181 #undef FLD
2182 }
2183
2184 /* srli: srli $dr,$uimm5 */
2185
2186 static SEM_PC
2187 SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2188 {
2189 #define FLD(f) abuf->fields.sfmt_slli.f
2190   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2191   int UNUSED written = 0;
2192   IADDR UNUSED pc = abuf->addr;
2193   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2194
2195   {
2196     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2197     * FLD (i_dr) = opval;
2198     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2199   }
2200
2201   return vpc;
2202 #undef FLD
2203 }
2204
2205 /* st: st $src1,@$src2 */
2206
2207 static SEM_PC
2208 SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2209 {
2210 #define FLD(f) abuf->fields.sfmt_st_plus.f
2211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2212   int UNUSED written = 0;
2213   IADDR UNUSED pc = abuf->addr;
2214   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2215
2216   {
2217     SI opval = * FLD (i_src1);
2218     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2219     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2220   }
2221
2222   return vpc;
2223 #undef FLD
2224 }
2225
2226 /* st-d: st $src1,@($slo16,$src2) */
2227
2228 static SEM_PC
2229 SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2230 {
2231 #define FLD(f) abuf->fields.sfmt_st_d.f
2232   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2233   int UNUSED written = 0;
2234   IADDR UNUSED pc = abuf->addr;
2235   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2236
2237   {
2238     SI opval = * FLD (i_src1);
2239     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2240     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2241   }
2242
2243   return vpc;
2244 #undef FLD
2245 }
2246
2247 /* stb: stb $src1,@$src2 */
2248
2249 static SEM_PC
2250 SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2251 {
2252 #define FLD(f) abuf->fields.sfmt_st_plus.f
2253   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2254   int UNUSED written = 0;
2255   IADDR UNUSED pc = abuf->addr;
2256   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2257
2258   {
2259     QI opval = * FLD (i_src1);
2260     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2261     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2262   }
2263
2264   return vpc;
2265 #undef FLD
2266 }
2267
2268 /* stb-d: stb $src1,@($slo16,$src2) */
2269
2270 static SEM_PC
2271 SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2272 {
2273 #define FLD(f) abuf->fields.sfmt_st_d.f
2274   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2275   int UNUSED written = 0;
2276   IADDR UNUSED pc = abuf->addr;
2277   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2278
2279   {
2280     QI opval = * FLD (i_src1);
2281     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2282     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2283   }
2284
2285   return vpc;
2286 #undef FLD
2287 }
2288
2289 /* sth: sth $src1,@$src2 */
2290
2291 static SEM_PC
2292 SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2293 {
2294 #define FLD(f) abuf->fields.sfmt_st_plus.f
2295   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2296   int UNUSED written = 0;
2297   IADDR UNUSED pc = abuf->addr;
2298   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2299
2300   {
2301     HI opval = * FLD (i_src1);
2302     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2303     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2304   }
2305
2306   return vpc;
2307 #undef FLD
2308 }
2309
2310 /* sth-d: sth $src1,@($slo16,$src2) */
2311
2312 static SEM_PC
2313 SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2314 {
2315 #define FLD(f) abuf->fields.sfmt_st_d.f
2316   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2317   int UNUSED written = 0;
2318   IADDR UNUSED pc = abuf->addr;
2319   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2320
2321   {
2322     HI opval = * FLD (i_src1);
2323     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2324     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2325   }
2326
2327   return vpc;
2328 #undef FLD
2329 }
2330
2331 /* st-plus: st $src1,@+$src2 */
2332
2333 static SEM_PC
2334 SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2335 {
2336 #define FLD(f) abuf->fields.sfmt_st_plus.f
2337   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2338   int UNUSED written = 0;
2339   IADDR UNUSED pc = abuf->addr;
2340   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2341
2342 {
2343   SI tmp_new_src2;
2344   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2345   {
2346     SI opval = * FLD (i_src1);
2347     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2348     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2349   }
2350   {
2351     SI opval = tmp_new_src2;
2352     * FLD (i_src2) = opval;
2353     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2354   }
2355 }
2356
2357   return vpc;
2358 #undef FLD
2359 }
2360
2361 /* st-minus: st $src1,@-$src2 */
2362
2363 static SEM_PC
2364 SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2365 {
2366 #define FLD(f) abuf->fields.sfmt_st_plus.f
2367   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2368   int UNUSED written = 0;
2369   IADDR UNUSED pc = abuf->addr;
2370   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2371
2372 {
2373   SI tmp_new_src2;
2374   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2375   {
2376     SI opval = * FLD (i_src1);
2377     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2378     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2379   }
2380   {
2381     SI opval = tmp_new_src2;
2382     * FLD (i_src2) = opval;
2383     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2384   }
2385 }
2386
2387   return vpc;
2388 #undef FLD
2389 }
2390
2391 /* sub: sub $dr,$sr */
2392
2393 static SEM_PC
2394 SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2395 {
2396 #define FLD(f) abuf->fields.sfmt_add.f
2397   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2398   int UNUSED written = 0;
2399   IADDR UNUSED pc = abuf->addr;
2400   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2401
2402   {
2403     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2404     * FLD (i_dr) = opval;
2405     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2406   }
2407
2408   return vpc;
2409 #undef FLD
2410 }
2411
2412 /* subv: subv $dr,$sr */
2413
2414 static SEM_PC
2415 SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2416 {
2417 #define FLD(f) abuf->fields.sfmt_add.f
2418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2419   int UNUSED written = 0;
2420   IADDR UNUSED pc = abuf->addr;
2421   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2422
2423 {
2424   SI temp0;BI temp1;
2425   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2426   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2427   {
2428     SI opval = temp0;
2429     * FLD (i_dr) = opval;
2430     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2431   }
2432   {
2433     BI opval = temp1;
2434     CPU (h_cond) = opval;
2435     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2436   }
2437 }
2438
2439   return vpc;
2440 #undef FLD
2441 }
2442
2443 /* subx: subx $dr,$sr */
2444
2445 static SEM_PC
2446 SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2447 {
2448 #define FLD(f) abuf->fields.sfmt_add.f
2449   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2450   int UNUSED written = 0;
2451   IADDR UNUSED pc = abuf->addr;
2452   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2453
2454 {
2455   SI temp0;BI temp1;
2456   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2457   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2458   {
2459     SI opval = temp0;
2460     * FLD (i_dr) = opval;
2461     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2462   }
2463   {
2464     BI opval = temp1;
2465     CPU (h_cond) = opval;
2466     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2467   }
2468 }
2469
2470   return vpc;
2471 #undef FLD
2472 }
2473
2474 /* trap: trap $uimm4 */
2475
2476 static SEM_PC
2477 SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2478 {
2479 #define FLD(f) abuf->fields.sfmt_trap.f
2480   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2481   int UNUSED written = 0;
2482   IADDR UNUSED pc = abuf->addr;
2483   SEM_BRANCH_INIT
2484   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2485
2486 {
2487   {
2488     USI opval = GET_H_CR (((UINT) 6));
2489     SET_H_CR (((UINT) 14), opval);
2490     TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2491   }
2492   {
2493     USI opval = ADDSI (pc, 4);
2494     SET_H_CR (((UINT) 6), opval);
2495     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2496   }
2497   {
2498     UQI opval = CPU (h_bpsw);
2499     CPU (h_bbpsw) = opval;
2500     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2501   }
2502   {
2503     UQI opval = GET_H_PSW ();
2504     CPU (h_bpsw) = opval;
2505     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2506   }
2507   {
2508     UQI opval = ANDQI (GET_H_PSW (), 128);
2509     SET_H_PSW (opval);
2510     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2511   }
2512   {
2513     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2514     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2515     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2516   }
2517 }
2518
2519   SEM_BRANCH_FINI (vpc);
2520   return vpc;
2521 #undef FLD
2522 }
2523
2524 /* unlock: unlock $src1,@$src2 */
2525
2526 static SEM_PC
2527 SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2528 {
2529 #define FLD(f) abuf->fields.sfmt_st_plus.f
2530   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2531   int UNUSED written = 0;
2532   IADDR UNUSED pc = abuf->addr;
2533   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2534
2535 {
2536 if (CPU (h_lock)) {
2537   {
2538     SI opval = * FLD (i_src1);
2539     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2540     written |= (1 << 4);
2541     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2542   }
2543 }
2544   {
2545     BI opval = 0;
2546     CPU (h_lock) = opval;
2547     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2548   }
2549 }
2550
2551   abuf->written = written;
2552   return vpc;
2553 #undef FLD
2554 }
2555
2556 /* Table of all semantic fns.  */
2557
2558 static const struct sem_fn_desc sem_fns[] = {
2559   { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) },
2560   { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) },
2561   { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) },
2562   { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) },
2563   { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) },
2564   { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) },
2565   { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) },
2566   { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) },
2567   { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) },
2568   { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) },
2569   { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) },
2570   { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) },
2571   { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) },
2572   { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) },
2573   { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) },
2574   { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) },
2575   { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) },
2576   { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) },
2577   { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) },
2578   { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) },
2579   { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) },
2580   { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) },
2581   { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) },
2582   { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) },
2583   { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) },
2584   { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) },
2585   { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) },
2586   { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) },
2587   { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) },
2588   { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) },
2589   { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) },
2590   { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) },
2591   { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) },
2592   { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) },
2593   { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) },
2594   { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) },
2595   { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) },
2596   { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) },
2597   { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) },
2598   { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) },
2599   { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) },
2600   { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) },
2601   { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) },
2602   { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) },
2603   { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) },
2604   { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) },
2605   { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) },
2606   { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) },
2607   { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) },
2608   { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) },
2609   { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) },
2610   { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) },
2611   { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) },
2612   { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) },
2613   { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) },
2614   { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) },
2615   { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) },
2616   { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) },
2617   { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) },
2618   { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) },
2619   { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) },
2620   { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) },
2621   { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) },
2622   { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) },
2623   { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) },
2624   { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) },
2625   { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) },
2626   { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) },
2627   { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) },
2628   { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) },
2629   { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) },
2630   { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) },
2631   { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) },
2632   { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) },
2633   { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) },
2634   { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) },
2635   { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) },
2636   { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) },
2637   { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) },
2638   { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) },
2639   { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) },
2640   { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) },
2641   { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) },
2642   { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) },
2643   { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) },
2644   { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) },
2645   { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) },
2646   { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) },
2647   { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) },
2648   { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) },
2649   { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) },
2650   { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) },
2651   { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) },
2652   { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) },
2653   { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) },
2654   { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) },
2655   { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) },
2656   { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) },
2657   { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) },
2658   { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) },
2659   { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) },
2660   { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) },
2661   { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) },
2662   { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) },
2663   { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) },
2664   { 0, 0 }
2665 };
2666
2667 /* Add the semantic fns to IDESC_TABLE.  */
2668
2669 void
2670 SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu)
2671 {
2672   IDESC *idesc_table = CPU_IDESC (current_cpu);
2673   const struct sem_fn_desc *sf;
2674   int mach_num = MACH_NUM (CPU_MACH (current_cpu));
2675
2676   for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
2677     {
2678       int valid_p = CGEN_INSN_MACH_HAS_P (idesc_table[sf->index].idata, mach_num);
2679 #if FAST_P
2680       if (valid_p)
2681         idesc_table[sf->index].sem_fast = sf->fn;
2682       else
2683         idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid);
2684 #else
2685       if (valid_p)
2686         idesc_table[sf->index].sem_full = sf->fn;
2687       else
2688         idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid);
2689 #endif
2690     }
2691 }
2692