sim/m32r/sim-if.c

   1 /* Main simulator entry points specific to the M32R.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5    This file is part of GDB, the GNU debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #include "sim-main.h"
  24 #include "sim-options.h"
  25 #include "libiberty.h"
  26 #include "bfd.h"
  27
  28 #include <string.h>
  29 #include <stdlib.h>
  30
  31 #include "dv-m32r_uart.h"
  32
  33 #define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
  34
  35 static void free_state (SIM_DESC);
  36 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  37 \f
  38 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  39
  40 static void
  41 free_state (SIM_DESC sd)
  42 {
  43   if (STATE_MODULES (sd) != NULL)
  44     sim_module_uninstall (sd);
  45   sim_cpu_free_all (sd);
  46   sim_state_free (sd);
  47 }
  48
  49 extern const SIM_MACH * const m32r_sim_machs[];
  50
  51 /* Create an instance of the simulator.  */
  52
  53 SIM_DESC
  54 sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
  55           char * const *argv)
  56 {
  57   SIM_DESC sd = sim_state_alloc (kind, callback);
  58   char c;
  59   int i;
  60
  61   /* Set default options before parsing user options.  */
  62   STATE_MACHS (sd) = m32r_sim_machs;
  63   STATE_MODEL_NAME (sd) = "m32r/d";
  64   current_alignment = STRICT_ALIGNMENT;
  65   current_target_byte_order = BFD_ENDIAN_BIG;
  66
  67   /* The cpu data is kept in a separately allocated chunk of memory.  */
  68   if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
  69     {
  70       free_state (sd);
  71       return 0;
  72     }
  73
  74   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  75     {
  76       free_state (sd);
  77       return 0;
  78     }
  79
  80   /* The parser will print an error message for us, so we silently return.  */
  81   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  82     {
  83       free_state (sd);
  84       return 0;
  85     }
  86
  87   /* Allocate a handler for the control registers and other devices
  88      if no memory for that range has been allocated by the user.
  89      All are allocated in one chunk to keep things from being
  90      unnecessarily complicated.
  91      TODO: Move these to the sim-model framework.  */
  92   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
  93   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
  94
  95   /* Allocate core managed memory if none specified by user.
  96      Use address 4 here in case the user wanted address 0 unmapped.  */
  97   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
  98     sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
  99
 100   /* check for/establish the reference program image */
 101   if (sim_analyze_program (sd,
 102                            (STATE_PROG_ARGV (sd) != NULL
 103                             ? *STATE_PROG_ARGV (sd)
 104                             : NULL),
 105                            abfd) != SIM_RC_OK)
 106     {
 107       free_state (sd);
 108       return 0;
 109     }
 110
 111   /* Establish any remaining configuration options.  */
 112   if (sim_config (sd) != SIM_RC_OK)
 113     {
 114       free_state (sd);
 115       return 0;
 116     }
 117
 118   if (sim_post_argv_init (sd) != SIM_RC_OK)
 119     {
 120       free_state (sd);
 121       return 0;
 122     }
 123
 124   /* Open a copy of the cpu descriptor table.  */
 125   {
 126     CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
 127                                              CGEN_ENDIAN_BIG);
 128     for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 129       {
 130         SIM_CPU *cpu = STATE_CPU (sd, i);
 131         CPU_CPU_DESC (cpu) = cd;
 132         CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
 133       }
 134     m32r_cgen_init_dis (cd);
 135   }
 136
 137   for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 138     {
 139       /* Only needed for profiling, but the structure member is small.  */
 140       memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
 141               sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
 142       /* Hook in callback for reporting these stats */
 143       PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
 144         = print_m32r_misc_cpu;
 145     }
 146
 147   return sd;
 148 }
 149 \f
 150 SIM_RC
 151 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
 152                      char * const *envp)
 153 {
 154   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 155   SIM_ADDR addr;
 156
 157   if (abfd != NULL)
 158     addr = bfd_get_start_address (abfd);
 159   else
 160     addr = 0;
 161   sim_pc_set (current_cpu, addr);
 162
 163   if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
 164     {
 165       m32rbf_h_cr_set (current_cpu,
 166                        m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
 167       m32rbf_h_cr_set (current_cpu,
 168                        m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
 169     }
 170
 171   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 172      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 173      with `gdb`), we need to handle it because the user can change the
 174      argv on the fly via gdb's 'run'.  */
 175   if (STATE_PROG_ARGV (sd) != argv)
 176     {
 177       freeargv (STATE_PROG_ARGV (sd));
 178       STATE_PROG_ARGV (sd) = dupargv (argv);
 179     }
 180
 181   return SIM_RC_OK;
 182 }
 183
 184 /* PROFILE_CPU_CALLBACK */
 185
 186 static void
 187 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 188 {
 189   SIM_DESC sd = CPU_STATE (cpu);
 190   char buf[20];
 191
 192   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 193     {
 194       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 195       sim_io_printf (sd, "  %-*s %s\n\n",
 196                      PROFILE_LABEL_WIDTH, "Fill nops:",
 197                      sim_add_commas (buf, sizeof (buf),
 198                                      CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
 199       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 200         sim_io_printf (sd, "  %-*s %s\n\n",
 201                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 202                        sim_add_commas (buf, sizeof (buf),
 203                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 204       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
 205         sim_io_printf (sd, "  %-*s %s\n\n",
 206                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 207                        sim_add_commas (buf, sizeof (buf),
 208                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 209     }
 210 }