sim/mips/ChangeLog

   1 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
   2
   3         * configure: Regenerate.
   4
   5 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
   6
   7         PR sim/20808
   8         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
   9         and SD to sd.
  10
  11 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  12
  13         PR sim/20809
  14         * mips.igen (check_u64): Enable for `r3900'.
  15
  16 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  19         STATE_PROG_BFD (sd).
  20         * configure: Regenerate.
  21
  22 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  23             Maciej W. Rozycki  <macro@imgtec.com>
  24
  25         PR sim/19441
  26         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  27         `micromips64' and `micromipsdsp' only.
  28         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  29         (do_micromips_jalr, do_micromips_jal): Likewise.
  30         (compute_movep_src_reg): Likewise.
  31         (compute_andi16_imm): Likewise.
  32         (convert_fmt_micromips): Likewise.
  33         (convert_fmt_micromips_cvt_d): Likewise.
  34         (convert_fmt_micromips_cvt_s): Likewise.
  35         (FMT_MICROMIPS): Likewise.
  36         (FMT_MICROMIPS_CVT_D): Likewise.
  37         (FMT_MICROMIPS_CVT_S): Likewise.
  38
  39 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * interp.c: Include elf-bfd.h.
  42         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
  43         ELFCLASS32.
  44
  45 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * config.in, configure: Regenerate.
  48
  49 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  50
  51         * configure: Regenerate.
  52
  53 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  54
  55         * configure: Regenerate.
  56
  57 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * configure: Regenerate.
  60
  61 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  62
  63         * configure: Regenerate.
  64
  65 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  66
  67         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
  68         * configure: Regenerate.
  69
  70 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  71
  72         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
  73         * configure: Regenerate.
  74
  75 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  76
  77         * configure: Regenerate.
  78
  79 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
  80
  81         * configure: Regenerate.
  82
  83 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
  84
  85         * config.in, configure: Regenerate.
  86
  87 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
  88
  89         * interp.c (sim_open): Mark argv const.
  90         (sim_create_inferior): Mark argv and env const.
  91
  92 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
  93
  94         * configure: Regenerate.
  95
  96 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
  97
  98         * interp.c (sim_open): Update sim_parse_args comment.
  99
 100 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 101
 102         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 103         * configure: Regenerate.
 104
 105 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 108         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 109         * configure: Regenerate.
 110         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 111
 112 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 113
 114         * dv-tx3904cpu.c (CPU, SD): Delete.
 115
 116 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 119         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 120         (sim_store_register): Rename to ...
 121         (mips_reg_store): ... this.  Delete local cpu var.
 122         Update sim_io_eprintf calls.
 123         (sim_fetch_register): Rename to ...
 124         (mips_reg_fetch): ... this.  Delete local cpu var.
 125         Update sim_io_eprintf calls.
 126
 127 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 130
 131 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * config.in, configure: Regenerate.
 134
 135 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 136
 137         * interp.c (sim_write, sim_read): Delete.
 138         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 139         (load_word): Likewise.
 140         * micromips.igen (cache): Likewise.
 141         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 142         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 143         do_store_left, do_store_right, do_load_double, do_store_double):
 144         Likewise.
 145         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 146         (do_prefx): Likewise.
 147         * sim-main.c (address_translation, prefetch): Delete.
 148         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 149         paddr=vaddr.
 150         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 151         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 152         (LoadMemory, StoreMemory): Delete CCA arg.
 153
 154 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 157         * configure: Regenerated.
 158
 159 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 160
 161         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 162         * tconfig.h: Delete.
 163
 164 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * tconfig.h (SIM_HANDLES_LMA): Delete.
 167
 168 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * sim-main.h (WITH_WATCHPOINTS): Delete.
 171
 172 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 175
 176 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 179
 180 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 181
 182         * micromips.igen (process_isa_mode): Fix left shift of negative
 183         value.
 184
 185 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 188
 189 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 192
 193 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * interp.c (sim_close): Rename to ...
 196         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 197         sim_io_shutdown.
 198         * sim-main.h (mips_sim_close): Declare.
 199         (SIM_CLOSE_HOOK): Define.
 200
 201 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 202             Ali Lown  <ali.lown@imgtec.com>
 203
 204         * Makefile.in (tmp-micromips): New rule.
 205         (tmp-mach-multi): Add support for micromips.
 206         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 207         that works for both mips64 and micromips64.
 208         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 209         micromips32.
 210         Add build support for micromips.
 211         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 212         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 213         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 214         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 215         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 216         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 217         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 218         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 219         Refactored instruction code to use these functions.
 220         * dsp2.igen: Refactored instruction code to use the new functions.
 221         * interp.c (decode_coproc): Refactored to work with any instruction
 222         encoding.
 223         (isa_mode): New variable
 224         (RSVD_INSTRUCTION): Changed to 0x00000039.
 225         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 226         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 227         * micromips.dc: New file.
 228         * micromips.igen: New file.
 229         * micromips16.dc: New file.
 230         * micromipsdsp.igen: New file.
 231         * micromipsrun.c: New file.
 232         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 233         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 234         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 235         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 236         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 237         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 238         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 239         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 240         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 241         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 242         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 243         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 244         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 245         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 246         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 247         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 248         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 249         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 250         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 251         instructions.
 252         Refactored instruction code to use these functions.
 253         (RSVD): Changed to use new reserved instruction.
 254         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 255         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 256         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 257         do_store_double):  Added micromips32 and micromips64 models.
 258         Added include for micromips.igen and micromipsdsp.igen
 259         Add micromips32 and micromips64 models.
 260         (DecodeCoproc): Updated to use new macro definition.
 261         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 262         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 263         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 264         Refactored instruction code to use these functions.
 265         * sim-main.h (CP0_operation): New enum.
 266         (DecodeCoproc): Updated macro.
 267         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 268         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 269         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 270         ISA_MODE_MICROMIPS): New defines.
 271         (sim_state): Add isa_mode field.
 272
 273 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 274
 275         * configure: Regenerate.
 276
 277 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 278
 279         * configure.ac: Change configure.in to configure.ac.
 280         * configure: Regenerate.
 281
 282 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 283
 284         * configure: Regenerate.
 285
 286 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 287
 288         * interp.c [TRACE]: Delete.
 289         (TRACE): Change to WITH_TRACE_ANY_P.
 290         [!WITH_TRACE_ANY_P] (open_trace): Define.
 291         (mips_option_handler, open_trace, sim_close, dotrace):
 292         Change defined(TRACE) to WITH_TRACE_ANY_P.
 293         (sim_open): Delete TRACE ifdef check.
 294         * sim-main.c (load_memory): Delete TRACE ifdef check.
 295         (store_memory): Likewise.
 296         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 297         [!WITH_TRACE_ANY_P] (dotrace): Define.
 298
 299 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 300
 301         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 302         comments.
 303
 304 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 305
 306         * sim-main.h (SIM_CPU): Delete.
 307
 308 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 309
 310         * sim-main.h (sim_cia): Delete.
 311
 312 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 313
 314         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 315         PU_PC_GET.
 316         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 317         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 318         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 319         CIA_SET to CPU_PC_SET.
 320         * sim-main.h (CIA_GET, CIA_SET): Delete.
 321
 322 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 323
 324         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 325         * sim-main.h (STATE_CPU): Delete.
 326
 327 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 328
 329         * configure: Regenerate.
 330
 331 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 332
 333         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 334         * interp.c (mips_pc_get, mips_pc_set): New functions.
 335         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 336         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 337         (sim_pc_get): Delete.
 338         * sim-main.h (SIM_CPU): Define.
 339         (struct sim_state): Change cpu to an array of pointers.
 340         (STATE_CPU): Drop &.
 341
 342 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 343
 344         * interp.c (mips_option_handler, open_trace, sim_close,
 345         sim_write, sim_read, sim_store_register, sim_fetch_register,
 346         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 347         prototypes.
 348         (sim_open): Convert old style prototype.  Change casts with
 349         sim_write to unsigned char *.
 350         (fetch_str): Change null to unsigned char, and change cast to
 351         unsigned char *.
 352         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 353         unsigned char *.
 354
 355 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 356
 357         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 358
 359 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 360
 361         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 362
 363 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 364
 365         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 366
 367 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 368
 369         * config.in, configure: Regenerate.
 370
 371 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 372
 373         * interp.c (sim_pc_get): New function.
 374
 375 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 376
 377         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 378         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 379
 380 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 381
 382         * configure: Regenerate.
 383
 384 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 385
 386         * configure: Regenerate.
 387
 388 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 389
 390         * configure: Regenerate.
 391         * configure.ac (mips_extra_objs): Delete.
 392         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 393         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 394
 395 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 396
 397         * configure: Regenerate.
 398         * configure.ac: Delete sim_hw checks for dv-sockser.
 399
 400 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 401
 402         * config.in, configure: Regenerate.
 403         * tconfig.in: Rename file ...
 404         * tconfig.h: ... here.
 405
 406 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 407
 408         * tconfig.in: Delete includes.
 409         [HAVE_DV_SOCKSER]: Delete.
 410
 411 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 412
 413         * Makefile.in (SIM_RUN_OBJS): Delete.
 414
 415 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 416
 417         * configure.ac (AC_CHECK_HEADERS): Delete.
 418         * aclocal.m4, configure: Regenerate.
 419
 420 2014-08-19  Alan Modra  <amodra@gmail.com>
 421
 422         * configure: Regenerate.
 423
 424 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 425
 426         * configure: Regenerate.
 427         * config.in: Regenerate.
 428
 429 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 430
 431         * configure: Regenerate.
 432
 433 2013-09-23  Alan Modra  <amodra@gmail.com>
 434
 435         * configure: Regenerate.
 436
 437 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 438
 439         * aclocal.m4, configure: Regenerate.
 440
 441 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 442
 443         * configure: Rebuild.
 444
 445 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 446
 447         * configure: Regenerate.
 448
 449 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 450
 451         * configure.ac: Address use of dv-sockser.o.
 452         * tconfig.in: Conditionalize use of dv_sockser_install.
 453         * configure: Regenerated.
 454         * config.in: Regenerated.
 455
 456 2012-10-04  Chao-ying Fu  <fu@mips.com>
 457             Steve Ellcey  <sellcey@mips.com>
 458
 459         * mips/mips3264r2.igen (rdhwr): New.
 460
 461 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 462
 463         * configure.ac: Always link against dv-sockser.o.
 464         * configure: Regenerate.
 465
 466 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 467
 468         * config.in, configure: Regenerate.
 469
 470 2012-05-18  Nick Clifton  <nickc@redhat.com>
 471
 472         PR 14072
 473         * interp.c: Include config.h before system header files.
 474
 475 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 476
 477         * aclocal.m4, config.in, configure: Regenerate.
 478
 479 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 480
 481         * aclocal.m4: New file.
 482         * configure: Regenerate.
 483
 484 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 485
 486         * configure: Regenerate after common/acinclude.m4 update.
 487
 488 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 489
 490         * configure.ac: Change include to common/acinclude.m4.
 491
 492 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 493
 494         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 495         call.  Replace common.m4 include with SIM_AC_COMMON.
 496         * configure: Regenerate.
 497
 498 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 499
 500         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 501         $(SIM_EXTRA_DEPS).
 502         (tmp-mach-multi): Exit early when igen fails.
 503
 504 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 505
 506         * interp.c (sim_do_command): Delete.
 507
 508 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 509
 510         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 511         (tx3904sio_fifo_reset): Likewise.
 512         * interp.c (sim_monitor): Likewise.
 513
 514 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 515
 516         * interp.c (sim_write): Add const to buffer arg.
 517
 518 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 519
 520         * interp.c: Don't include sysdep.h
 521
 522 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 523
 524         * configure: Regenerate.
 525
 526 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 527
 528         * config.in: Regenerate.
 529         * configure: Likewise.
 530
 531         * configure: Regenerate.
 532
 533 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 534
 535         * configure: Regenerate to track ../common/common.m4 changes.
 536         * config.in: Ditto.
 537
 538 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 539             Daniel Jacobowitz  <dan@codesourcery.com>
 540             Joseph Myers  <joseph@codesourcery.com>
 541
 542         * configure: Regenerate.
 543
 544 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 545
 546         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 547         that unconditionally allows fmt_ps.
 548         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 549         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 550         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 551         filter from 64,f to 32,f.
 552         (PREFX): Change filter from 64 to 32.
 553         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 554         that use do_load_double instead of do_load.  Make both LUXC1
 555         versions unpredictable if SizeFGR () != 64.
 556         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 557         instead of do_store.  Remove unused variable.  Make both SUXC1
 558         versions unpredictable if SizeFGR () != 64.
 559
 560 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 561
 562         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 563         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 564         shifts for that case.
 565
 566 2007-09-04  Nick Clifton  <nickc@redhat.com>
 567
 568         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 569         (display_mem_info): New static variable.
 570         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 571         (mips_options): Add info-memory and memory-info.
 572         (sim_open): After processing the command line and board
 573         specification, check display_mem_info.  If it is set then
 574         call the real handler for the --memory-info command line
 575         switch.
 576
 577 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 578
 579         * configure.ac: Change license of multi-run.c to GPL version 3.
 580         * configure: Regenerate.
 581
 582 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 583
 584         * configure.ac, configure: Revert last patch.
 585
 586 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 587
 588         * configure.ac (sim_mipsisa3264_configs): New variable.
 589         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 590         every configuration support all four targets, using the triplet to
 591         determine the default.
 592         * configure: Regenerate.
 593
 594 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 595
 596         * Makefile.in (m16run.o): New rule.
 597
 598 2007-05-15  Thiemo Seufer  <ths@mips.com>
 599
 600         * mips3264r2.igen (DSHD): Fix compile warning.
 601
 602 2007-05-14  Thiemo Seufer  <ths@mips.com>
 603
 604         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 605         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 606         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 607         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 608         for mips32r2.
 609
 610 2007-03-01  Thiemo Seufer  <ths@mips.com>
 611
 612         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 613         and mips64.
 614
 615 2007-02-20  Thiemo Seufer  <ths@mips.com>
 616
 617         * dsp.igen: Update copyright notice.
 618         * dsp2.igen: Fix copyright notice.
 619
 620 2007-02-20  Thiemo Seufer  <ths@mips.com>
 621             Chao-Ying Fu  <fu@mips.com>
 622
 623         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 624         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 625         Add dsp2 to sim_igen_machine.
 626         * configure: Regenerate.
 627         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 628         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 629         (mulq_rs.ph): Use do_ph_mulq.
 630         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 631         * mips.igen: Add dsp2 model and include dsp2.igen.
 632         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 633         for *mips32r2, *mips64r2, *dsp.
 634         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 635         for *mips32r2, *mips64r2, *dsp2.
 636         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 637
 638 2007-02-19  Thiemo Seufer  <ths@mips.com>
 639             Nigel Stephens  <nigel@mips.com>
 640
 641         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 642         jumps with hazard barrier.
 643
 644 2007-02-19  Thiemo Seufer  <ths@mips.com>
 645             Nigel Stephens  <nigel@mips.com>
 646
 647         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 648         after each call to sim_io_write.
 649
 650 2007-02-19  Thiemo Seufer  <ths@mips.com>
 651             Nigel Stephens  <nigel@mips.com>
 652
 653         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 654         supported by this simulator.
 655         (decode_coproc): Recognise additional CP0 Config registers
 656         correctly.
 657
 658 2007-02-19  Thiemo Seufer  <ths@mips.com>
 659             Nigel Stephens  <nigel@mips.com>
 660             David Ung  <davidu@mips.com>
 661
 662         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 663         uninterpreted formats. If fmt is one of the uninterpreted types
 664         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 665         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 666         (store_fpr): When writing an invalid odd register, set the
 667         matching even register to fmt_unknown, not the following register.
 668         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 669         the the memory window at offset 0 set by --memory-size command
 670         line option.
 671         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 672         point register.
 673         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 674         register.
 675         (sim_monitor): When returning the memory size to the MIPS
 676         application, use the value in STATE_MEM_SIZE, not an arbitrary
 677         hardcoded value.
 678         (cop_lw): Don' mess around with FPR_STATE, just pass
 679         fmt_uninterpreted_32 to StoreFPR.
 680         (cop_sw): Similarly.
 681         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 682         (cop_sd): Similarly.
 683         * mips.igen (not_word_value): Single version for mips32, mips64
 684         and mips16.
 685
 686 2007-02-19  Thiemo Seufer <ths@mips.com>
 687             Nigel Stephens  <nigel@mips.com>
 688
 689         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 690         MBytes.
 691
 692 2007-02-17  Thiemo Seufer  <ths@mips.com>
 693
 694         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 695         configuration.
 696         * configure: Regenerate.
 697
 698 2007-02-17  Thiemo Seufer  <ths@mips.com>
 699
 700         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 701         Add mdmx to sim_igen_machine.
 702         (mipsisa64*-*-*): Likewise. Remove dsp.
 703         (mipsisa32*-*-*): Remove dsp.
 704         * configure: Regenerate.
 705
 706 2007-02-13  Thiemo Seufer  <ths@mips.com>
 707
 708         * configure.ac: Add mips*-sde-elf* target.
 709         * configure: Regenerate.
 710
 711 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 712
 713         * acconfig.h: Remove.
 714         * config.in, configure: Regenerate.
 715
 716 2006-11-07  Thiemo Seufer  <ths@mips.com>
 717
 718         * dsp.igen (do_w_op): Fix compiler warning.
 719
 720 2006-08-29  Thiemo Seufer  <ths@mips.com>
 721             David Ung  <davidu@mips.com>
 722
 723         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 724         sim_igen_machine.
 725         * configure: Regenerate.
 726         * mips.igen (model): Add smartmips.
 727         (MADDU): Increment ACX if carry.
 728         (do_mult): Clear ACX.
 729         (ROR,RORV): Add smartmips.
 730         (include): Include smartmips.igen.
 731         * sim-main.h (ACX): Set to REGISTERS[89].
 732         * smartmips.igen: New file.
 733
 734 2006-08-29  Thiemo Seufer  <ths@mips.com>
 735             David Ung  <davidu@mips.com>
 736
 737         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 738         mips3264r2.igen. Add missing dependency rules.
 739         * m16e.igen: Support for mips16e save/restore instructions.
 740
 741 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 742
 743         * configure: Regenerated.
 744
 745 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 746
 747         * configure: Regenerated.
 748
 749 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 750
 751         * configure: Regenerated.
 752
 753 2006-05-15 Chao-ying Fu  <fu@mips.com>
 754
 755         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 756
 757 2006-04-18  Nick Clifton  <nickc@redhat.com>
 758
 759         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 760         statement.
 761
 762 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 763
 764         * configure: Regenerate.
 765
 766 2005-12-14  Chao-ying Fu  <fu@mips.com>
 767
 768         * Makefile.in (SIM_OBJS): Add dsp.o.
 769         (dsp.o): New dependency.
 770         (IGEN_INCLUDE): Add dsp.igen.
 771         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 772         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 773         * configure: Regenerate.
 774         * mips.igen: Add dsp model and include dsp.igen.
 775         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 776         because these instructions are extended in DSP ASE.
 777         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 778         adding 6 DSP accumulator registers and 1 DSP control register.
 779         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 780         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 781         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 782         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 783         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 784         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 785         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 786         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 787         DSPCR_CCOND_SMASK): New define.
 788         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 789         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 790
 791 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 792
 793         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 794
 795 2005-06-16  David Ung  <davidu@mips.com>
 796             Nigel Stephens  <nigel@mips.com>
 797
 798         * mips.igen: New mips16e model and include m16e.igen.
 799         (check_u64): Add mips16e tag.
 800         * m16e.igen: New file for MIPS16e instructions.
 801         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 802         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 803         models.
 804         * configure: Regenerate.
 805
 806 2005-05-26  David Ung  <davidu@mips.com>
 807
 808         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 809         tags to all instructions which are applicable to the new ISAs.
 810         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 811         vr.igen.
 812         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 813         instructions.
 814         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 815         to mips.igen.
 816         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 817         * configure: Regenerate.
 818
 819 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 820
 821         * configure: Regenerate.
 822
 823 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 824
 825         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 826         explicit call to AC_CONFIG_HEADER.
 827         * configure: Regenerate.
 828
 829 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 830
 831         * configure.ac: Update to use ../common/common.m4.
 832         * configure: Re-generate.
 833
 834 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 835
 836         * configure: Regenerated to track ../common/aclocal.m4 changes.
 837
 838 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 839
 840         * configure.ac: Rename configure.in, require autoconf 2.59.
 841         * configure: Re-generate.
 842
 843 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 844
 845         * configure: Regenerate for ../common/aclocal.m4 update.
 846
 847 2004-09-24  Monika Chaddha  <monika@acmet.com>
 848
 849         Committed by Andrew Cagney.
 850         * m16.igen (CMP, CMPI): Fix assembler.
 851
 852 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 853
 854         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 855         * configure: Regenerate.
 856
 857 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 858
 859         * configure.in (sim_m16_machine): Include mipsIII.
 860         * configure: Regenerate.
 861
 862 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 863
 864         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 865         from COP0_BADVADDR.
 866         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 867
 868 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 869
 870         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 871
 872 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 873
 874         * mips.igen (check_fmt): Remove.
 875         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 876         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 877         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 878         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 879         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 880         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 881         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 882         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 883         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 884         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 885
 886 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 887
 888         * sb1.igen (check_sbx): New function.
 889         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 890
 891 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 892             Richard Sandiford  <rsandifo@redhat.com>
 893
 894         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 895         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 896         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 897         separate implementations for mipsIV and mipsV.  Use new macros to
 898         determine whether the restrictions apply.
 899
 900 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 901
 902         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 903         (check_mult_hilo): Improve comments.
 904         (check_div_hilo): Likewise.  Also, fork off a new version
 905         to handle mips32/mips64 (since there are no hazards to check
 906         in MIPS32/MIPS64).
 907
 908 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 909
 910         * mips.igen (do_dmultx): Fix check for negative operands.
 911
 912 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 913
 914         * Makefile.in (SHELL): Make sure this is defined.
 915         (various): Use $(SHELL) whenever we invoke move-if-change.
 916
 917 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 918
 919         * cp1.c: Tweak attribution slightly.
 920         * cp1.h: Likewise.
 921         * mdmx.c: Likewise.
 922         * mdmx.igen: Likewise.
 923         * mips3d.igen: Likewise.
 924         * sb1.igen: Likewise.
 925
 926 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 927
 928         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 929         unsigned operands.
 930
 931 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 932
 933         * interp.c (sim_open): Rename _bfd to bfd.
 934         (sim_create_inferior): Ditto.
 935
 936 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 937
 938         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 939
 940 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 941
 942         * mips.igen (EI, DI): Remove.
 943
 944 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 945
 946         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 947
 948 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 949             Andrew Cagney  <ac131313@redhat.com>
 950             Gavin Romig-Koch  <gavin@redhat.com>
 951             Graydon Hoare  <graydon@redhat.com>
 952             Aldy Hernandez  <aldyh@redhat.com>
 953             Dave Brolley  <brolley@redhat.com>
 954             Chris Demetriou  <cgd@broadcom.com>
 955
 956         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 957         (sim_mach_default): New variable.
 958         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 959         Add a new simulator generator, MULTI.
 960         * configure: Regenerate.
 961         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 962         (multi-run.o): New dependency.
 963         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 964         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 965         (tmp-multi): Combine them.
 966         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 967         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 968         (distclean-extra): New rule.
 969         * sim-main.h: Include bfd.h.
 970         (MIPS_MACH): New macro.
 971         * mips.igen (vr4120, vr5400, vr5500): New models.
 972         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 973         * vr.igen: Replace with new version.
 974
 975 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 976
 977         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 978         * configure: Regenerate.
 979
 980 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 981
 982         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 983         * mips.igen: Remove all invocations of check_branch_bug and
 984         mark_branch_bug.
 985
 986 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 987
 988         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 989
 990 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 991
 992         * mips.igen (do_load_double, do_store_double): New functions.
 993         (LDC1, SDC1): Rename to...
 994         (LDC1b, SDC1b): respectively.
 995         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 996
 997 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 998
 999         * cp1.c (fp_recip2): Modify initialization expression so that
1000         GCC will recognize it as constant.
1001
1002 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1003
1004         * mdmx.c (SD_): Delete.
1005         (Unpredictable): Re-define, for now, to directly invoke
1006         unpredictable_action().
1007         (mdmx_acc_op): Fix error in .ob immediate handling.
1008
1009 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1010
1011         * interp.c (sim_firmware_command): Initialize `address'.
1012
1013 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1014
1015         * configure: Regenerated to track ../common/aclocal.m4 changes.
1016
1017 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1018             Ed Satterthwaite  <ehs@broadcom.com>
1019
1020         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1021         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1022         * mips.igen: Include mips3d.igen.
1023         (mips3d): New model name for MIPS-3D ASE instructions.
1024         (CVT.W.fmt): Don't use this instruction for word (source) format
1025         instructions.
1026         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1027         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1028         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1029         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1030         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1031         (RSquareRoot1, RSquareRoot2): New macros.
1032         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1033         (fp_rsqrt2): New functions.
1034         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1035         * configure: Regenerate.
1036
1037 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1038             Ed Satterthwaite  <ehs@broadcom.com>
1039
1040         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1041         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1042         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1043         (convert): Note that this function is not used for paired-single
1044         format conversions.
1045         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1046         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1047         (check_fmt_p): Enable paired-single support.
1048         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1049         (PUU.PS): New instructions.
1050         (CVT.S.fmt): Don't use this instruction for paired-single format
1051         destinations.
1052         * sim-main.h (FP_formats): New value 'fmt_ps.'
1053         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1054         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1055
1056 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1057
1058         * mips.igen: Fix formatting of function calls in
1059         many FP operations.
1060
1061 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1062
1063         * mips.igen (MOVN, MOVZ): Trace result.
1064         (TNEI): Print "tnei" as the opcode name in traces.
1065         (CEIL.W): Add disassembly string for traces.
1066         (RSQRT.fmt): Make location of disassembly string consistent
1067         with other instructions.
1068
1069 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1070
1071         * mips.igen (X): Delete unused function.
1072
1073 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1074
1075         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1076
1077 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1078             Ed Satterthwaite  <ehs@broadcom.com>
1079
1080         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1081         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1082         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1083         (fp_nmsub): New prototypes.
1084         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1085         (NegMultiplySub): New defines.
1086         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1087         (MADD.D, MADD.S): Replace with...
1088         (MADD.fmt): New instruction.
1089         (MSUB.D, MSUB.S): Replace with...
1090         (MSUB.fmt): New instruction.
1091         (NMADD.D, NMADD.S): Replace with...
1092         (NMADD.fmt): New instruction.
1093         (NMSUB.D, MSUB.S): Replace with...
1094         (NMSUB.fmt): New instruction.
1095
1096 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1097             Ed Satterthwaite  <ehs@broadcom.com>
1098
1099         * cp1.c: Fix more comment spelling and formatting.
1100         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1101         (denorm_mode): New function.
1102         (fpu_unary, fpu_binary): Round results after operation, collect
1103         status from rounding operations, and update the FCSR.
1104         (convert): Collect status from integer conversions and rounding
1105         operations, and update the FCSR.  Adjust NaN values that result
1106         from conversions.  Convert to use sim_io_eprintf rather than
1107         fprintf, and remove some debugging code.
1108         * cp1.h (fenr_FS): New define.
1109
1110 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1111
1112         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1113         rounding mode to sim FP rounding mode flag conversion code into...
1114         (rounding_mode): New function.
1115
1116 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1117
1118         * cp1.c: Clean up formatting of a few comments.
1119         (value_fpr): Reformat switch statement.
1120
1121 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1122             Ed Satterthwaite  <ehs@broadcom.com>
1123
1124         * cp1.h: New file.
1125         * sim-main.h: Include cp1.h.
1126         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1127         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1128         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1129         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1130         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1131         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1132         * cp1.c: Don't include sim-fpu.h; already included by
1133         sim-main.h.  Clean up formatting of some comments.
1134         (NaN, Equal, Less): Remove.
1135         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1136         (fp_cmp): New functions.
1137         * mips.igen (do_c_cond_fmt): Remove.
1138         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1139         Compare.  Add result tracing.
1140         (CxC1): Remove, replace with...
1141         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1142         (DMxC1): Remove, replace with...
1143         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1144         (MxC1): Remove, replace with...
1145         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1146
1147 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1148
1149         * sim-main.h (FGRIDX): Remove, replace all uses with...
1150         (FGR_BASE): New macro.
1151         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1152         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1153         (NR_FGR, FGR): Likewise.
1154         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1155         * mips.igen: Likewise.
1156
1157 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1158
1159         * cp1.c: Add an FSF Copyright notice to this file.
1160
1161 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1162             Ed Satterthwaite  <ehs@broadcom.com>
1163
1164         * cp1.c (Infinity): Remove.
1165         * sim-main.h (Infinity): Likewise.
1166
1167         * cp1.c (fp_unary, fp_binary): New functions.
1168         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1169         (fp_sqrt): New functions, implemented in terms of the above.
1170         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1171         (Recip, SquareRoot): Remove (replaced by functions above).
1172         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1173         (fp_recip, fp_sqrt): New prototypes.
1174         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1175         (Recip, SquareRoot): Replace prototypes with #defines which
1176         invoke the functions above.
1177
1178 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1179
1180         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1181         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1182         file, remove PARAMS from prototypes.
1183         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1184         simulator state arguments.
1185         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1186         pass simulator state arguments.
1187         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1188         (store_fpr, convert): Remove 'sd' argument.
1189         (value_fpr): Likewise.  Convert to use 'SD' instead.
1190
1191 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1192
1193         * cp1.c (Min, Max): Remove #if 0'd functions.
1194         * sim-main.h (Min, Max): Remove.
1195
1196 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1197
1198         * cp1.c: fix formatting of switch case and default labels.
1199         * interp.c: Likewise.
1200         * sim-main.c: Likewise.
1201
1202 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1203
1204         * cp1.c: Clean up comments which describe FP formats.
1205          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1206
1207 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1208             Ed Satterthwaite  <ehs@broadcom.com>
1209
1210         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1211         Broadcom SiByte SB-1 processor configurations.
1212         * configure: Regenerate.
1213         * sb1.igen: New file.
1214         * mips.igen: Include sb1.igen.
1215         (sb1): New model.
1216         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1217         * mdmx.igen: Add "sb1" model to all appropriate functions and
1218         instructions.
1219         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1220         (ob_func, ob_acc): Reference the above.
1221         (qh_acc): Adjust to keep the same size as ob_acc.
1222         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1223         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1224
1225 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1226
1227         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1228
1229 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1230             Ed Satterthwaite  <ehs@broadcom.com>
1231
1232         * mips.igen (mdmx): New (pseudo-)model.
1233         * mdmx.c, mdmx.igen: New files.
1234         * Makefile.in (SIM_OBJS): Add mdmx.o.
1235         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1236         New typedefs.
1237         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1238         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1239         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1240         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1241         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1242         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1243         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1244         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1245         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1246         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1247         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1248         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1249         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1250         (qh_fmtsel): New macros.
1251         (_sim_cpu): New member "acc".
1252         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1253         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1254
1255 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1256
1257         * interp.c: Use 'deprecated' rather than 'depreciated.'
1258         * sim-main.h: Likewise.
1259
1260 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1261
1262         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1263         which wouldn't compile anyway.
1264         * sim-main.h (unpredictable_action): New function prototype.
1265         (Unpredictable): Define to call igen function unpredictable().
1266         (NotWordValue): New macro to call igen function not_word_value().
1267         (UndefinedResult): Remove.
1268         * interp.c (undefined_result): Remove.
1269         (unpredictable_action): New function.
1270         * mips.igen (not_word_value, unpredictable): New functions.
1271         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1272         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1273         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1274         NotWordValue() to check for unpredictable inputs, then
1275         Unpredictable() to handle them.
1276
1277 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1278
1279         * mips.igen: Fix formatting of calls to Unpredictable().
1280
1281 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1282
1283         * interp.c (sim_open): Revert previous change.
1284
1285 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1286
1287         * interp.c (sim_open): Disable chunk of code that wrote code in
1288         vector table entries.
1289
1290 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1291
1292         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1293         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1294         unused definitions.
1295
1296 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1297
1298         * cp1.c: Fix many formatting issues.
1299
1300 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1301
1302         * cp1.c (fpu_format_name): New function to replace...
1303         (DOFMT): This.  Delete, and update all callers.
1304         (fpu_rounding_mode_name): New function to replace...
1305         (RMMODE): This.  Delete, and update all callers.
1306
1307 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1308
1309         * interp.c: Move FPU support routines from here to...
1310         * cp1.c: Here.  New file.
1311         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1312         (cp1.o): New target.
1313
1314 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1315
1316         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1317         * mips.igen (mips32, mips64): New models, add to all instructions
1318         and functions as appropriate.
1319         (loadstore_ea, check_u64): New variant for model mips64.
1320         (check_fmt_p): New variant for models mipsV and mips64, remove
1321         mipsV model marking fro other variant.
1322         (SLL) Rename to...
1323         (SLLa) this.
1324         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1325         for mips32 and mips64.
1326         (DCLO, DCLZ): New instructions for mips64.
1327
1328 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1329
1330         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1331         immediate or code as a hex value with the "%#lx" format.
1332         (ANDI): Likewise, and fix printed instruction name.
1333
1334 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1335
1336         * sim-main.h (UndefinedResult, Unpredictable): New macros
1337         which currently do nothing.
1338
1339 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1340
1341         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1342         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1343         (status_CU3): New definitions.
1344
1345         * sim-main.h (ExceptionCause): Add new values for MIPS32
1346         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1347         for DebugBreakPoint and NMIReset to note their status in
1348         MIPS32 and MIPS64.
1349         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1350         (SignalExceptionCacheErr): New exception macros.
1351
1352 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1353
1354         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1355         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1356         is always enabled.
1357         (SignalExceptionCoProcessorUnusable): Take as argument the
1358         unusable coprocessor number.
1359
1360 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1361
1362         * mips.igen: Fix formatting of all SignalException calls.
1363
1364 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1365
1366         * sim-main.h (SIGNEXTEND): Remove.
1367
1368 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1369
1370         * mips.igen: Remove gencode comment from top of file, fix
1371         spelling in another comment.
1372
1373 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1374
1375         * mips.igen (check_fmt, check_fmt_p): New functions to check
1376         whether specific floating point formats are usable.
1377         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1378         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1379         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1380         Use the new functions.
1381         (do_c_cond_fmt): Remove format checks...
1382         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1383
1384 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1385
1386         * mips.igen: Fix formatting of check_fpu calls.
1387
1388 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1389
1390         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1391
1392 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1393
1394         * mips.igen: Remove whitespace at end of lines.
1395
1396 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1397
1398         * mips.igen (loadstore_ea): New function to do effective
1399         address calculations.
1400         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1401         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1402         CACHE): Use loadstore_ea to do effective address computations.
1403
1404 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1405
1406         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1407         * mips.igen (LL, CxC1, MxC1): Likewise.
1408
1409 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1410
1411         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1412         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1413         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1414         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1415         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1416         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1417         Don't split opcode fields by hand, use the opcode field values
1418         provided by igen.
1419
1420 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1421
1422         * mips.igen (do_divu): Fix spacing.
1423
1424         * mips.igen (do_dsllv): Move to be right before DSLLV,
1425         to match the rest of the do_<shift> functions.
1426
1427 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1428
1429         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1430         DSRL32, do_dsrlv): Trace inputs and results.
1431
1432 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1433
1434         * mips.igen (CACHE): Provide instruction-printing string.
1435
1436         * interp.c (signal_exception): Comment tokens after #endif.
1437
1438 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1439
1440         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1441         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1442         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1443         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1444         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1445         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1446         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1447         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1448
1449 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1450
1451         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1452         instruction-printing string.
1453         (LWU): Use '64' as the filter flag.
1454
1455 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1456
1457         * mips.igen (SDXC1): Fix instruction-printing string.
1458
1459 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1460
1461         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1462         filter flags "32,f".
1463
1464 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1465
1466         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1467         as the filter flag.
1468
1469 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1470
1471         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1472         add a comma) so that it more closely match the MIPS ISA
1473         documentation opcode partitioning.
1474         (PREF): Put useful names on opcode fields, and include
1475         instruction-printing string.
1476
1477 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1478
1479         * mips.igen (check_u64): New function which in the future will
1480         check whether 64-bit instructions are usable and signal an
1481         exception if not.  Currently a no-op.
1482         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1483         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1484         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1485         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1486
1487         * mips.igen (check_fpu): New function which in the future will
1488         check whether FPU instructions are usable and signal an exception
1489         if not.  Currently a no-op.
1490         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1491         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1492         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1493         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1494         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1495         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1496         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1497         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1498
1499 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1500
1501         * mips.igen (do_load_left, do_load_right): Move to be immediately
1502         following do_load.
1503         (do_store_left, do_store_right): Move to be immediately following
1504         do_store.
1505
1506 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1507
1508         * mips.igen (mipsV): New model name.  Also, add it to
1509         all instructions and functions where it is appropriate.
1510
1511 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1512
1513         * mips.igen: For all functions and instructions, list model
1514         names that support that instruction one per line.
1515
1516 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1517
1518         * mips.igen: Add some additional comments about supported
1519         models, and about which instructions go where.
1520         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1521         order as is used in the rest of the file.
1522
1523 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1524
1525         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1526         indicating that ALU32_END or ALU64_END are there to check
1527         for overflow.
1528         (DADD): Likewise, but also remove previous comment about
1529         overflow checking.
1530
1531 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1532
1533         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1534         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1535         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1536         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1537         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1538         fields (i.e., add and move commas) so that they more closely
1539         match the MIPS ISA documentation opcode partitioning.
1540
1541 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1542
1543         * mips.igen (ADDI): Print immediate value.
1544         (BREAK): Print code.
1545         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1546         (SLL): Print "nop" specially, and don't run the code
1547         that does the shift for the "nop" case.
1548
1549 2001-11-17  Fred Fish  <fnf@redhat.com>
1550
1551         * sim-main.h (float_operation): Move enum declaration outside
1552         of _sim_cpu struct declaration.
1553
1554 2001-04-12  Jim Blandy  <jimb@redhat.com>
1555
1556         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1557         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1558         set of the FCSR.
1559         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1560         PENDING_FILL, and you can get the intended effect gracefully by
1561         calling PENDING_SCHED directly.
1562
1563 2001-02-23  Ben Elliston  <bje@redhat.com>
1564
1565         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1566         already defined elsewhere.
1567
1568 2001-02-19  Ben Elliston  <bje@redhat.com>
1569
1570         * sim-main.h (sim_monitor): Return an int.
1571         * interp.c (sim_monitor): Add return values.
1572         (signal_exception): Handle error conditions from sim_monitor.
1573
1574 2001-02-08  Ben Elliston  <bje@redhat.com>
1575
1576         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1577         (store_memory): Likewise, pass cia to sim_core_write*.
1578
1579 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1580
1581         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1582         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1583
1584 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1585
1586         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1587         * Makefile.in: Don't delete *.igen when cleaning directory.
1588
1589 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1590
1591         * m16.igen (break): Call SignalException not sim_engine_halt.
1592
1593 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1594
1595         From Jason Eckhardt:
1596         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1597
1598 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1599
1600         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1601
1602 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1603
1604         * mips.igen (do_dmultx): Fix typo.
1605
1606 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1607
1608         * configure: Regenerated to track ../common/aclocal.m4 changes.
1609
1610 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1611
1612         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1613
1614 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1615
1616         * sim-main.h (GPR_CLEAR): Define macro.
1617
1618 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1619
1620         * interp.c (decode_coproc): Output long using %lx and not %s.
1621
1622 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1623
1624         * interp.c (sim_open): Sort & extend dummy memory regions for
1625         --board=jmr3904 for eCos.
1626
1627 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1628
1629         * configure: Regenerated.
1630
1631 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1632
1633         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1634         calls, conditional on the simulator being in verbose mode.
1635
1636 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1637
1638         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1639         cache don't get ReservedInstruction traps.
1640
1641 1999-11-29  Mark Salter  <msalter@cygnus.com>
1642
1643         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1644         to clear status bits in sdisr register. This is how the hardware works.
1645
1646         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1647         being used by cygmon.
1648
1649 1999-11-11  Andrew Haley  <aph@cygnus.com>
1650
1651         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1652         instructions.
1653
1654 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1655
1656         * mips.igen (MULT): Correct previous mis-applied patch.
1657
1658 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1659
1660         * mips.igen (delayslot32): Handle sequence like
1661         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1662         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1663         (MULT): Actually pass the third register...
1664
1665 1999-09-03  Mark Salter  <msalter@cygnus.com>
1666
1667         * interp.c (sim_open): Added more memory aliases for additional
1668         hardware being touched by cygmon on jmr3904 board.
1669
1670 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1671
1672         * configure: Regenerated to track ../common/aclocal.m4 changes.
1673
1674 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1675
1676         * interp.c (sim_store_register): Handle case where client - GDB -
1677         specifies that a 4 byte register is 8 bytes in size.
1678         (sim_fetch_register): Ditto.
1679
1680 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1681
1682         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1683         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1684         (idt_monitor_base): Base address for IDT monitor traps.
1685         (pmon_monitor_base): Ditto for PMON.
1686         (lsipmon_monitor_base): Ditto for LSI PMON.
1687         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1688         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1689         (sim_firmware_command): New function.
1690         (mips_option_handler): Call it for OPTION_FIRMWARE.
1691         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1692         option was given, add no monitor by default.  Add BREAK hooks only if
1693         monitors are also there.
1694
1695 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1696
1697         * interp.c (sim_monitor): Flush output before reading input.
1698
1699 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1700
1701         * tconfig.in (SIM_HANDLES_LMA): Always define.
1702
1703 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1704
1705         From Mark Salter <msalter@cygnus.com>:
1706         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1707         (sim_open): Add setup for BSP board.
1708
1709 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1710
1711         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1712         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1713         them as unimplemented.
1714
1715 1999-05-08  Felix Lee  <flee@cygnus.com>
1716
1717         * configure: Regenerated to track ../common/aclocal.m4 changes.
1718
1719 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1720
1721         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1722
1723 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1724
1725         * configure.in: Any mips64vr5*-*-* target should have
1726         -DTARGET_ENABLE_FR=1.
1727         (default_endian): Any mips64vr*el-*-* target should default to
1728         LITTLE_ENDIAN.
1729         * configure: Re-generate.
1730
1731 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1732
1733         * mips.igen (ldl): Extend from _16_, not 32.
1734
1735 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1736
1737         * interp.c (sim_store_register): Force registers written to by GDB
1738         into an un-interpreted state.
1739
1740 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1741
1742         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1743         CPU, start periodic background I/O polls.
1744         (tx3904sio_poll): New function: periodic I/O poller.
1745
1746 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1747
1748         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1749
1750 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1751
1752         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1753         case statement.
1754
1755 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1756
1757         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1758         (load_word): Call SIM_CORE_SIGNAL hook on error.
1759         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1760         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1761         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1762         * sim-main.h (COP0_BADVADDR): Define.
1763         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1764         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1765         (_sim_cpu): Add exc_* fields to store register value snapshots.
1766         * mips.igen (*): Replace memory-related SignalException* calls
1767         with references to SIM_CORE_SIGNAL hook.
1768
1769         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1770         fix.
1771         * sim-main.c (*): Minor warning cleanups.
1772
1773 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1774
1775         * m16.igen (DADDIU5): Correct type-o.
1776
1777 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1778
1779         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1780         variables.
1781
1782 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1783
1784         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1785         to include path.
1786         (interp.o): Add dependency on itable.h
1787         (oengine.c, gencode): Delete remaining references.
1788         (BUILT_SRC_FROM_GEN): Clean up.
1789
1790 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1791
1792         * vr4run.c: New.
1793         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1794         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1795         tmp-run-hack) : New.
1796         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1797         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1798         Drop the "64" qualifier to get the HACK generator working.
1799         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1800         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1801         qualifier to get the hack generator working.
1802         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1803         (DSLL): Use do_dsll.
1804         (DSLLV): Use do_dsllv.
1805         (DSRA): Use do_dsra.
1806         (DSRL): Use do_dsrl.
1807         (DSRLV): Use do_dsrlv.
1808         (BC1): Move *vr4100 to get the HACK generator working.
1809         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1810         get the HACK generator working.
1811         (MACC) Rename to get the HACK generator working.
1812         (DMACC,MACCS,DMACCS): Add the 64.
1813
1814 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1815
1816         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1817         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1818
1819 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1820
1821     * mips/interp.c (DEBUG): Cleanups.
1822
1823 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1824
1825         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1826         (tx3904sio_tickle): fflush after a stdout character output.
1827
1828 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1829
1830         * interp.c (sim_close): Uninstall modules.
1831
1832 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1833
1834         * sim-main.h, interp.c (sim_monitor): Change to global
1835         function.
1836
1837 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1838
1839         * configure.in (vr4100): Only include vr4100 instructions in
1840         simulator.
1841         * configure: Re-generate.
1842         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1843
1844 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1845
1846         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1847         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1848         true alternative.
1849
1850         * configure.in (sim_default_gen, sim_use_gen): Replace with
1851         sim_gen.
1852         (--enable-sim-igen): Delete config option. Always using IGEN.
1853         * configure: Re-generate.
1854
1855         * Makefile.in (gencode): Kill, kill, kill.
1856         * gencode.c: Ditto.
1857
1858 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1859
1860         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1861         bit mips16 igen simulator.
1862         * configure: Re-generate.
1863
1864         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1865         as part of vr4100 ISA.
1866         * vr.igen: Mark all instructions as 64 bit only.
1867
1868 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1869
1870         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1871         Pacify GCC.
1872
1873 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1874
1875         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1876         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1877         * configure: Re-generate.
1878
1879         * m16.igen (BREAK): Define breakpoint instruction.
1880         (JALX32): Mark instruction as mips16 and not r3900.
1881         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1882
1883         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1884
1885 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1886
1887         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1888         insn as a debug breakpoint.
1889
1890         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1891         pending.slot_size.
1892         (PENDING_SCHED): Clean up trace statement.
1893         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1894         (PENDING_FILL): Delay write by only one cycle.
1895         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1896
1897         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1898         of pending writes.
1899         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1900         32 & 64.
1901         (pending_tick): Move incrementing of index to FOR statement.
1902         (pending_tick): Only update PENDING_OUT after a write has occured.
1903
1904         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1905         build simulator.
1906         * configure: Re-generate.
1907
1908         * interp.c (sim_engine_run OLD): Delete explicit call to
1909         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1910
1911 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1912
1913         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1914         interrupt level number to match changed SignalExceptionInterrupt
1915         macro.
1916
1917 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1918
1919         * interp.c: #include "itable.h" if WITH_IGEN.
1920         (get_insn_name): New function.
1921         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1922         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1923
1924 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1925
1926         * configure: Rebuilt to inhale new common/aclocal.m4.
1927
1928 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1929
1930         * dv-tx3904sio.c: Include sim-assert.h.
1931
1932 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1933
1934         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1935         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1936         Reorganize target-specific sim-hardware checks.
1937         * configure: rebuilt.
1938         * interp.c (sim_open): For tx39 target boards, set
1939         OPERATING_ENVIRONMENT, add tx3904sio devices.
1940         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1941         ROM executables.  Install dv-sockser into sim-modules list.
1942
1943         * dv-tx3904irc.c: Compiler warning clean-up.
1944         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1945         frequent hw-trace messages.
1946
1947 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1950
1951 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1952
1953         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1954
1955         * vr.igen: New file.
1956         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1957         * mips.igen: Define vr4100 model. Include vr.igen.
1958 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1959
1960         * mips.igen (check_mf_hilo): Correct check.
1961
1962 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1963
1964         * sim-main.h (interrupt_event): Add prototype.
1965
1966         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1967         register_ptr, register_value.
1968         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1969
1970         * sim-main.h (tracefh): Make extern.
1971
1972 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1973
1974         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1975         Reduce unnecessarily high timer event frequency.
1976         * dv-tx3904cpu.c: Ditto for interrupt event.
1977
1978 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1979
1980         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1981         to allay warnings.
1982         (interrupt_event): Made non-static.
1983
1984         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1985         interchange of configuration values for external vs. internal
1986         clock dividers.
1987
1988 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1989
1990         * mips.igen (BREAK): Moved code to here for
1991         simulator-reserved break instructions.
1992         * gencode.c (build_instruction): Ditto.
1993         * interp.c (signal_exception): Code moved from here.  Non-
1994         reserved instructions now use exception vector, rather
1995         than halting sim.
1996         * sim-main.h: Moved magic constants to here.
1997
1998 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1999
2000         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2001         register upon non-zero interrupt event level, clear upon zero
2002         event value.
2003         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2004         by passing zero event value.
2005         (*_io_{read,write}_buffer): Endianness fixes.
2006         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2007         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2008
2009         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2010         serial I/O and timer module at base address 0xFFFF0000.
2011
2012 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2013
2014         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2015         and BigEndianCPU.
2016
2017 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2018
2019         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2020         parts.
2021         * configure: Update.
2022
2023 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2024
2025         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2026         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2027         * configure.in: Include tx3904tmr in hw_device list.
2028         * configure: Rebuilt.
2029         * interp.c (sim_open): Instantiate three timer instances.
2030         Fix address typo of tx3904irc instance.
2031
2032 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2033
2034         * interp.c (signal_exception): SystemCall exception now uses
2035         the exception vector.
2036
2037 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2038
2039         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2040         to allay warnings.
2041
2042 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2045
2046 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2049
2050         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2051         sim-main.h. Declare a struct hw_descriptor instead of struct
2052         hw_device_descriptor.
2053
2054 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2055
2056         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2057         right bits and then re-align left hand bytes to correct byte
2058         lanes.  Fix incorrect computation in do_store_left when loading
2059         bytes from second word.
2060
2061 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2062
2063         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2064         * interp.c (sim_open): Only create a device tree when HW is
2065         enabled.
2066
2067         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2068         * interp.c (signal_exception): Ditto.
2069
2070 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2071
2072         * gencode.c: Mark BEGEZALL as LIKELY.
2073
2074 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2075
2076         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2077         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2078
2079 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2080
2081         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2082         modules.  Recognize TX39 target with "mips*tx39" pattern.
2083         * configure: Rebuilt.
2084         * sim-main.h (*): Added many macros defining bits in
2085         TX39 control registers.
2086         (SignalInterrupt): Send actual PC instead of NULL.
2087         (SignalNMIReset): New exception type.
2088         * interp.c (board): New variable for future use to identify
2089         a particular board being simulated.
2090         (mips_option_handler,mips_options): Added "--board" option.
2091         (interrupt_event): Send actual PC.
2092         (sim_open): Make memory layout conditional on board setting.
2093         (signal_exception): Initial implementation of hardware interrupt
2094         handling.  Accept another break instruction variant for simulator
2095         exit.
2096         (decode_coproc): Implement RFE instruction for TX39.
2097         (mips.igen): Decode RFE instruction as such.
2098         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2099         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2100         bbegin to implement memory map.
2101         * dv-tx3904cpu.c: New file.
2102         * dv-tx3904irc.c: New file.
2103
2104 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2105
2106         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2107
2108 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2109
2110         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2111         with calls to check_div_hilo.
2112
2113 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2114
2115         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2116         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2117         Add special r3900 version of do_mult_hilo.
2118         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2119         with calls to check_mult_hilo.
2120         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2121         with calls to check_div_hilo.
2122
2123 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2124
2125         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2126         Document a replacement.
2127
2128 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2129
2130         * interp.c (sim_monitor): Make mon_printf work.
2131
2132 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2133
2134         * sim-main.h (INSN_NAME): New arg `cpu'.
2135
2136 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2137
2138         * configure: Regenerated to track ../common/aclocal.m4 changes.
2139
2140 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2141
2142         * configure: Regenerated to track ../common/aclocal.m4 changes.
2143         * config.in: Ditto.
2144
2145 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2146
2147         * acconfig.h: New file.
2148         * configure.in: Reverted change of Apr 24; use sinclude again.
2149
2150 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2151
2152         * configure: Regenerated to track ../common/aclocal.m4 changes.
2153         * config.in: Ditto.
2154
2155 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2156
2157         * configure.in: Don't call sinclude.
2158
2159 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2160
2161         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2162
2163 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2164
2165         * mips.igen (ERET): Implement.
2166
2167         * interp.c (decode_coproc): Return sign-extended EPC.
2168
2169         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2170
2171         * interp.c (signal_exception): Do not ignore Trap.
2172         (signal_exception): On TRAP, restart at exception address.
2173         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2174         (signal_exception): Update.
2175         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2176         so that TRAP instructions are caught.
2177
2178 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2179
2180         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2181         contains HI/LO access history.
2182         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2183         (HIACCESS, LOACCESS): Delete, replace with
2184         (HIHISTORY, LOHISTORY): New macros.
2185         (CHECKHILO): Delete all, moved to mips.igen
2186
2187         * gencode.c (build_instruction): Do not generate checks for
2188         correct HI/LO register usage.
2189
2190         * interp.c (old_engine_run): Delete checks for correct HI/LO
2191         register usage.
2192
2193         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2194         check_mf_cycles): New functions.
2195         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2196         do_divu, domultx, do_mult, do_multu): Use.
2197
2198         * tx.igen ("madd", "maddu"): Use.
2199
2200 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2201
2202         * mips.igen (DSRAV): Use function do_dsrav.
2203         (SRAV): Use new function do_srav.
2204
2205         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2206         (B): Sign extend 11 bit immediate.
2207         (EXT-B*): Shift 16 bit immediate left by 1.
2208         (ADDIU*): Don't sign extend immediate value.
2209
2210 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2211
2212         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2213
2214         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2215         functions.
2216
2217         * mips.igen (delayslot32, nullify_next_insn): New functions.
2218         (m16.igen): Always include.
2219         (do_*): Add more tracing.
2220
2221         * m16.igen (delayslot16): Add NIA argument, could be called by a
2222         32 bit MIPS16 instruction.
2223
2224         * interp.c (ifetch16): Move function from here.
2225         * sim-main.c (ifetch16): To here.
2226
2227         * sim-main.c (ifetch16, ifetch32): Update to match current
2228         implementations of LH, LW.
2229         (signal_exception): Don't print out incorrect hex value of illegal
2230         instruction.
2231
2232 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2233
2234         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2235         instruction.
2236
2237         * m16.igen: Implement MIPS16 instructions.
2238
2239         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2240         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2241         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2242         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2243         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2244         bodies of corresponding code from 32 bit insn to these.  Also used
2245         by MIPS16 versions of functions.
2246
2247         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2248         (IMEM16): Drop NR argument from macro.
2249
2250 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2251
2252         * Makefile.in (SIM_OBJS): Add sim-main.o.
2253
2254         * sim-main.h (address_translation, load_memory, store_memory,
2255         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2256         as INLINE_SIM_MAIN.
2257         (pr_addr, pr_uword64): Declare.
2258         (sim-main.c): Include when H_REVEALS_MODULE_P.
2259
2260         * interp.c (address_translation, load_memory, store_memory,
2261         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2262         from here.
2263         * sim-main.c: To here. Fix compilation problems.
2264
2265         * configure.in: Enable inlining.
2266         * configure: Re-config.
2267
2268 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2269
2270         * configure: Regenerated to track ../common/aclocal.m4 changes.
2271
2272 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2273
2274         * mips.igen: Include tx.igen.
2275         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2276         * tx.igen: New file, contains MADD and MADDU.
2277
2278         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2279         the hardwired constant `7'.
2280         (store_memory): Ditto.
2281         (LOADDRMASK): Move definition to sim-main.h.
2282
2283         mips.igen (MTC0): Enable for r3900.
2284         (ADDU): Add trace.
2285
2286         mips.igen (do_load_byte): Delete.
2287         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2288         do_store_right): New functions.
2289         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2290
2291         configure.in: Let the tx39 use igen again.
2292         configure: Update.
2293
2294 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2295
2296         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2297         not an address sized quantity.  Return zero for cache sizes.
2298
2299 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2300
2301         * mips.igen (r3900): r3900 does not support 64 bit integer
2302         operations.
2303
2304 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2305
2306         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2307         than igen one.
2308         * configure : Rebuild.
2309
2310 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2311
2312         * configure: Regenerated to track ../common/aclocal.m4 changes.
2313
2314 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2315
2316         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2317
2318 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2319
2320         * configure: Regenerated to track ../common/aclocal.m4 changes.
2321         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2322
2323 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2324
2325         * configure: Regenerated to track ../common/aclocal.m4 changes.
2326
2327 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2328
2329         * interp.c (Max, Min): Comment out functions. Not yet used.
2330
2331 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2332
2333         * configure: Regenerated to track ../common/aclocal.m4 changes.
2334
2335 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2336
2337         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2338         configurable settings for stand-alone simulator.
2339
2340         * configure.in: Added X11 search, just in case.
2341
2342         * configure: Regenerated.
2343
2344 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2345
2346         * interp.c (sim_write, sim_read, load_memory, store_memory):
2347         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2348
2349 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2350
2351         * sim-main.h (GETFCC): Return an unsigned value.
2352
2353 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2354
2355         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2356         (DADD): Result destination is RD not RT.
2357
2358 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2359
2360         * sim-main.h (HIACCESS, LOACCESS): Always define.
2361
2362         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2363
2364         * interp.c (sim_info): Delete.
2365
2366 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2367
2368         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2369         (mips_option_handler): New argument `cpu'.
2370         (sim_open): Update call to sim_add_option_table.
2371
2372 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2373
2374         * mips.igen (CxC1): Add tracing.
2375
2376 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2377
2378         * sim-main.h (Max, Min): Declare.
2379
2380         * interp.c (Max, Min): New functions.
2381
2382         * mips.igen (BC1): Add tracing.
2383
2384 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2385
2386         * interp.c Added memory map for stack in vr4100
2387
2388 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2389
2390         * interp.c (load_memory): Add missing "break"'s.
2391
2392 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2393
2394         * interp.c (sim_store_register, sim_fetch_register): Pass in
2395         length parameter.  Return -1.
2396
2397 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2398
2399         * interp.c: Added hardware init hook, fixed warnings.
2400
2401 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2404
2405 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2406
2407         * interp.c (ifetch16): New function.
2408
2409         * sim-main.h (IMEM32): Rename IMEM.
2410         (IMEM16_IMMED): Define.
2411         (IMEM16): Define.
2412         (DELAY_SLOT): Update.
2413
2414         * m16run.c (sim_engine_run): New file.
2415
2416         * m16.igen: All instructions except LB.
2417         (LB): Call do_load_byte.
2418         * mips.igen (do_load_byte): New function.
2419         (LB): Call do_load_byte.
2420
2421         * mips.igen: Move spec for insn bit size and high bit from here.
2422         * Makefile.in (tmp-igen, tmp-m16): To here.
2423
2424         * m16.dc: New file, decode mips16 instructions.
2425
2426         * Makefile.in (SIM_NO_ALL): Define.
2427         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2428
2429 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2430
2431         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2432         point unit to 32 bit registers.
2433         * configure: Re-generate.
2434
2435 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2436
2437         * configure.in (sim_use_gen): Make IGEN the default simulator
2438         generator for generic 32 and 64 bit mips targets.
2439         * configure: Re-generate.
2440
2441 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2442
2443         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2444         bitsize.
2445
2446         * interp.c (sim_fetch_register, sim_store_register): Read/write
2447         FGR from correct location.
2448         (sim_open): Set size of FGR's according to
2449         WITH_TARGET_FLOATING_POINT_BITSIZE.
2450
2451         * sim-main.h (FGR): Store floating point registers in a separate
2452         array.
2453
2454 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * configure: Regenerated to track ../common/aclocal.m4 changes.
2457
2458 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2459
2460         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2461
2462         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2463
2464         * interp.c (pending_tick): New function.  Deliver pending writes.
2465
2466         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2467         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2468         it can handle mixed sized quantites and single bits.
2469
2470 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2471
2472         * interp.c (oengine.h): Do not include when building with IGEN.
2473         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2474         (sim_info): Ditto for PROCESSOR_64BIT.
2475         (sim_monitor): Replace ut_reg with unsigned_word.
2476         (*): Ditto for t_reg.
2477         (LOADDRMASK): Define.
2478         (sim_open): Remove defunct check that host FP is IEEE compliant,
2479         using software to emulate floating point.
2480         (value_fpr, ...): Always compile, was conditional on HASFPU.
2481
2482 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2483
2484         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2485         size.
2486
2487         * interp.c (SD, CPU): Define.
2488         (mips_option_handler): Set flags in each CPU.
2489         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2490         (sim_close): Do not clear STATE, deleted anyway.
2491         (sim_write, sim_read): Assume CPU zero's vm should be used for
2492         data transfers.
2493         (sim_create_inferior): Set the PC for all processors.
2494         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2495         argument.
2496         (mips16_entry): Pass correct nr of args to store_word, load_word.
2497         (ColdReset): Cold reset all cpu's.
2498         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2499         (sim_monitor, load_memory, store_memory, signal_exception): Use
2500         `CPU' instead of STATE_CPU.
2501
2502
2503         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2504         SD or CPU_.
2505
2506         * sim-main.h (signal_exception): Add sim_cpu arg.
2507         (SignalException*): Pass both SD and CPU to signal_exception.
2508         * interp.c (signal_exception): Update.
2509
2510         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2511         Ditto
2512         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2513         address_translation): Ditto
2514         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2515
2516 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2517
2518         * configure: Regenerated to track ../common/aclocal.m4 changes.
2519
2520 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2521
2522         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2523
2524         * mips.igen (model): Map processor names onto BFD name.
2525
2526         * sim-main.h (CPU_CIA): Delete.
2527         (SET_CIA, GET_CIA): Define
2528
2529 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2530
2531         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2532         regiser.
2533
2534         * configure.in (default_endian): Configure a big-endian simulator
2535         by default.
2536         * configure: Re-generate.
2537
2538 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2539
2540         * configure: Regenerated to track ../common/aclocal.m4 changes.
2541
2542 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2543
2544         * interp.c (sim_monitor): Handle Densan monitor outbyte
2545         and inbyte functions.
2546
2547 1997-12-29  Felix Lee  <flee@cygnus.com>
2548
2549         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2550
2551 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2552
2553         * Makefile.in (tmp-igen): Arrange for $zero to always be
2554         reset to zero after every instruction.
2555
2556 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2557
2558         * configure: Regenerated to track ../common/aclocal.m4 changes.
2559         * config.in: Ditto.
2560
2561 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2562
2563         * mips.igen (MSUB): Fix to work like MADD.
2564         * gencode.c (MSUB): Similarly.
2565
2566 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2567
2568         * configure: Regenerated to track ../common/aclocal.m4 changes.
2569
2570 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2571
2572         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2573
2574 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2575
2576         * sim-main.h (sim-fpu.h): Include.
2577
2578         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2579         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2580         using host independant sim_fpu module.
2581
2582 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2583
2584         * interp.c (signal_exception): Report internal errors with SIGABRT
2585         not SIGQUIT.
2586
2587         * sim-main.h (C0_CONFIG): New register.
2588         (signal.h): No longer include.
2589
2590         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2591
2592 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2593
2594         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2595
2596 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2597
2598         * mips.igen: Tag vr5000 instructions.
2599         (ANDI): Was missing mipsIV model, fix assembler syntax.
2600         (do_c_cond_fmt): New function.
2601         (C.cond.fmt): Handle mips I-III which do not support CC field
2602         separatly.
2603         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2604         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2605         in IV3.2 spec.
2606         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2607         vr5000 which saves LO in a GPR separatly.
2608
2609         * configure.in (enable-sim-igen): For vr5000, select vr5000
2610         specific instructions.
2611         * configure: Re-generate.
2612
2613 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2614
2615         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2616
2617         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2618         fmt_uninterpreted_64 bit cases to switch.  Convert to
2619         fmt_formatted,
2620
2621         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2622
2623         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2624         as specified in IV3.2 spec.
2625         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2626
2627 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2628
2629         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2630         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2631         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2632         PENDING_FILL versions of instructions.  Simplify.
2633         (X): New function.
2634         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2635         instructions.
2636         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2637         a signed value.
2638         (MTHI, MFHI): Disable code checking HI-LO.
2639
2640         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2641         global.
2642         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2643
2644 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * gencode.c (build_mips16_operands): Replace IPC with cia.
2647
2648         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2649         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2650         IPC to `cia'.
2651         (UndefinedResult): Replace function with macro/function
2652         combination.
2653         (sim_engine_run): Don't save PC in IPC.
2654
2655         * sim-main.h (IPC): Delete.
2656
2657
2658         * interp.c (signal_exception, store_word, load_word,
2659         address_translation, load_memory, store_memory, cache_op,
2660         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2661         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2662         current instruction address - cia - argument.
2663         (sim_read, sim_write): Call address_translation directly.
2664         (sim_engine_run): Rename variable vaddr to cia.
2665         (signal_exception): Pass cia to sim_monitor
2666
2667         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2668         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2669         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2670
2671         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2672         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2673         SIM_ASSERT.
2674
2675         * interp.c (signal_exception): Pass restart address to
2676         sim_engine_restart.
2677
2678         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2679         idecode.o): Add dependency.
2680
2681         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2682         Delete definitions
2683         (DELAY_SLOT): Update NIA not PC with branch address.
2684         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2685
2686         * mips.igen: Use CIA not PC in branch calculations.
2687         (illegal): Call SignalException.
2688         (BEQ, ADDIU): Fix assembler.
2689
2690 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2691
2692         * m16.igen (JALX): Was missing.
2693
2694         * configure.in (enable-sim-igen): New configuration option.
2695         * configure: Re-generate.
2696
2697         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2698
2699         * interp.c (load_memory, store_memory): Delete parameter RAW.
2700         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2701         bypassing {load,store}_memory.
2702
2703         * sim-main.h (ByteSwapMem): Delete definition.
2704
2705         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2706
2707         * interp.c (sim_do_command, sim_commands): Delete mips specific
2708         commands.  Handled by module sim-options.
2709
2710         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2711         (WITH_MODULO_MEMORY): Define.
2712
2713         * interp.c (sim_info): Delete code printing memory size.
2714
2715         * interp.c (mips_size): Nee sim_size, delete function.
2716         (power2): Delete.
2717         (monitor, monitor_base, monitor_size): Delete global variables.
2718         (sim_open, sim_close): Delete code creating monitor and other
2719         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2720         manage memory regions.
2721         (load_memory, store_memory): Use sim-core for memory model.
2722
2723         * interp.c (address_translation): Delete all memory map code
2724         except line forcing 32 bit addresses.
2725
2726 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2727
2728         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2729         trace options.
2730
2731         * interp.c (logfh, logfile): Delete globals.
2732         (sim_open, sim_close): Delete code opening & closing log file.
2733         (mips_option_handler): Delete -l and -n options.
2734         (OPTION mips_options): Ditto.
2735
2736         * interp.c (OPTION mips_options): Rename option trace to dinero.
2737         (mips_option_handler): Update.
2738
2739 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2740
2741         * interp.c (fetch_str): New function.
2742         (sim_monitor): Rewrite using sim_read & sim_write.
2743         (sim_open): Check magic number.
2744         (sim_open): Write monitor vectors into memory using sim_write.
2745         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2746         (sim_read, sim_write): Simplify - transfer data one byte at a
2747         time.
2748         (load_memory, store_memory): Clarify meaning of parameter RAW.
2749
2750         * sim-main.h (isHOST): Defete definition.
2751         (isTARGET): Mark as depreciated.
2752         (address_translation): Delete parameter HOST.
2753
2754         * interp.c (address_translation): Delete parameter HOST.
2755
2756 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2757
2758         * mips.igen:
2759
2760         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2761         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2762
2763 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2764
2765         * mips.igen: Add model filter field to records.
2766
2767 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2768
2769         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2770
2771         interp.c (sim_engine_run): Do not compile function sim_engine_run
2772         when WITH_IGEN == 1.
2773
2774         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2775         target architecture.
2776
2777         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2778         igen. Replace with configuration variables sim_igen_flags /
2779         sim_m16_flags.
2780
2781         * m16.igen: New file.  Copy mips16 insns here.
2782         * mips.igen: From here.
2783
2784 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2785
2786         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2787         to top.
2788         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2789
2790 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2791
2792         * gencode.c (build_instruction): Follow sim_write's lead in using
2793         BigEndianMem instead of !ByteSwapMem.
2794
2795 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2796
2797         * configure.in (sim_gen): Dependent on target, select type of
2798         generator.  Always select old style generator.
2799
2800         configure: Re-generate.
2801
2802         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2803         targets.
2804         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2805         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2806         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2807         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2808         SIM_@sim_gen@_*, set by autoconf.
2809
2810 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2811
2812         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2813
2814         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2815         CURRENT_FLOATING_POINT instead.
2816
2817         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2818         (address_translation): Raise exception InstructionFetch when
2819         translation fails and isINSTRUCTION.
2820
2821         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2822         sim_engine_run): Change type of of vaddr and paddr to
2823         address_word.
2824         (address_translation, prefetch, load_memory, store_memory,
2825         cache_op): Change type of vAddr and pAddr to address_word.
2826
2827         * gencode.c (build_instruction): Change type of vaddr and paddr to
2828         address_word.
2829
2830 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2831
2832         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2833         macro to obtain result of ALU op.
2834
2835 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2836
2837         * interp.c (sim_info): Call profile_print.
2838
2839 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2840
2841         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2842
2843         * sim-main.h (WITH_PROFILE): Do not define, defined in
2844         common/sim-config.h.  Use sim-profile module.
2845         (simPROFILE): Delete defintion.
2846
2847         * interp.c (PROFILE): Delete definition.
2848         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2849         (sim_close): Delete code writing profile histogram.
2850         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2851         Delete.
2852         (sim_engine_run): Delete code profiling the PC.
2853
2854 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2855
2856         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2857
2858         * interp.c (sim_monitor): Make register pointers of type
2859         unsigned_word*.
2860
2861         * sim-main.h: Make registers of type unsigned_word not
2862         signed_word.
2863
2864 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2865
2866         * interp.c (sync_operation): Rename from SyncOperation, make
2867         global, add SD argument.
2868         (prefetch): Rename from Prefetch, make global, add SD argument.
2869         (decode_coproc): Make global.
2870
2871         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2872
2873         * gencode.c (build_instruction): Generate DecodeCoproc not
2874         decode_coproc calls.
2875
2876         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2877         (SizeFGR): Move to sim-main.h
2878         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2879         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2880         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2881         sim-main.h.
2882         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2883         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2884         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2885         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2886         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2887         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2888
2889         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2890         exception.
2891         (sim-alu.h): Include.
2892         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2893         (sim_cia): Typedef to instruction_address.
2894
2895 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2896
2897         * Makefile.in (interp.o): Rename generated file engine.c to
2898         oengine.c.
2899
2900         * interp.c: Update.
2901
2902 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2903
2904         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2905
2906 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2907
2908         * gencode.c (build_instruction): For "FPSQRT", output correct
2909         number of arguments to Recip.
2910
2911 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2912
2913         * Makefile.in (interp.o): Depends on sim-main.h
2914
2915         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2916
2917         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2918         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2919         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2920         STATE, DSSTATE): Define
2921         (GPR, FGRIDX, ..): Define.
2922
2923         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2924         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2925         (GPR, FGRIDX, ...): Delete macros.
2926
2927         * interp.c: Update names to match defines from sim-main.h
2928
2929 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2930
2931         * interp.c (sim_monitor): Add SD argument.
2932         (sim_warning): Delete.  Replace calls with calls to
2933         sim_io_eprintf.
2934         (sim_error): Delete. Replace calls with sim_io_error.
2935         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2936         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2937         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2938         argument.
2939         (mips_size): Rename from sim_size. Add SD argument.
2940
2941         * interp.c (simulator): Delete global variable.
2942         (callback): Delete global variable.
2943         (mips_option_handler, sim_open, sim_write, sim_read,
2944         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2945         sim_size,sim_monitor): Use sim_io_* not callback->*.
2946         (sim_open): ZALLOC simulator struct.
2947         (PROFILE): Do not define.
2948
2949 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2952         support.h with corresponding code.
2953
2954         * sim-main.h (word64, uword64), support.h: Move definition to
2955         sim-main.h.
2956         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2957
2958         * support.h: Delete
2959         * Makefile.in: Update dependencies
2960         * interp.c: Do not include.
2961
2962 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2963
2964         * interp.c (address_translation, load_memory, store_memory,
2965         cache_op): Rename to from AddressTranslation et.al., make global,
2966         add SD argument
2967
2968         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2969         CacheOp): Define.
2970
2971         * interp.c (SignalException): Rename to signal_exception, make
2972         global.
2973
2974         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2975
2976         * sim-main.h (SignalException, SignalExceptionInterrupt,
2977         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2978         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2979         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2980         Define.
2981
2982         * interp.c, support.h: Use.
2983
2984 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2985
2986         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2987         to value_fpr / store_fpr. Add SD argument.
2988         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2989         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2990
2991         * sim-main.h (ValueFPR, StoreFPR): Define.
2992
2993 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2994
2995         * interp.c (sim_engine_run): Check consistency between configure
2996         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2997         and HASFPU.
2998
2999         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3000         (mips_fpu): Configure WITH_FLOATING_POINT.
3001         (mips_endian): Configure WITH_TARGET_ENDIAN.
3002         * configure: Update.
3003
3004 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3005
3006         * configure: Regenerated to track ../common/aclocal.m4 changes.
3007
3008 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3009
3010         * configure: Regenerated.
3011
3012 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3013
3014         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3015
3016 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3017
3018         * gencode.c (print_igen_insn_models): Assume certain architectures
3019         include all mips* instructions.
3020         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3021         instruction.
3022
3023         * Makefile.in (tmp.igen): Add target. Generate igen input from
3024         gencode file.
3025
3026         * gencode.c (FEATURE_IGEN): Define.
3027         (main): Add --igen option.  Generate output in igen format.
3028         (process_instructions): Format output according to igen option.
3029         (print_igen_insn_format): New function.
3030         (print_igen_insn_models): New function.
3031         (process_instructions): Only issue warnings and ignore
3032         instructions when no FEATURE_IGEN.
3033
3034 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3035
3036         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3037         MIPS targets.
3038
3039 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3040
3041         * configure: Regenerated to track ../common/aclocal.m4 changes.
3042
3043 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3044
3045         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3046         SIM_RESERVED_BITS): Delete, moved to common.
3047         (SIM_EXTRA_CFLAGS): Update.
3048
3049 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3050
3051         * configure.in: Configure non-strict memory alignment.
3052         * configure: Regenerated to track ../common/aclocal.m4 changes.
3053
3054 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3055
3056         * configure: Regenerated to track ../common/aclocal.m4 changes.
3057
3058 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3059
3060         * gencode.c (SDBBP,DERET): Added (3900) insns.
3061         (RFE): Turn on for 3900.
3062         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3063         (dsstate): Made global.
3064         (SUBTARGET_R3900): Added.
3065         (CANCELDELAYSLOT): New.
3066         (SignalException): Ignore SystemCall rather than ignore and
3067         terminate.  Add DebugBreakPoint handling.
3068         (decode_coproc): New insns RFE, DERET; and new registers Debug
3069         and DEPC protected by SUBTARGET_R3900.
3070         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3071         bits explicitly.
3072         * Makefile.in,configure.in: Add mips subtarget option.
3073         * configure: Update.
3074
3075 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3076
3077         * gencode.c: Add r3900 (tx39).
3078
3079
3080 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3081
3082         * gencode.c (build_instruction): Don't need to subtract 4 for
3083         JALR, just 2.
3084
3085 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3086
3087         * interp.c: Correct some HASFPU problems.
3088
3089 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3090
3091         * configure: Regenerated to track ../common/aclocal.m4 changes.
3092
3093 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3094
3095         * interp.c (mips_options): Fix samples option short form, should
3096         be `x'.
3097
3098 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3099
3100         * interp.c (sim_info): Enable info code.  Was just returning.
3101
3102 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3103
3104         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3105         MFC0.
3106
3107 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3108
3109         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3110         constants.
3111         (build_instruction): Ditto for LL.
3112
3113 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3114
3115         * configure: Regenerated to track ../common/aclocal.m4 changes.
3116
3117 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3118
3119         * configure: Regenerated to track ../common/aclocal.m4 changes.
3120         * config.in: Ditto.
3121
3122 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3123
3124         * interp.c (sim_open): Add call to sim_analyze_program, update
3125         call to sim_config.
3126
3127 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3128
3129         * interp.c (sim_kill): Delete.
3130         (sim_create_inferior): Add ABFD argument. Set PC from same.
3131         (sim_load): Move code initializing trap handlers from here.
3132         (sim_open): To here.
3133         (sim_load): Delete, use sim-hload.c.
3134
3135         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3136
3137 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3138
3139         * configure: Regenerated to track ../common/aclocal.m4 changes.
3140         * config.in: Ditto.
3141
3142 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3143
3144         * interp.c (sim_open): Add ABFD argument.
3145         (sim_load): Move call to sim_config from here.
3146         (sim_open): To here.  Check return status.
3147
3148 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3149
3150         * gencode.c (build_instruction): Two arg MADD should
3151         not assign result to $0.
3152
3153 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3154
3155         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3156         * sim/mips/configure.in: Regenerate.
3157
3158 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3159
3160         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3161         signed8, unsigned8 et.al. types.
3162
3163         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3164         hosts when selecting subreg.
3165
3166 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3167
3168         * interp.c (sim_engine_run): Reset the ZERO register to zero
3169         regardless of FEATURE_WARN_ZERO.
3170         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3171
3172 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3173
3174         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3175         (SignalException): For BreakPoints ignore any mode bits and just
3176         save the PC.
3177         (SignalException): Always set the CAUSE register.
3178
3179 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3180
3181         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3182         exception has been taken.
3183
3184         * interp.c: Implement the ERET and mt/f sr instructions.
3185
3186 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3187
3188         * interp.c (SignalException): Don't bother restarting an
3189         interrupt.
3190
3191 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3192
3193         * interp.c (SignalException): Really take an interrupt.
3194         (interrupt_event): Only deliver interrupts when enabled.
3195
3196 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3197
3198         * interp.c (sim_info): Only print info when verbose.
3199         (sim_info) Use sim_io_printf for output.
3200
3201 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3202
3203         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3204         mips architectures.
3205
3206 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3207
3208         * interp.c (sim_do_command): Check for common commands if a
3209         simulator specific command fails.
3210
3211 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3212
3213         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3214         and simBE when DEBUG is defined.
3215
3216 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3217
3218         * interp.c (interrupt_event): New function.  Pass exception event
3219         onto exception handler.
3220
3221         * configure.in: Check for stdlib.h.
3222         * configure: Regenerate.
3223
3224         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3225         variable declaration.
3226         (build_instruction): Initialize memval1.
3227         (build_instruction): Add UNUSED attribute to byte, bigend,
3228         reverse.
3229         (build_operands): Ditto.
3230
3231         * interp.c: Fix GCC warnings.
3232         (sim_get_quit_code): Delete.
3233
3234         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3235         * Makefile.in: Ditto.
3236         * configure: Re-generate.
3237
3238         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3239
3240 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3241
3242         * interp.c (mips_option_handler): New function parse argumes using
3243         sim-options.
3244         (myname): Replace with STATE_MY_NAME.
3245         (sim_open): Delete check for host endianness - performed by
3246         sim_config.
3247         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3248         (sim_open): Move much of the initialization from here.
3249         (sim_load): To here.  After the image has been loaded and
3250         endianness set.
3251         (sim_open): Move ColdReset from here.
3252         (sim_create_inferior): To here.
3253         (sim_open): Make FP check less dependant on host endianness.
3254
3255         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3256         run.
3257         * interp.c (sim_set_callbacks): Delete.
3258
3259         * interp.c (membank, membank_base, membank_size): Replace with
3260         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3261         (sim_open): Remove call to callback->init. gdb/run do this.
3262
3263         * interp.c: Update
3264
3265         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3266
3267         * interp.c (big_endian_p): Delete, replaced by
3268         current_target_byte_order.
3269
3270 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3271
3272         * interp.c (host_read_long, host_read_word, host_swap_word,
3273         host_swap_long): Delete. Using common sim-endian.
3274         (sim_fetch_register, sim_store_register): Use H2T.
3275         (pipeline_ticks): Delete.  Handled by sim-events.
3276         (sim_info): Update.
3277         (sim_engine_run): Update.
3278
3279 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3280
3281         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3282         reason from here.
3283         (SignalException): To here. Signal using sim_engine_halt.
3284         (sim_stop_reason): Delete, moved to common.
3285
3286 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3287
3288         * interp.c (sim_open): Add callback argument.
3289         (sim_set_callbacks): Delete SIM_DESC argument.
3290         (sim_size): Ditto.
3291
3292 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3293
3294         * Makefile.in (SIM_OBJS): Add common modules.
3295
3296         * interp.c (sim_set_callbacks): Also set SD callback.
3297         (set_endianness, xfer_*, swap_*): Delete.
3298         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3299         Change to functions using sim-endian macros.
3300         (control_c, sim_stop): Delete, use common version.
3301         (simulate): Convert into.
3302         (sim_engine_run): This function.
3303         (sim_resume): Delete.
3304
3305         * interp.c (simulation): New variable - the simulator object.
3306         (sim_kind): Delete global - merged into simulation.
3307         (sim_load): Cleanup.  Move PC assignment from here.
3308         (sim_create_inferior): To here.
3309
3310         * sim-main.h: New file.
3311         * interp.c (sim-main.h): Include.
3312
3313 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3314
3315         * configure: Regenerated to track ../common/aclocal.m4 changes.
3316
3317 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3318
3319         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3320
3321 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3322
3323         * gencode.c (build_instruction): DIV instructions: check
3324         for division by zero and integer overflow before using
3325         host's division operation.
3326
3327 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3328
3329         * Makefile.in (SIM_OBJS): Add sim-load.o.
3330         * interp.c: #include bfd.h.
3331         (target_byte_order): Delete.
3332         (sim_kind, myname, big_endian_p): New static locals.
3333         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3334         after argument parsing.  Recognize -E arg, set endianness accordingly.
3335         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3336         load file into simulator.  Set PC from bfd.
3337         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3338         (set_endianness): Use big_endian_p instead of target_byte_order.
3339
3340 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3341
3342         * interp.c (sim_size): Delete prototype - conflicts with
3343         definition in remote-sim.h.  Correct definition.
3344
3345 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3346
3347         * configure: Regenerated to track ../common/aclocal.m4 changes.
3348         * config.in: Ditto.
3349
3350 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3351
3352         * interp.c (sim_open): New arg `kind'.
3353
3354         * configure: Regenerated to track ../common/aclocal.m4 changes.
3355
3356 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3357
3358         * configure: Regenerated to track ../common/aclocal.m4 changes.
3359
3360 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3361
3362         * interp.c (sim_open): Set optind to 0 before calling getopt.
3363
3364 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3365
3366         * configure: Regenerated to track ../common/aclocal.m4 changes.
3367
3368 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3369
3370         * interp.c : Replace uses of pr_addr with pr_uword64
3371         where the bit length is always 64 independent of SIM_ADDR.
3372         (pr_uword64) : added.
3373
3374 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3375
3376         * configure: Re-generate.
3377
3378 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3379
3380         * configure: Regenerate to track ../common/aclocal.m4 changes.
3381
3382 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3383
3384         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3385         in argv form.
3386         (other sim_*): New SIM_DESC argument.
3387
3388 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3389
3390         * interp.c: Fix printing of addresses for non-64-bit targets.
3391         (pr_addr): Add function to print address based on size.
3392
3393 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3394
3395         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3396
3397 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3398
3399         * gencode.c (build_mips16_operands): Correct computation of base
3400         address for extended PC relative instruction.
3401
3402 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3403
3404         * interp.c (mips16_entry): Add support for floating point cases.
3405         (SignalException): Pass floating point cases to mips16_entry.
3406         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3407         registers.
3408         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3409         or fmt_word.
3410         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3411         and then set the state to fmt_uninterpreted.
3412         (COP_SW): Temporarily set the state to fmt_word while calling
3413         ValueFPR.
3414
3415 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3416
3417         * gencode.c (build_instruction): The high order may be set in the
3418         comparison flags at any ISA level, not just ISA 4.
3419
3420 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3421
3422         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3423         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3424         * configure.in: sinclude ../common/aclocal.m4.
3425         * configure: Regenerated.
3426
3427 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3428
3429         * configure: Rebuild after change to aclocal.m4.
3430
3431 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3432
3433         * configure configure.in Makefile.in:  Update to new configure
3434         scheme which is more compatible with WinGDB builds.
3435         * configure.in:  Improve comment on how to run autoconf.
3436         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3437         * Makefile.in:  Use autoconf substitution to install common
3438         makefile fragment.
3439
3440 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3441
3442         * gencode.c (build_instruction): Use BigEndianCPU instead of
3443         ByteSwapMem.
3444
3445 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3446
3447         * interp.c (sim_monitor): Make output to stdout visible in
3448         wingdb's I/O log window.
3449
3450 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3451
3452         * support.h: Undo previous change to SIGTRAP
3453         and SIGQUIT values.
3454
3455 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3456
3457         * interp.c (store_word, load_word): New static functions.
3458         (mips16_entry): New static function.
3459         (SignalException): Look for mips16 entry and exit instructions.
3460         (simulate): Use the correct index when setting fpr_state after
3461         doing a pending move.
3462
3463 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3464
3465         * interp.c: Fix byte-swapping code throughout to work on
3466         both little- and big-endian hosts.
3467
3468 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3469
3470         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3471         with gdb/config/i386/xm-windows.h.
3472
3473 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3474
3475         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3476         that messes up arithmetic shifts.
3477
3478 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3479
3480         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3481         SIGTRAP and SIGQUIT for _WIN32.
3482
3483 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3484
3485         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3486         force a 64 bit multiplication.
3487         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3488         destination register is 0, since that is the default mips16 nop
3489         instruction.
3490
3491 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3492
3493         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3494         (build_endian_shift): Don't check proc64.
3495         (build_instruction): Always set memval to uword64.  Cast op2 to
3496         uword64 when shifting it left in memory instructions.  Always use
3497         the same code for stores--don't special case proc64.
3498
3499         * gencode.c (build_mips16_operands): Fix base PC value for PC
3500         relative operands.
3501         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3502         jal instruction.
3503         * interp.c (simJALDELAYSLOT): Define.
3504         (JALDELAYSLOT): Define.
3505         (INDELAYSLOT, INJALDELAYSLOT): Define.
3506         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3507
3508 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3509
3510         * interp.c (sim_open): add flush_cache as a PMON routine
3511         (sim_monitor): handle flush_cache by ignoring it
3512
3513 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3514
3515         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3516         BigEndianMem.
3517         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3518         (BigEndianMem): Rename to ByteSwapMem and change sense.
3519         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3520         BigEndianMem references to !ByteSwapMem.
3521         (set_endianness): New function, with prototype.
3522         (sim_open): Call set_endianness.
3523         (sim_info): Use simBE instead of BigEndianMem.
3524         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3525         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3526         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3527         ifdefs, keeping the prototype declaration.
3528         (swap_word): Rewrite correctly.
3529         (ColdReset): Delete references to CONFIG.  Delete endianness related
3530         code; moved to set_endianness.
3531
3532 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3533
3534         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3535         * interp.c (CHECKHILO): Define away.
3536         (simSIGINT): New macro.
3537         (membank_size): Increase from 1MB to 2MB.
3538         (control_c): New function.
3539         (sim_resume): Rename parameter signal to signal_number.  Add local
3540         variable prev.  Call signal before and after simulate.
3541         (sim_stop_reason): Add simSIGINT support.
3542         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3543         functions always.
3544         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3545         if logfh is NULL.
3546         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3547         a call to sim_warning.
3548
3549 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3550
3551         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3552         16 bit instructions.
3553
3554 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3555
3556         Add support for mips16 (16 bit MIPS implementation):
3557         * gencode.c (inst_type): Add mips16 instruction encoding types.
3558         (GETDATASIZEINSN): Define.
3559         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3560         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3561         mtlo.
3562         (MIPS16_DECODE): New table, for mips16 instructions.
3563         (bitmap_val): New static function.
3564         (struct mips16_op): Define.
3565         (mips16_op_table): New table, for mips16 operands.
3566         (build_mips16_operands): New static function.
3567         (process_instructions): If PC is odd, decode a mips16
3568         instruction.  Break out instruction handling into new
3569         build_instruction function.
3570         (build_instruction): New static function, broken out of
3571         process_instructions.  Check modifiers rather than flags for SHIFT
3572         bit count and m[ft]{hi,lo} direction.
3573         (usage): Pass program name to fprintf.
3574         (main): Remove unused variable this_option_optind.  Change
3575         ``*loptarg++'' to ``loptarg++''.
3576         (my_strtoul): Parenthesize && within ||.
3577         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3578         (simulate): If PC is odd, fetch a 16 bit instruction, and
3579         increment PC by 2 rather than 4.
3580         * configure.in: Add case for mips16*-*-*.
3581         * configure: Rebuild.
3582
3583 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3584
3585         * interp.c: Allow -t to enable tracing in standalone simulator.
3586         Fix garbage output in trace file and error messages.
3587
3588 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3589
3590         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3591         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3592         * configure.in: Simplify using macros in ../common/aclocal.m4.
3593         * configure: Regenerated.
3594         * tconfig.in: New file.
3595
3596 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3597
3598         * interp.c: Fix bugs in 64-bit port.
3599         Use ansi function declarations for msvc compiler.
3600         Initialize and test file pointer in trace code.
3601         Prevent duplicate definition of LAST_EMED_REGNUM.
3602
3603 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3604
3605         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3606
3607 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3608
3609         * interp.c (SignalException): Check for explicit terminating
3610         breakpoint value.
3611         * gencode.c: Pass instruction value through SignalException()
3612         calls for Trap, Breakpoint and Syscall.
3613
3614 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3615
3616         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3617         only used on those hosts that provide it.
3618         * configure.in: Add sqrt() to list of functions to be checked for.
3619         * config.in: Re-generated.
3620         * configure: Re-generated.
3621
3622 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3623
3624         * gencode.c (process_instructions): Call build_endian_shift when
3625         expanding STORE RIGHT, to fix swr.
3626         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3627         clear the high bits.
3628         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3629         Fix float to int conversions to produce signed values.
3630
3631 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3632
3633         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3634         (process_instructions): Correct handling of nor instruction.
3635         Correct shift count for 32 bit shift instructions. Correct sign
3636         extension for arithmetic shifts to not shift the number of bits in
3637         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3638         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3639         Fix madd.
3640         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3641         It's OK to have a mult follow a mult.  What's not OK is to have a
3642         mult follow an mfhi.
3643         (Convert): Comment out incorrect rounding code.
3644
3645 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3646
3647         * interp.c (sim_monitor): Improved monitor printf
3648         simulation. Tidied up simulator warnings, and added "--log" option
3649         for directing warning message output.
3650         * gencode.c: Use sim_warning() rather than WARNING macro.
3651
3652 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3653
3654         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3655         getopt1.o, rather than on gencode.c.  Link objects together.
3656         Don't link against -liberty.
3657         (gencode.o, getopt.o, getopt1.o): New targets.
3658         * gencode.c: Include <ctype.h> and "ansidecl.h".
3659         (AND): Undefine after including "ansidecl.h".
3660         (ULONG_MAX): Define if not defined.
3661         (OP_*): Don't define macros; now defined in opcode/mips.h.
3662         (main): Call my_strtoul rather than strtoul.
3663         (my_strtoul): New static function.
3664
3665 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3666
3667         * gencode.c (process_instructions):  Generate word64 and uword64
3668         instead of `long long' and `unsigned long long' data types.
3669         * interp.c:  #include sysdep.h to get signals, and define default
3670         for SIGBUS.
3671         * (Convert):  Work around for Visual-C++ compiler bug with type
3672         conversion.
3673         * support.h:  Make things compile under Visual-C++ by using
3674         __int64 instead of `long long'.  Change many refs to long long
3675         into word64/uword64 typedefs.
3676
3677 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3678
3679         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3680         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3681         (docdir): Removed.
3682         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3683         (AC_PROG_INSTALL): Added.
3684         (AC_PROG_CC): Moved to before configure.host call.
3685         * configure: Rebuilt.
3686
3687 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3688
3689         * configure.in: Define @SIMCONF@ depending on mips target.
3690         * configure: Rebuild.
3691         * Makefile.in (run): Add @SIMCONF@ to control simulator
3692         construction.
3693         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3694         * interp.c: Remove some debugging, provide more detailed error
3695         messages, update memory accesses to use LOADDRMASK.
3696
3697 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3698
3699         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3700         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3701         stamp-h.
3702         * configure: Rebuild.
3703         * config.in: New file, generated by autoheader.
3704         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3705         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3706         HAVE_ANINT and HAVE_AINT, as appropriate.
3707         * Makefile.in (run): Use @LIBS@ rather than -lm.
3708         (interp.o): Depend upon config.h.
3709         (Makefile): Just rebuild Makefile.
3710         (clean): Remove stamp-h.
3711         (mostlyclean): Make the same as clean, not as distclean.
3712         (config.h, stamp-h): New targets.
3713
3714 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3715
3716         * interp.c (ColdReset): Fix boolean test. Make all simulator
3717         globals static.
3718
3719 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3720
3721         * interp.c (xfer_direct_word, xfer_direct_long,
3722         swap_direct_word, swap_direct_long, xfer_big_word,
3723         xfer_big_long, xfer_little_word, xfer_little_long,
3724         swap_word,swap_long): Added.
3725         * interp.c (ColdReset): Provide function indirection to
3726         host<->simulated_target transfer routines.
3727         * interp.c (sim_store_register, sim_fetch_register): Updated to
3728         make use of indirected transfer routines.
3729
3730 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3731
3732         * gencode.c (process_instructions): Ensure FP ABS instruction
3733         recognised.
3734         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3735         system call support.
3736
3737 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3738
3739         * interp.c (sim_do_command): Complain if callback structure not
3740         initialised.
3741
3742 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3743
3744         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3745         support for Sun hosts.
3746         * Makefile.in (gencode): Ensure the host compiler and libraries
3747         used for cross-hosted build.
3748
3749 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3750
3751         * interp.c, gencode.c: Some more (TODO) tidying.
3752
3753 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3754
3755         * gencode.c, interp.c: Replaced explicit long long references with
3756         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3757         * support.h (SET64LO, SET64HI): Macros added.
3758
3759 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3760
3761         * configure: Regenerate with autoconf 2.7.
3762
3763 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3764
3765         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3766         * support.h: Remove superfluous "1" from #if.
3767         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3768
3769 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3770
3771         * interp.c (StoreFPR): Control UndefinedResult() call on
3772         WARN_RESULT manifest.
3773
3774 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3775
3776         * gencode.c: Tidied instruction decoding, and added FP instruction
3777         support.
3778
3779         * interp.c: Added dineroIII, and BSD profiling support. Also
3780         run-time FP handling.
3781
3782 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3783
3784         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3785         gencode.c, interp.c, support.h: created.