sim/mips/micromipsrun.c

   1 /*  Run function for the micromips simulator
   2
   3     Copyright (C) 2005-2022 Free Software Foundation, Inc.
   4     Contributed by Imagination Technologies, Ltd.
   5     Written by Andrew Bennett <andrew.bennett@imgtec.com>.
   6
   7     This file is part of the MIPS sim.
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 3 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 /* This must come before any other includes.  */
  23 #include "defs.h"
  24
  25 #include "sim-main.h"
  26 #include "micromips16_idecode.h"
  27 #include "micromips32_idecode.h"
  28 #include "micromips_m32_idecode.h"
  29 #include "bfd.h"
  30 #include "sim-engine.h"
  31
  32 /* These definitions come from the *_support.h files generated by igen and are
  33    required because they are used in some of the macros in the code below.
  34    Unfortunately we can not just blindly include the *_support.h files to get
  35    these definitions because some of the defines in these files are specific
  36    for a particular configuration of the simulator for example instruction word
  37    size is 16 bits for micromips16 and 32 bits for micromips32.  This means we
  38    could break future code changes by doing this, so a safer approach is to just
  39    extract the defines that we need to get this file to compile.  */
  40 #define SD sd
  41 #define CPU cpu
  42
  43 address_word
  44 micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
  45                               address_word cia,
  46                               int instruction_size)
  47 {
  48   if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_ANY)
  49     {
  50       micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
  51       if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
  52           && MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
  53         return micromips16_idecode_issue (sd, instruction_0, cia);
  54       else
  55         {
  56           micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
  57           return micromips32_idecode_issue (sd, instruction_0, cia);
  58         }
  59     }
  60   else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_16)
  61     {
  62       micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
  63       if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
  64           && MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
  65         return micromips16_idecode_issue (sd, instruction_0, cia);
  66       else
  67         sim_engine_abort (sd, cpu, cia,
  68                           "Invalid 16 bit micromips instruction");
  69     }
  70   else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_32)
  71     {
  72       micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
  73       return micromips32_idecode_issue (sd, instruction_0, cia);
  74     }
  75   else
  76     return NULL_CIA;
  77 }
  78
  79 void
  80 sim_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus,
  81                 int signal)
  82 {
  83   struct mips_sim_state *state = MIPS_SIM_STATE (sd);
  84   micromips_m32_instruction_word instruction_0;
  85   sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
  86   micromips32_instruction_address cia = CPU_PC_GET (cpu);
  87   state->isa_mode = ISA_MODE_MIPS32;
  88
  89   while (1)
  90     {
  91       micromips32_instruction_address nia;
  92
  93       /* Allow us to switch back from MIPS32 to microMIPS
  94          This covers two cases:
  95          1. Setting the correct isa mode based on the start address
  96          from the elf header.
  97          2. Setting the correct isa mode after a MIPS32 jump or branch
  98          instruction.  */
  99       if ((state->isa_mode == ISA_MODE_MIPS32)
 100           && ((cia & 0x1) == ISA_MODE_MICROMIPS))
 101         {
 102           state->isa_mode = ISA_MODE_MICROMIPS;
 103           cia = cia & ~0x1;
 104         }
 105
 106 #if defined (ENGINE_ISSUE_PREFIX_HOOK)
 107       ENGINE_ISSUE_PREFIX_HOOK ();
 108 #endif
 109       switch (state->isa_mode)
 110         {
 111         case ISA_MODE_MICROMIPS:
 112           nia =
 113             micromips_instruction_decode (sd, cpu, cia,
 114                                           MICROMIPS_DELAYSLOT_SIZE_ANY);
 115           break;
 116         case ISA_MODE_MIPS32:
 117           instruction_0 = IMEM32 (cia);
 118           nia = micromips_m32_idecode_issue (sd, instruction_0, cia);
 119           break;
 120         default:
 121           nia = NULL_CIA;
 122         }
 123
 124 #if defined (ENGINE_ISSUE_POSTFIX_HOOK)
 125       ENGINE_ISSUE_POSTFIX_HOOK ();
 126 #endif
 127
 128       /* Update the instruction address */
 129       cia = nia;
 130
 131       /* process any events */
 132       if (sim_events_tick (sd))
 133         {
 134           CPU_PC_SET (cpu, cia);
 135           sim_events_process (sd);
 136           cia = CPU_PC_GET (cpu);
 137         }
 138     }
 139 }