sim/mn10300/dv-mn103ser.c

   1 /*  This file is part of the program GDB, the GNU debugger.
   2
   3     Copyright (C) 1998-2022 Free Software Foundation, Inc.
   4     Contributed by Cygnus Solutions.
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 3 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18
  19     */
  20
  21 /* This must come before any other includes.  */
  22 #include "defs.h"
  23
  24 #include "sim-main.h"
  25 #include "hw-main.h"
  26 #include "dv-sockser.h"
  27
  28
  29 /* DEVICE
  30
  31
  32    mn103ser - mn103002 serial devices 0, 1 and 2.
  33
  34
  35    DESCRIPTION
  36
  37    Implements the mn103002 serial interfaces as described in the
  38    mn103002 user guide.
  39
  40
  41    PROPERTIES
  42
  43    reg = <serial-addr> <serial-size>
  44
  45
  46    BUGS
  47
  48    */
  49
  50
  51 /* The serial devices' registers' address block */
  52
  53 struct mn103ser_block {
  54   unsigned_word base;
  55   unsigned_word bound;
  56 };
  57
  58
  59
  60 enum serial_register_types {
  61     SC0CTR,
  62     SC1CTR,
  63     SC2CTR,
  64     SC0ICR,
  65     SC1ICR,
  66     SC2ICR,
  67     SC0TXB,
  68     SC1TXB,
  69     SC2TXB,
  70     SC0RXB,
  71     SC1RXB,
  72     SC2RXB,
  73     SC0STR,
  74     SC1STR,
  75     SC2STR,
  76     SC2TIM,
  77 };
  78
  79
  80 #define NR_SERIAL_DEVS  3
  81 #define SIO_STAT_RRDY 0x0010
  82
  83 typedef struct _mn10300_serial {
  84   unsigned16 status, control;
  85   unsigned8  txb, rxb, intmode;
  86   struct hw_event *event;
  87 } mn10300_serial;
  88
  89
  90
  91 struct mn103ser {
  92   struct mn103ser_block block;
  93   mn10300_serial device[NR_SERIAL_DEVS];
  94   unsigned8      serial2_timer_reg;
  95   do_hw_poll_read_method *reader;
  96 };
  97
  98 /* output port ID's */
  99
 100 /* for mn103002 */
 101 enum {
 102   SERIAL0_RECEIVE,
 103   SERIAL1_RECEIVE,
 104   SERIAL2_RECEIVE,
 105   SERIAL0_SEND,
 106   SERIAL1_SEND,
 107   SERIAL2_SEND,
 108 };
 109
 110
 111 static const struct hw_port_descriptor mn103ser_ports[] = {
 112
 113   { "serial-0-receive",  SERIAL0_RECEIVE, 0, output_port, },
 114   { "serial-1-receive",  SERIAL1_RECEIVE, 0, output_port, },
 115   { "serial-2-receive",  SERIAL2_RECEIVE, 0, output_port, },
 116   { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
 117   { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
 118   { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
 119
 120   { NULL, },
 121 };
 122
 123
 124
 125 /* Finish off the partially created hw device.  Attach our local
 126    callbacks.  Wire up our port names etc */
 127
 128 static hw_io_read_buffer_method mn103ser_io_read_buffer;
 129 static hw_io_write_buffer_method mn103ser_io_write_buffer;
 130
 131 static void
 132 attach_mn103ser_regs (struct hw *me,
 133                       struct mn103ser *serial)
 134 {
 135   unsigned_word attach_address;
 136   int attach_space;
 137   unsigned attach_size;
 138   reg_property_spec reg;
 139
 140   if (hw_find_property (me, "reg") == NULL)
 141     hw_abort (me, "Missing \"reg\" property");
 142
 143   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
 144     hw_abort (me, "\"reg\" property must contain three addr/size entries");
 145   hw_unit_address_to_attach_address (hw_parent (me),
 146                                      &reg.address,
 147                                      &attach_space,
 148                                      &attach_address,
 149                                      me);
 150   serial->block.base = attach_address;
 151   hw_unit_size_to_attach_size (hw_parent (me),
 152                                &reg.size,
 153                                &attach_size, me);
 154   serial->block.bound = attach_address + (attach_size - 1);
 155   hw_attach_address (hw_parent (me),
 156                      0,
 157                      attach_space, attach_address, attach_size,
 158                      me);
 159 }
 160
 161 static void
 162 mn103ser_finish (struct hw *me)
 163 {
 164   struct mn103ser *serial;
 165   int i;
 166
 167   serial = HW_ZALLOC (me, struct mn103ser);
 168   set_hw_data (me, serial);
 169   set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
 170   set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
 171   set_hw_ports (me, mn103ser_ports);
 172
 173   /* Attach ourself to our parent bus */
 174   attach_mn103ser_regs (me, serial);
 175
 176   /* If so configured, enable polled input */
 177   if (hw_find_property (me, "poll?") != NULL
 178       && hw_find_boolean_property (me, "poll?"))
 179     {
 180       serial->reader = sim_io_poll_read;
 181     }
 182   else
 183     {
 184       serial->reader = sim_io_read;
 185     }
 186
 187   /* Initialize the serial device registers. */
 188   for ( i=0; i<NR_SERIAL_DEVS; ++i )
 189     {
 190       serial->device[i].txb = 0;
 191       serial->device[i].rxb = 0;
 192       serial->device[i].status = 0;
 193       serial->device[i].control = 0;
 194       serial->device[i].intmode = 0;
 195       serial->device[i].event = NULL;
 196     }
 197 }
 198
 199
 200 /* read and write */
 201
 202 static int
 203 decode_addr (struct hw *me,
 204              struct mn103ser *serial,
 205              unsigned_word address)
 206 {
 207   unsigned_word offset;
 208   offset = address - serial->block.base;
 209   switch (offset)
 210     {
 211     case 0x00: return SC0CTR;
 212     case 0x04: return SC0ICR;
 213     case 0x08: return SC0TXB;
 214     case 0x09: return SC0RXB;
 215     case 0x0C: return SC0STR;
 216     case 0x10: return SC1CTR;
 217     case 0x14: return SC1ICR;
 218     case 0x18: return SC1TXB;
 219     case 0x19: return SC1RXB;
 220     case 0x1C: return SC1STR;
 221     case 0x20: return SC2CTR;
 222     case 0x24: return SC2ICR;
 223     case 0x28: return SC2TXB;
 224     case 0x29: return SC2RXB;
 225     case 0x2C: return SC2STR;
 226     case 0x2D: return SC2TIM;
 227     default:
 228       {
 229         hw_abort (me, "bad address");
 230         return -1;
 231       }
 232     }
 233 }
 234
 235 static void
 236 do_polling_event (struct hw *me,
 237                   void *data)
 238 {
 239   SIM_DESC sd = hw_system (me);
 240   struct mn103ser *serial = hw_data(me);
 241   long serial_reg = (long) data;
 242   char c;
 243   int count, status;
 244
 245   status = dv_sockser_status (sd);
 246   if (!(status & DV_SOCKSER_DISCONNECTED))
 247     {
 248       int rd;
 249       rd = dv_sockser_read (sd);
 250       if(rd != -1)
 251         {
 252           c = (char) rd;
 253           count = 1;
 254         }
 255       else
 256         {
 257           count = HW_IO_NOT_READY;
 258         }
 259     }
 260   else
 261     {
 262       count = do_hw_poll_read (me, serial->reader,
 263                                0/*STDIN*/, &c, sizeof(c));
 264     }
 265
 266
 267   switch (count)
 268     {
 269     case HW_IO_NOT_READY:
 270     case HW_IO_EOF:
 271       serial->device[serial_reg].rxb = 0;
 272       serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
 273       break;
 274     default:
 275       serial->device[serial_reg].rxb = c;
 276       serial->device[serial_reg].status |= SIO_STAT_RRDY;
 277       hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
 278     }
 279
 280   /* Schedule next polling event */
 281   serial->device[serial_reg].event
 282     = hw_event_queue_schedule (me, 1000,
 283                                do_polling_event, (void *)serial_reg);
 284
 285 }
 286
 287 static void
 288 read_control_reg (struct hw *me,
 289                   struct mn103ser *serial,
 290                   unsigned_word serial_reg,
 291                   void *dest,
 292                   unsigned  nr_bytes)
 293 {
 294   /* really allow 1 byte read, too */
 295   if ( nr_bytes == 2 )
 296     {
 297       *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].control);
 298     }
 299   else
 300     {
 301       hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
 302                 serial_reg);
 303     }
 304 }
 305
 306
 307 static void
 308 read_intmode_reg (struct hw *me,
 309                   struct mn103ser *serial,
 310                   unsigned_word serial_reg,
 311                   void *dest,
 312                   unsigned  nr_bytes)
 313 {
 314   if ( nr_bytes == 1 )
 315     {
 316       *(unsigned8 *)dest = serial->device[serial_reg].intmode;
 317     }
 318   else
 319     {
 320       hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
 321                 serial_reg);
 322     }
 323 }
 324
 325
 326 static void
 327 read_txb (struct hw *me,
 328           struct mn103ser *serial,
 329           unsigned_word serial_reg,
 330           void *dest,
 331           unsigned  nr_bytes)
 332 {
 333   if ( nr_bytes == 1 )
 334     {
 335       *(unsigned8 *)dest = serial->device[serial_reg].txb;
 336     }
 337   else
 338     {
 339       hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
 340                 serial_reg);
 341     }
 342 }
 343
 344
 345 static void
 346 read_rxb (struct hw *me,
 347           struct mn103ser *serial,
 348           unsigned_word serial_reg,
 349           void *dest,
 350           unsigned  nr_bytes)
 351 {
 352   if ( nr_bytes == 1 )
 353     {
 354       *(unsigned8 *)dest = serial->device[serial_reg].rxb;
 355       /* Reception buffer is now empty. */
 356       serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
 357     }
 358   else
 359     {
 360       hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
 361                 serial_reg);
 362     }
 363 }
 364
 365
 366 static void
 367 read_status_reg (struct hw *me,
 368                  struct mn103ser *serial,
 369                  unsigned_word serial_reg,
 370                  void *dest,
 371                  unsigned  nr_bytes)
 372 {
 373   char c;
 374   int count;
 375
 376   if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
 377     {
 378       SIM_DESC sd = hw_system (me);
 379       int status;
 380
 381       /* FIFO is empty */
 382       /* Kill current poll event */
 383       if ( NULL != serial->device[serial_reg].event )
 384         {
 385           hw_event_queue_deschedule (me, serial->device[serial_reg].event);
 386           serial->device[serial_reg].event = NULL;
 387         }
 388
 389       status = dv_sockser_status (sd);
 390       if (!(status & DV_SOCKSER_DISCONNECTED))
 391         {
 392           int rd;
 393           rd = dv_sockser_read (sd);
 394           if(rd != -1)
 395             {
 396               c = (char) rd;
 397               count = 1;
 398             }
 399           else
 400             {
 401               count = HW_IO_NOT_READY;
 402             }
 403         }
 404       else
 405         {
 406           count = do_hw_poll_read (me, serial->reader,
 407                                    0/*STDIN*/, &c, sizeof(c));
 408         }
 409
 410       switch (count)
 411         {
 412         case HW_IO_NOT_READY:
 413         case HW_IO_EOF:
 414           serial->device[serial_reg].rxb = 0;
 415           serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
 416           break;
 417         default:
 418           serial->device[serial_reg].rxb = c;
 419           serial->device[serial_reg].status |= SIO_STAT_RRDY;
 420           hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
 421         }
 422
 423       /* schedule polling event */
 424       serial->device[serial_reg].event
 425         = hw_event_queue_schedule (me, 1000,
 426                                    do_polling_event,
 427                                    (void *) (long) serial_reg);
 428     }
 429
 430   if ( nr_bytes == 1 )
 431     {
 432       *(unsigned8 *)dest = (unsigned8)serial->device[serial_reg].status;
 433     }
 434   else if ( nr_bytes == 2 && serial_reg != SC2STR )
 435     {
 436       *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].status);
 437     }
 438   else
 439     {
 440       hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
 441                 serial_reg);
 442     }
 443 }
 444
 445
 446 static void
 447 read_serial2_timer_reg (struct hw *me,
 448                         struct mn103ser *serial,
 449                         void *dest,
 450                         unsigned  nr_bytes)
 451 {
 452   if ( nr_bytes == 1 )
 453     {
 454       * (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;
 455     }
 456   else
 457     {
 458       hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
 459     }
 460 }
 461
 462
 463 static unsigned
 464 mn103ser_io_read_buffer (struct hw *me,
 465                          void *dest,
 466                          int space,
 467                          unsigned_word base,
 468                          unsigned nr_bytes)
 469 {
 470   struct mn103ser *serial = hw_data (me);
 471   enum serial_register_types serial_reg;
 472   HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
 473
 474   serial_reg = decode_addr (me, serial, base);
 475   switch (serial_reg)
 476     {
 477     /* control registers */
 478     case SC0CTR:
 479     case SC1CTR:
 480     case SC2CTR:
 481       read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
 482       HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
 483                  *(unsigned8 *)dest));
 484       break;
 485
 486     /* interrupt mode registers */
 487     case SC0ICR:
 488     case SC1ICR:
 489     case SC2ICR:
 490       read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
 491       HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
 492                  *(unsigned8 *)dest));
 493       break;
 494
 495     /* transmission buffers */
 496     case SC0TXB:
 497     case SC1TXB:
 498     case SC2TXB:
 499       read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
 500       HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
 501                  *(char *)dest));
 502       break;
 503
 504     /* reception buffers */
 505     case SC0RXB:
 506     case SC1RXB:
 507     case SC2RXB:
 508       read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
 509       HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
 510                  *(char *)dest));
 511      break;
 512
 513     /* status registers */
 514     case SC0STR:
 515     case SC1STR:
 516     case SC2STR:
 517       read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
 518       HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
 519                  *(unsigned8 *)dest));
 520       break;
 521
 522     case SC2TIM:
 523       read_serial2_timer_reg(me, serial, dest, nr_bytes);
 524       HW_TRACE ((me, "read - serial2 timer reg %d\n", *(unsigned8 *)dest));
 525       break;
 526
 527     default:
 528       hw_abort(me, "invalid address");
 529     }
 530
 531   return nr_bytes;
 532 }
 533
 534
 535 static void
 536 write_control_reg (struct hw *me,
 537                    struct mn103ser *serial,
 538                    unsigned_word serial_reg,
 539                    const void *source,
 540                    unsigned  nr_bytes)
 541 {
 542   unsigned16 val = LE2H_2 (*(unsigned16 *)source);
 543
 544   /* really allow 1 byte write, too */
 545   if ( nr_bytes == 2 )
 546     {
 547       if ( serial_reg == 2 && (val & 0x0C04) != 0 )
 548         {
 549           hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
 550         }
 551       else
 552         {
 553           serial->device[serial_reg].control = val;
 554         }
 555     }
 556   else
 557     {
 558       hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
 559                 serial_reg);
 560     }
 561 }
 562
 563
 564 static void
 565 write_intmode_reg (struct hw *me,
 566                    struct mn103ser *serial,
 567                    unsigned_word serial_reg,
 568                    const void *source,
 569                    unsigned  nr_bytes)
 570 {
 571 unsigned8 val = *(unsigned8 *)source;
 572
 573   if ( nr_bytes == 1 )
 574     {
 575       /* Check for attempt to write to read-only bits of register. */
 576       if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
 577            || ( serial_reg != 2 && (val & 0x4A) != 0 ) )
 578         {
 579           hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
 580                    serial_reg);
 581         }
 582       else
 583         {
 584           serial->device[serial_reg].intmode = val;
 585         }
 586     }
 587   else
 588     {
 589       hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
 590                 serial_reg);
 591     }
 592 }
 593
 594
 595 static void
 596 write_txb (struct hw *me,
 597            struct mn103ser *serial,
 598            unsigned_word serial_reg,
 599            const void *source,
 600            unsigned  nr_bytes)
 601 {
 602   if ( nr_bytes == 1 )
 603     {
 604       SIM_DESC sd = hw_system (me);
 605       int status;
 606
 607       serial->device[serial_reg].txb = *(unsigned8 *)source;
 608
 609       status = dv_sockser_status (sd);
 610       if (!(status & DV_SOCKSER_DISCONNECTED))
 611         {
 612           dv_sockser_write(sd, * (char*) source);
 613         }
 614       else
 615         {
 616           sim_io_write_stdout(sd, (char *)source, 1);
 617           sim_io_flush_stdout(sd);
 618         }
 619
 620       hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
 621     }
 622   else
 623     {
 624       hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
 625                 serial_reg);
 626     }
 627 }
 628
 629
 630 static void
 631 write_serial2_timer_reg (struct hw *me,
 632                          struct mn103ser *serial,
 633                          const void *source,
 634                          unsigned  nr_bytes)
 635 {
 636   if ( nr_bytes == 1 )
 637     {
 638       serial->serial2_timer_reg = *(unsigned8 *)source;
 639     }
 640   else
 641     {
 642       hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
 643     }
 644 }
 645
 646
 647 static unsigned
 648 mn103ser_io_write_buffer (struct hw *me,
 649                           const void *source,
 650                           int space,
 651                           unsigned_word base,
 652                           unsigned nr_bytes)
 653 {
 654   struct mn103ser *serial = hw_data (me);
 655   enum serial_register_types serial_reg;
 656   HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
 657
 658   serial_reg = decode_addr (me, serial, base);
 659   switch (serial_reg)
 660     {
 661     /* control registers */
 662     case SC0CTR:
 663     case SC1CTR:
 664     case SC2CTR:
 665       HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
 666                  serial_reg-SC0CTR, *(unsigned8 *)source, nr_bytes));
 667       write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
 668       break;
 669
 670     /* interrupt mode registers */
 671     case SC0ICR:
 672     case SC1ICR:
 673     case SC2ICR:
 674       HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
 675                  serial_reg-SC0ICR, *(unsigned8 *)source, nr_bytes));
 676       write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
 677       break;
 678
 679     /* transmission buffers */
 680     case SC0TXB:
 681     case SC1TXB:
 682     case SC2TXB:
 683       HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
 684                  serial_reg-SC0TXB, *(char *)source, nr_bytes));
 685       write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
 686       break;
 687
 688     /* reception buffers */
 689     case SC0RXB:
 690     case SC1RXB:
 691     case SC2RXB:
 692       hw_abort(me, "Cannot write to reception buffer.");
 693      break;
 694
 695     /* status registers */
 696     case SC0STR:
 697     case SC1STR:
 698     case SC2STR:
 699       hw_abort(me, "Cannot write to status register.");
 700       break;
 701
 702     case SC2TIM:
 703       HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
 704                  *(unsigned8 *)source, nr_bytes));
 705       write_serial2_timer_reg(me, serial, source, nr_bytes);
 706       break;
 707
 708     default:
 709       hw_abort(me, "invalid address");
 710     }
 711
 712   return nr_bytes;
 713 }
 714
 715
 716 const struct hw_descriptor dv_mn103ser_descriptor[] = {
 717   { "mn103ser", mn103ser_finish, },
 718   { NULL },
 719 };