1 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
3 * config.in: Regenerate.
6 * configure: Regenerate.
8 2009-07-31 Anthony Green <green@moxielogic.com>
10 * interp.c: Increase simulated memory to 16MB.
11 (sim_resume): Tweak swi system calls to support new ABI (up to 5
12 args in regs). Also simluate proper exception processing for
15 2009-07-30 Anthony Green <green@moxielogic.com>
17 * interp.c (sim_resume): Add system call software interrupt support.
19 2009-06-11 Anthony Green <green@moxielogic.com>
21 * interp.c (INST2OFFSET): Define.
22 (sim_resume): Support new PC relative branch instructions.
24 2009-05-09 Anthony Green <green@moxielogic.com>
26 * interp.c (sim_resume): Add missing breaks in switch.
28 2008-10-03 Anthony Green <green@moxielogic.com>
30 * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s.
32 2008-09-10 Anthony Green <green@moxielogic.com>
34 * interp.c (NUM_SPRO_SREGS): New.
35 (struct moxie_regset): Add sregs.
36 (set_initial_gprs): Initialize sregs.
37 (sim_resume): Add gsr and ssr support.
39 2008-09-04 Anthony Green <green@moxielogic.com>
41 * interp.c (sim_resume): Add inc and dec instructions.
43 2008-09-04 Anthony Green <green@moxielogic.com>
45 * interp.c (struct moxie_regset): Use an unsigned long long to keep
46 track of instruction trace counts.
47 * interp.c (sim_resume): Ditto.
50 2008-08-22 Anthony Green <green@moxielogic.com>
52 * interp.c (sim_resume): Remove debugging code.
54 2008-08-20 Anthony Green <green@moxielogic.com>
56 * interp.c (TRACE): Add new tracing infrastructure.
58 (reg_names): Add new registers.
59 (NUM_MOXIE_REGS): New registers.
60 (PC_REGNO): New registers.
61 (sim_resume): New instruction encodings.
63 2008-08-16 Anthony Green <green@moxielogic.com>
65 * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write.
66 (convert_target_flags): New function.
68 2008-08-08 Anthony Green <green@moxielogic.com>
70 * interp.c (sim_resume): Add SYS_open and SYS_write system call support.
72 2008-08-04 Anthony Green <green@moxielogic.com>
74 * Makefile.in (SIM_EXTRA_LIBS): Add -lz.
76 2008-08-04 Anthony Green <green@moxielogic.com>
78 * interp.c (sim_create_inferior): Set argc & argv in the target.
80 2008-04-12 Anthony Green <green@moxielogic.com>
82 * interp.c (sim_resume): Add brk.
84 2008-04-10 Anthony Green <green@moxielogic.com>
86 * interp.c (sim_resume): Add static chain pointer to call frame.
88 2008-03-24 Anthony Green <green@moxielogic.com>
90 * interp.c (sim_resume): Add missing breaks.
91 (sim_resume): Fix neg implementation.
93 2008-03-23 Anthony Green <green@moxielogic.com>
95 * interp.c (sim_load): Don't require a .bss section.
97 2008-03-21 Anthony Green <green@moxielogic.com>
99 * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or,
102 2008-03-20 Anthony Green <green@moxielogic.com>
104 * interp.c (struct moxie_regset): Add condition code, cc.
105 (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define.
106 (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu,
107 bge, ble, bgeu, and bleu.
108 (rbat, rsat, wbat, wsat): New functions.
109 (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b,
110 sta.b, st.s, sta.s, jmp.
112 2008-03-19 Anthony Green <green@moxielogic.com>
114 * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l.
115 jsra should set $fp == $sp.
116 Fix jsra and ret semantics.
118 2008-03-18 Anthony Green <green@moxielogic.com>
120 * interp.c (sim_resume): Add push, pop and add.l.
122 2008-03-16 Anthony Green <green@moxielogic.com>
124 * interp.c (EXTRACT_WORD): Define.
125 (rlat): Use EXTRACT_WORD.
126 (sim_resume): Add jsra and ret.
128 2008-02-22 Anthony Green <green@moxielogic.com>
130 * interp.c (reg_names): Define.
131 (sim_resume): Use reg_names.
133 2008-02-21 Anthony Green <green@moxielogic.com>
135 * config.in, configure, configure.ac, interp.c, Makefile.in,