1 2012-09-07 Anthony Green <green@moxielogic.com>
3 * interp.c (sim_resume): Branches are now relative to the
4 address of the instruction following the branch.
6 2012-06-17 Mike Frysinger <vapier@gentoo.org>
8 * interp.c: Include config.h first. Also include fcntl.h directly.
10 2012-06-15 Joel Brobecker <brobecker@adacore.com>
12 * config.in, configure: Regenerate.
14 2012-03-24 Mike Frysinger <vapier@gentoo.org>
16 * aclocal.m4, config.in, configure: Regenerate.
18 2011-12-03 Mike Frysinger <vapier@gentoo.org>
20 * aclocal.m4: New file.
21 * configure: Regenerate.
23 2011-10-17 Mike Frysinger <vapier@gentoo.org>
25 * configure.ac: Change include to common/acinclude.m4.
27 2011-10-17 Mike Frysinger <vapier@gentoo.org>
29 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
30 call. Replace common.m4 include with SIM_AC_COMMON.
31 * configure: Regenerate.
33 2010-04-14 Mike Frysinger <vapier@gentoo.org>
35 * interp.c (sim_write): Add const to buffer arg.
37 2010-02-27 Jan Kratochvil <jan.kratochvil@redhat.com>
39 * interp.c (sim_create_inferior): Fix crashes on zero PROG_BFD or ARGV.
41 2010-02-03 Anthony Green <green@moxielogic.com>
43 * interp.c (sim_resume): nop is 0x0f, and 0x00 is an illegal
46 2010-01-13 Anthony Green <green@moxielogic.com>
48 * interp.c (sim_open): Add period to end of sentence in comment.
50 2010-01-13 Anthony Green <green@moxielogic.com>
52 * interp.c (sim_open): Initialize the SIM_DESC object properly
53 with sim_config() and sim_post_argv_init().
55 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
57 * configure: Regenerate.
59 2009-09-10 Anthony Green <green@moxielogic.com>
61 * Makefile.in (install-dtb): New target.
62 (moxie-gdb.dtb): New target.
63 (SIM_CFLAGS): Define DTB macro on command line.
64 (SIM_OBJS): Use common infrastructire.
65 (dtbdir): Define install location for dtb file.
67 * sim-main.h: New file.
68 * moxie-gdb.dts: New file.
69 * configure.ac: Check for dtc. Install dtb file. Remove some old
71 * configure: Regenerate.
72 * interp.c: Many changes to use common memory infrastructure.
73 (load_dtb): New function.
74 (sim_create_inferior): Call it.
76 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
78 * config.in: Regenerate.
79 * configure: Likewise.
81 * configure: Regenerate.
83 2009-07-31 Anthony Green <green@moxielogic.com>
85 * interp.c: Increase simulated memory to 16MB.
86 (sim_resume): Tweak swi system calls to support new ABI (up to 5
87 args in regs). Also simluate proper exception processing for
90 2009-07-30 Anthony Green <green@moxielogic.com>
92 * interp.c (sim_resume): Add system call software interrupt support.
94 2009-06-11 Anthony Green <green@moxielogic.com>
96 * interp.c (INST2OFFSET): Define.
97 (sim_resume): Support new PC relative branch instructions.
99 2009-05-09 Anthony Green <green@moxielogic.com>
101 * interp.c (sim_resume): Add missing breaks in switch.
103 2008-10-03 Anthony Green <green@moxielogic.com>
105 * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s.
107 2008-09-10 Anthony Green <green@moxielogic.com>
109 * interp.c (NUM_SPRO_SREGS): New.
110 (struct moxie_regset): Add sregs.
111 (set_initial_gprs): Initialize sregs.
112 (sim_resume): Add gsr and ssr support.
114 2008-09-04 Anthony Green <green@moxielogic.com>
116 * interp.c (sim_resume): Add inc and dec instructions.
118 2008-09-04 Anthony Green <green@moxielogic.com>
120 * interp.c (struct moxie_regset): Use an unsigned long long to keep
121 track of instruction trace counts.
122 * interp.c (sim_resume): Ditto.
125 2008-08-22 Anthony Green <green@moxielogic.com>
127 * interp.c (sim_resume): Remove debugging code.
129 2008-08-20 Anthony Green <green@moxielogic.com>
131 * interp.c (TRACE): Add new tracing infrastructure.
132 (sim_resume): Use it.
133 (reg_names): Add new registers.
134 (NUM_MOXIE_REGS): New registers.
135 (PC_REGNO): New registers.
136 (sim_resume): New instruction encodings.
138 2008-08-16 Anthony Green <green@moxielogic.com>
140 * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write.
141 (convert_target_flags): New function.
143 2008-08-08 Anthony Green <green@moxielogic.com>
145 * interp.c (sim_resume): Add SYS_open and SYS_write system call support.
147 2008-08-04 Anthony Green <green@moxielogic.com>
149 * Makefile.in (SIM_EXTRA_LIBS): Add -lz.
151 2008-08-04 Anthony Green <green@moxielogic.com>
153 * interp.c (sim_create_inferior): Set argc & argv in the target.
155 2008-04-12 Anthony Green <green@moxielogic.com>
157 * interp.c (sim_resume): Add brk.
159 2008-04-10 Anthony Green <green@moxielogic.com>
161 * interp.c (sim_resume): Add static chain pointer to call frame.
163 2008-03-24 Anthony Green <green@moxielogic.com>
165 * interp.c (sim_resume): Add missing breaks.
166 (sim_resume): Fix neg implementation.
168 2008-03-23 Anthony Green <green@moxielogic.com>
170 * interp.c (sim_load): Don't require a .bss section.
172 2008-03-21 Anthony Green <green@moxielogic.com>
174 * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or,
177 2008-03-20 Anthony Green <green@moxielogic.com>
179 * interp.c (struct moxie_regset): Add condition code, cc.
180 (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define.
181 (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu,
182 bge, ble, bgeu, and bleu.
183 (rbat, rsat, wbat, wsat): New functions.
184 (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b,
185 sta.b, st.s, sta.s, jmp.
187 2008-03-19 Anthony Green <green@moxielogic.com>
189 * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l.
190 jsra should set $fp == $sp.
191 Fix jsra and ret semantics.
193 2008-03-18 Anthony Green <green@moxielogic.com>
195 * interp.c (sim_resume): Add push, pop and add.l.
197 2008-03-16 Anthony Green <green@moxielogic.com>
199 * interp.c (EXTRACT_WORD): Define.
200 (rlat): Use EXTRACT_WORD.
201 (sim_resume): Add jsra and ret.
203 2008-02-22 Anthony Green <green@moxielogic.com>
205 * interp.c (reg_names): Define.
206 (sim_resume): Use reg_names.
208 2008-02-21 Anthony Green <green@moxielogic.com>
210 * config.in, configure, configure.ac, interp.c, Makefile.in,