sim/riscv/interp.c

   1 /* RISC-V simulator.
   2
   3    Copyright (C) 2005-2021 Free Software Foundation, Inc.
   4    Contributed by Mike Frysinger.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 /* This must come before any other includes.  */
  22 #include "defs.h"
  23
  24 #include "sim-main.h"
  25 #include "sim-options.h"
  26 \f
  27 void
  28 sim_engine_run (SIM_DESC sd,
  29                 int next_cpu_nr, /* ignore  */
  30                 int nr_cpus, /* ignore  */
  31                 int siggnal) /* ignore  */
  32 {
  33   SIM_CPU *cpu;
  34
  35   SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  36
  37   cpu = STATE_CPU (sd, 0);
  38
  39   while (1)
  40     {
  41       step_once (cpu);
  42       if (sim_events_tick (sd))
  43         sim_events_process (sd);
  44     }
  45 }
  46 \f
  47 static void
  48 free_state (SIM_DESC sd)
  49 {
  50   if (STATE_MODULES (sd) != NULL)
  51     sim_module_uninstall (sd);
  52   sim_cpu_free_all (sd);
  53   sim_state_free (sd);
  54 }
  55
  56 extern const SIM_MACH * const riscv_sim_machs[];
  57
  58 SIM_DESC
  59 sim_open (SIM_OPEN_KIND kind, host_callback *callback,
  60           struct bfd *abfd, char * const *argv)
  61 {
  62   char c;
  63   int i;
  64   SIM_DESC sd = sim_state_alloc_extra (kind, callback,
  65                                        sizeof (struct riscv_sim_state));
  66
  67   /* Set default options before parsing user options.  */
  68   STATE_MACHS (sd) = riscv_sim_machs;
  69   STATE_MODEL_NAME (sd) = WITH_TARGET_WORD_BITSIZE == 32 ? "RV32G" : "RV64G";
  70   current_target_byte_order = BFD_ENDIAN_LITTLE;
  71
  72   /* The cpu data is kept in a separately allocated chunk of memory.  */
  73   if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
  74     {
  75       free_state (sd);
  76       return 0;
  77     }
  78
  79   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  80     {
  81       free_state (sd);
  82       return 0;
  83     }
  84
  85   /* XXX: Default to the Virtual environment.  */
  86   if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
  87     STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
  88
  89   /* The parser will print an error message for us, so we silently return.  */
  90   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  91     {
  92       free_state (sd);
  93       return 0;
  94     }
  95
  96   /* Check for/establish the a reference program image.  */
  97   if (sim_analyze_program (sd,
  98                            (STATE_PROG_ARGV (sd) != NULL
  99                             ? *STATE_PROG_ARGV (sd)
 100                             : NULL), abfd) != SIM_RC_OK)
 101     {
 102       free_state (sd);
 103       return 0;
 104     }
 105
 106   /* Establish any remaining configuration options.  */
 107   if (sim_config (sd) != SIM_RC_OK)
 108     {
 109       free_state (sd);
 110       return 0;
 111     }
 112
 113   if (sim_post_argv_init (sd) != SIM_RC_OK)
 114     {
 115       free_state (sd);
 116       return 0;
 117     }
 118
 119   /* CPU specific initialization.  */
 120   for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 121     {
 122       SIM_CPU *cpu = STATE_CPU (sd, i);
 123
 124       initialize_cpu (sd, cpu, i);
 125     }
 126
 127   /* Allocate external memory if none specified by user.
 128      Use address 4 here in case the user wanted address 0 unmapped.  */
 129   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
 130     sim_do_commandf (sd, "memory-size %#x", DEFAULT_MEM_SIZE);
 131
 132   return sd;
 133 }
 134 \f
 135 SIM_RC
 136 sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
 137                      char * const *argv, char * const *env)
 138 {
 139   SIM_CPU *cpu = STATE_CPU (sd, 0);
 140   SIM_ADDR addr;
 141
 142   /* Set the PC.  */
 143   if (abfd != NULL)
 144     addr = bfd_get_start_address (abfd);
 145   else
 146     addr = 0;
 147   sim_pc_set (cpu, addr);
 148
 149   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 150      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 151      with `gdb`), we need to handle it because the user can change the
 152      argv on the fly via gdb's 'run'.  */
 153   if (STATE_PROG_ARGV (sd) != argv)
 154     {
 155       freeargv (STATE_PROG_ARGV (sd));
 156       STATE_PROG_ARGV (sd) = dupargv (argv);
 157     }
 158
 159   initialize_env (sd, (void *)argv, (void *)env);
 160
 161   return SIM_RC_OK;
 162 }