* gdb-if.c (sim_do_command): Add a "sim verbose noisy" command.
[deliverable/binutils-gdb.git] / sim / rx / gdb-if.c
1 /* gdb-if.c -- sim interface to GDB.
2
3 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
5
6 This file is part of the GNU simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include <stdio.h>
22 #include <assert.h>
23 #include <signal.h>
24 #include <string.h>
25 #include <ctype.h>
26 #include <stdlib.h>
27
28 #include "ansidecl.h"
29 #include "gdb/callback.h"
30 #include "gdb/remote-sim.h"
31 #include "gdb/signals.h"
32 #include "gdb/sim-rx.h"
33
34 #include "cpu.h"
35 #include "mem.h"
36 #include "load.h"
37 #include "syscalls.h"
38 #include "err.h"
39 #include "trace.h"
40
41 /* Ideally, we'd wrap up all the minisim's data structures in an
42 object and pass that around. However, neither GDB nor run needs
43 that ability.
44
45 So we just have one instance, that lives in global variables, and
46 each time we open it, we re-initialize it. */
47 struct sim_state
48 {
49 const char *message;
50 };
51
52 static struct sim_state the_minisim = {
53 "This is the sole rx minisim instance. See libsim.a's global variables."
54 };
55
56 static int open;
57
58 SIM_DESC
59 sim_open (SIM_OPEN_KIND kind,
60 struct host_callback_struct *callback,
61 struct bfd *abfd, char **argv)
62 {
63 if (open)
64 fprintf (stderr, "rx minisim: re-opened sim\n");
65
66 /* The 'run' interface doesn't use this function, so we don't care
67 about KIND; it's always SIM_OPEN_DEBUG. */
68 if (kind != SIM_OPEN_DEBUG)
69 fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
70 kind);
71
72 set_callbacks (callback);
73
74 /* We don't expect any command-line arguments. */
75
76 init_mem ();
77 init_regs ();
78 execution_error_init_debugger ();
79
80 sim_disasm_init (abfd);
81 open = 1;
82 return &the_minisim;
83 }
84
85 static void
86 check_desc (SIM_DESC sd)
87 {
88 if (sd != &the_minisim)
89 fprintf (stderr, "rx minisim: desc != &the_minisim\n");
90 }
91
92 void
93 sim_close (SIM_DESC sd, int quitting)
94 {
95 check_desc (sd);
96
97 /* Not much to do. At least free up our memory. */
98 init_mem ();
99
100 open = 0;
101 }
102
103 static bfd *
104 open_objfile (const char *filename)
105 {
106 bfd *prog = bfd_openr (filename, 0);
107
108 if (!prog)
109 {
110 fprintf (stderr, "Can't read %s\n", filename);
111 return 0;
112 }
113
114 if (!bfd_check_format (prog, bfd_object))
115 {
116 fprintf (stderr, "%s not a rx program\n", filename);
117 return 0;
118 }
119
120 return prog;
121 }
122
123 static struct swap_list
124 {
125 bfd_vma start, end;
126 struct swap_list *next;
127 } *swap_list = NULL;
128
129 static void
130 free_swap_list (void)
131 {
132 while (swap_list)
133 {
134 struct swap_list *next = swap_list->next;
135 free (swap_list);
136 swap_list = next;
137 }
138 }
139
140 /* When running in big endian mode, we must do an additional
141 byte swap of memory areas used to hold instructions. See
142 the comment preceding rx_load in load.c to see why this is
143 so.
144
145 Construct a list of memory areas that must be byte swapped.
146 This list will be consulted when either reading or writing
147 memory. */
148
149 static void
150 build_swap_list (struct bfd *abfd)
151 {
152 asection *s;
153 free_swap_list ();
154
155 /* Nothing to do when in little endian mode. */
156 if (!rx_big_endian)
157 return;
158
159 for (s = abfd->sections; s; s = s->next)
160 {
161 if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
162 {
163 struct swap_list *sl;
164 bfd_size_type size;
165
166 size = bfd_get_section_size (s);
167 if (size <= 0)
168 continue;
169
170 sl = malloc (sizeof (struct swap_list));
171 assert (sl != NULL);
172 sl->next = swap_list;
173 sl->start = bfd_section_lma (abfd, s);
174 sl->end = sl->start + size;
175 swap_list = sl;
176 }
177 }
178 }
179
180 static int
181 addr_in_swap_list (bfd_vma addr)
182 {
183 struct swap_list *s;
184
185 for (s = swap_list; s; s = s->next)
186 {
187 if (s->start <= addr && addr < s->end)
188 return 1;
189 }
190 return 0;
191 }
192
193 SIM_RC
194 sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
195 {
196 check_desc (sd);
197
198 if (!abfd)
199 abfd = open_objfile (prog);
200 if (!abfd)
201 return SIM_RC_FAIL;
202
203 rx_load (abfd);
204 build_swap_list (abfd);
205
206 return SIM_RC_OK;
207 }
208
209 SIM_RC
210 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
211 {
212 check_desc (sd);
213
214 if (abfd)
215 {
216 rx_load (abfd);
217 build_swap_list (abfd);
218 }
219
220 return SIM_RC_OK;
221 }
222
223 int
224 sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
225 {
226 int i;
227
228 check_desc (sd);
229
230 if (mem == 0)
231 return 0;
232
233 execution_error_clear_last_error ();
234
235 for (i = 0; i < length; i++)
236 {
237 bfd_vma addr = mem + i;
238 int do_swap = addr_in_swap_list (addr);
239 buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
240
241 if (execution_error_get_last_error () != SIM_ERR_NONE)
242 return i;
243 }
244
245 return length;
246 }
247
248 int
249 sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
250 {
251 int i;
252
253 check_desc (sd);
254
255 execution_error_clear_last_error ();
256
257 for (i = 0; i < length; i++)
258 {
259 bfd_vma addr = mem + i;
260 int do_swap = addr_in_swap_list (addr);
261 mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
262
263 if (execution_error_get_last_error () != SIM_ERR_NONE)
264 return i;
265 }
266
267 return length;
268 }
269
270 /* Read the LENGTH bytes at BUF as an little-endian value. */
271 static DI
272 get_le (unsigned char *buf, int length)
273 {
274 DI acc = 0;
275 while (--length >= 0)
276 acc = (acc << 8) + buf[length];
277
278 return acc;
279 }
280
281 /* Read the LENGTH bytes at BUF as a big-endian value. */
282 static DI
283 get_be (unsigned char *buf, int length)
284 {
285 DI acc = 0;
286 while (length-- > 0)
287 acc = (acc << 8) + *buf++;
288
289 return acc;
290 }
291
292 /* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
293 static void
294 put_le (unsigned char *buf, int length, DI val)
295 {
296 int i;
297
298 for (i = 0; i < length; i++)
299 {
300 buf[i] = val & 0xff;
301 val >>= 8;
302 }
303 }
304
305 /* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
306 static void
307 put_be (unsigned char *buf, int length, DI val)
308 {
309 int i;
310
311 for (i = length-1; i >= 0; i--)
312 {
313 buf[i] = val & 0xff;
314 val >>= 8;
315 }
316 }
317
318
319 static int
320 check_regno (enum sim_rx_regnum regno)
321 {
322 return 0 <= regno && regno < sim_rx_num_regs;
323 }
324
325 static size_t
326 reg_size (enum sim_rx_regnum regno)
327 {
328 size_t size;
329
330 switch (regno)
331 {
332 case sim_rx_r0_regnum:
333 size = sizeof (regs.r[0]);
334 break;
335 case sim_rx_r1_regnum:
336 size = sizeof (regs.r[1]);
337 break;
338 case sim_rx_r2_regnum:
339 size = sizeof (regs.r[2]);
340 break;
341 case sim_rx_r3_regnum:
342 size = sizeof (regs.r[3]);
343 break;
344 case sim_rx_r4_regnum:
345 size = sizeof (regs.r[4]);
346 break;
347 case sim_rx_r5_regnum:
348 size = sizeof (regs.r[5]);
349 break;
350 case sim_rx_r6_regnum:
351 size = sizeof (regs.r[6]);
352 break;
353 case sim_rx_r7_regnum:
354 size = sizeof (regs.r[7]);
355 break;
356 case sim_rx_r8_regnum:
357 size = sizeof (regs.r[8]);
358 break;
359 case sim_rx_r9_regnum:
360 size = sizeof (regs.r[9]);
361 break;
362 case sim_rx_r10_regnum:
363 size = sizeof (regs.r[10]);
364 break;
365 case sim_rx_r11_regnum:
366 size = sizeof (regs.r[11]);
367 break;
368 case sim_rx_r12_regnum:
369 size = sizeof (regs.r[12]);
370 break;
371 case sim_rx_r13_regnum:
372 size = sizeof (regs.r[13]);
373 break;
374 case sim_rx_r14_regnum:
375 size = sizeof (regs.r[14]);
376 break;
377 case sim_rx_r15_regnum:
378 size = sizeof (regs.r[15]);
379 break;
380 case sim_rx_isp_regnum:
381 size = sizeof (regs.r_isp);
382 break;
383 case sim_rx_usp_regnum:
384 size = sizeof (regs.r_usp);
385 break;
386 case sim_rx_intb_regnum:
387 size = sizeof (regs.r_intb);
388 break;
389 case sim_rx_pc_regnum:
390 size = sizeof (regs.r_pc);
391 break;
392 case sim_rx_ps_regnum:
393 size = sizeof (regs.r_psw);
394 break;
395 case sim_rx_bpc_regnum:
396 size = sizeof (regs.r_bpc);
397 break;
398 case sim_rx_bpsw_regnum:
399 size = sizeof (regs.r_bpsw);
400 break;
401 case sim_rx_fintv_regnum:
402 size = sizeof (regs.r_fintv);
403 break;
404 case sim_rx_fpsw_regnum:
405 size = sizeof (regs.r_fpsw);
406 break;
407 case sim_rx_acc_regnum:
408 size = sizeof (regs.r_acc);
409 break;
410 default:
411 size = 0;
412 break;
413 }
414 return size;
415 }
416
417 int
418 sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
419 {
420 size_t size;
421 DI val;
422
423 check_desc (sd);
424
425 if (!check_regno (regno))
426 return 0;
427
428 size = reg_size (regno);
429
430 if (length != size)
431 return 0;
432
433 switch (regno)
434 {
435 case sim_rx_r0_regnum:
436 val = get_reg (0);
437 break;
438 case sim_rx_r1_regnum:
439 val = get_reg (1);
440 break;
441 case sim_rx_r2_regnum:
442 val = get_reg (2);
443 break;
444 case sim_rx_r3_regnum:
445 val = get_reg (3);
446 break;
447 case sim_rx_r4_regnum:
448 val = get_reg (4);
449 break;
450 case sim_rx_r5_regnum:
451 val = get_reg (5);
452 break;
453 case sim_rx_r6_regnum:
454 val = get_reg (6);
455 break;
456 case sim_rx_r7_regnum:
457 val = get_reg (7);
458 break;
459 case sim_rx_r8_regnum:
460 val = get_reg (8);
461 break;
462 case sim_rx_r9_regnum:
463 val = get_reg (9);
464 break;
465 case sim_rx_r10_regnum:
466 val = get_reg (10);
467 break;
468 case sim_rx_r11_regnum:
469 val = get_reg (11);
470 break;
471 case sim_rx_r12_regnum:
472 val = get_reg (12);
473 break;
474 case sim_rx_r13_regnum:
475 val = get_reg (13);
476 break;
477 case sim_rx_r14_regnum:
478 val = get_reg (14);
479 break;
480 case sim_rx_r15_regnum:
481 val = get_reg (15);
482 break;
483 case sim_rx_isp_regnum:
484 val = get_reg (isp);
485 break;
486 case sim_rx_usp_regnum:
487 val = get_reg (usp);
488 break;
489 case sim_rx_intb_regnum:
490 val = get_reg (intb);
491 break;
492 case sim_rx_pc_regnum:
493 val = get_reg (pc);
494 break;
495 case sim_rx_ps_regnum:
496 val = get_reg (psw);
497 break;
498 case sim_rx_bpc_regnum:
499 val = get_reg (bpc);
500 break;
501 case sim_rx_bpsw_regnum:
502 val = get_reg (bpsw);
503 break;
504 case sim_rx_fintv_regnum:
505 val = get_reg (fintv);
506 break;
507 case sim_rx_fpsw_regnum:
508 val = get_reg (fpsw);
509 break;
510 case sim_rx_acc_regnum:
511 val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
512 break;
513 default:
514 fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
515 regno);
516 return -1;
517 }
518
519 if (rx_big_endian)
520 put_be (buf, length, val);
521 else
522 put_le (buf, length, val);
523
524 return size;
525 }
526
527 int
528 sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
529 {
530 size_t size;
531 DI val;
532
533 check_desc (sd);
534
535 if (!check_regno (regno))
536 return 0;
537
538 size = reg_size (regno);
539
540 if (length != size)
541 return 0;
542
543 if (rx_big_endian)
544 val = get_be (buf, length);
545 else
546 val = get_le (buf, length);
547
548 switch (regno)
549 {
550 case sim_rx_r0_regnum:
551 put_reg (0, val);
552 break;
553 case sim_rx_r1_regnum:
554 put_reg (1, val);
555 break;
556 case sim_rx_r2_regnum:
557 put_reg (2, val);
558 break;
559 case sim_rx_r3_regnum:
560 put_reg (3, val);
561 break;
562 case sim_rx_r4_regnum:
563 put_reg (4, val);
564 break;
565 case sim_rx_r5_regnum:
566 put_reg (5, val);
567 break;
568 case sim_rx_r6_regnum:
569 put_reg (6, val);
570 break;
571 case sim_rx_r7_regnum:
572 put_reg (7, val);
573 break;
574 case sim_rx_r8_regnum:
575 put_reg (8, val);
576 break;
577 case sim_rx_r9_regnum:
578 put_reg (9, val);
579 break;
580 case sim_rx_r10_regnum:
581 put_reg (10, val);
582 break;
583 case sim_rx_r11_regnum:
584 put_reg (11, val);
585 break;
586 case sim_rx_r12_regnum:
587 put_reg (12, val);
588 break;
589 case sim_rx_r13_regnum:
590 put_reg (13, val);
591 break;
592 case sim_rx_r14_regnum:
593 put_reg (14, val);
594 break;
595 case sim_rx_r15_regnum:
596 put_reg (15, val);
597 break;
598 case sim_rx_isp_regnum:
599 put_reg (isp, val);
600 break;
601 case sim_rx_usp_regnum:
602 put_reg (usp, val);
603 break;
604 case sim_rx_intb_regnum:
605 put_reg (intb, val);
606 break;
607 case sim_rx_pc_regnum:
608 put_reg (pc, val);
609 break;
610 case sim_rx_ps_regnum:
611 put_reg (psw, val);
612 break;
613 case sim_rx_bpc_regnum:
614 put_reg (bpc, val);
615 break;
616 case sim_rx_bpsw_regnum:
617 put_reg (bpsw, val);
618 break;
619 case sim_rx_fintv_regnum:
620 put_reg (fintv, val);
621 break;
622 case sim_rx_fpsw_regnum:
623 put_reg (fpsw, val);
624 break;
625 default:
626 fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
627 regno);
628 return -1;
629 }
630
631 return size;
632 }
633
634 void
635 sim_info (SIM_DESC sd, int verbose)
636 {
637 check_desc (sd);
638
639 printf ("The rx minisim doesn't collect any statistics.\n");
640 }
641
642 static volatile int stop;
643 static enum sim_stop reason;
644 int siggnal;
645
646
647 /* Given a signal number used by the RX bsp (that is, newlib),
648 return a host signal number. (Oddly, the gdb/sim interface uses
649 host signal numbers...) */
650 int
651 rx_signal_to_host (int rx)
652 {
653 switch (rx)
654 {
655 case 4:
656 #ifdef SIGILL
657 return SIGILL;
658 #else
659 return SIGSEGV;
660 #endif
661
662 case 5:
663 return SIGTRAP;
664
665 case 10:
666 #ifdef SIGBUS
667 return SIGBUS;
668 #else
669 return SIGSEGV;
670 #endif
671
672 case 11:
673 return SIGSEGV;
674
675 case 24:
676 #ifdef SIGXCPU
677 return SIGXCPU;
678 #else
679 break;
680 #endif
681
682 case 2:
683 return SIGINT;
684
685 case 8:
686 #ifdef SIGFPE
687 return SIGFPE;
688 #else
689 break;
690 #endif
691
692 case 6:
693 return SIGABRT;
694 }
695
696 return 0;
697 }
698
699
700 /* Take a step return code RC and set up the variables consulted by
701 sim_stop_reason appropriately. */
702 void
703 handle_step (int rc)
704 {
705 if (execution_error_get_last_error () != SIM_ERR_NONE)
706 {
707 reason = sim_stopped;
708 siggnal = TARGET_SIGNAL_SEGV;
709 }
710 if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
711 {
712 reason = sim_stopped;
713 siggnal = TARGET_SIGNAL_TRAP;
714 }
715 else if (RX_STOPPED (rc))
716 {
717 reason = sim_stopped;
718 siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
719 }
720 else
721 {
722 assert (RX_EXITED (rc));
723 reason = sim_exited;
724 siggnal = RX_EXIT_STATUS (rc);
725 }
726 }
727
728
729 void
730 sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
731 {
732 check_desc (sd);
733
734 if (sig_to_deliver != 0)
735 {
736 fprintf (stderr,
737 "Warning: the rx minisim does not implement "
738 "signal delivery yet.\n" "Resuming with no signal.\n");
739 }
740
741 execution_error_clear_last_error ();
742
743 if (step)
744 handle_step (decode_opcode ());
745 else
746 {
747 /* We don't clear 'stop' here, because then we would miss
748 interrupts that arrived on the way here. Instead, we clear
749 the flag in sim_stop_reason, after GDB has disabled the
750 interrupt signal handler. */
751 for (;;)
752 {
753 if (stop)
754 {
755 stop = 0;
756 reason = sim_stopped;
757 siggnal = TARGET_SIGNAL_INT;
758 break;
759 }
760
761 int rc = decode_opcode ();
762
763 if (execution_error_get_last_error () != SIM_ERR_NONE)
764 {
765 reason = sim_stopped;
766 siggnal = TARGET_SIGNAL_SEGV;
767 break;
768 }
769
770 if (!RX_STEPPED (rc))
771 {
772 handle_step (rc);
773 break;
774 }
775 }
776 }
777 }
778
779 int
780 sim_stop (SIM_DESC sd)
781 {
782 stop = 1;
783
784 return 1;
785 }
786
787 void
788 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
789 {
790 check_desc (sd);
791
792 *reason_p = reason;
793 *sigrc_p = siggnal;
794 }
795
796 void
797 sim_do_command (SIM_DESC sd, char *cmd)
798 {
799 check_desc (sd);
800
801 char *p = cmd;
802
803 /* Skip leading whitespace. */
804 while (isspace (*p))
805 p++;
806
807 /* Find the extent of the command word. */
808 for (p = cmd; *p; p++)
809 if (isspace (*p))
810 break;
811
812 /* Null-terminate the command word, and record the start of any
813 further arguments. */
814 char *args;
815 if (*p)
816 {
817 *p = '\0';
818 args = p + 1;
819 while (isspace (*args))
820 args++;
821 }
822 else
823 args = p;
824
825 if (strcmp (cmd, "trace") == 0)
826 {
827 if (strcmp (args, "on") == 0)
828 trace = 1;
829 else if (strcmp (args, "off") == 0)
830 trace = 0;
831 else
832 printf ("The 'sim trace' command expects 'on' or 'off' "
833 "as an argument.\n");
834 }
835 else if (strcmp (cmd, "verbose") == 0)
836 {
837 if (strcmp (args, "on") == 0)
838 verbose = 1;
839 else if (strcmp (args, "noisy") == 0)
840 verbose = 2;
841 else if (strcmp (args, "off") == 0)
842 verbose = 0;
843 else
844 printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'"
845 " as an argument.\n");
846 }
847 else
848 printf ("The 'sim' command expects either 'trace' or 'verbose'"
849 " as a subcommand.\n");
850 }
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