sim/testsuite/sim/aarch64/bit.s

   1 # mach: aarch64
   2
   3 # Check the bitwise vector instructions: bif, bit, bsl, eor.
   4
   5 .include "testutils.inc"
   6
   7         .data
   8         .align 4
   9 inputa:
  10         .word 0x04030201
  11         .word 0x08070605
  12         .word 0x0c0b0a09
  13         .word 0x100f0e0d
  14 inputb:
  15         .word 0x40302010
  16         .word 0x80706050
  17         .word 0xc0b0a090
  18         .word 0x01f0e0d0
  19 mask:
  20         .word 0xFF00FF00
  21         .word 0x00FF00FF
  22         .word 0xF0F0F0F0
  23         .word 0x0F0F0F0F
  24
  25         start
  26         adrp x0, inputa
  27         ldr q0, [x0, #:lo12:inputa]
  28         adrp x0, inputb
  29         ldr q1, [x0, #:lo12:inputb]
  30         adrp x0, mask
  31         ldr q2, [x0, #:lo12:mask]
  32
  33         mov v3.8b, v0.8b
  34         bif v3.8b, v1.8b, v2.8b
  35         addv b4, v3.8b
  36         mov x1, v4.d[0]
  37         cmp x1, #50
  38         bne .Lfailure
  39
  40         mov v3.16b, v0.16b
  41         bif v3.16b, v1.16b, v2.16b
  42         addv b4, v3.16b
  43         mov x1, v4.d[0]
  44         cmp x1, #252
  45         bne .Lfailure
  46
  47         mov v3.8b, v0.8b
  48         bit v3.8b, v1.8b, v2.8b
  49         addv b4, v3.8b
  50         mov x1, v4.d[0]
  51         cmp x1, #50
  52         bne .Lfailure
  53
  54         mov v3.16b, v0.16b
  55         bit v3.16b, v1.16b, v2.16b
  56         addv b4, v3.16b
  57         mov x1, v4.d[0]
  58         cmp x1, #13
  59         bne .Lfailure
  60
  61         mov v3.8b, v2.8b
  62         bsl v3.8b, v0.8b, v1.8b
  63         addv b4, v3.8b
  64         mov x1, v4.d[0]
  65         cmp x1, #50
  66         bne .Lfailure
  67
  68         mov v3.16b, v2.16b
  69         bsl v3.16b, v0.16b, v1.16b
  70         addv b4, v3.16b
  71         mov x1, v4.d[0]
  72         cmp x1, #252
  73         bne .Lfailure
  74
  75         mov v3.8b, v0.8b
  76         eor v3.8b, v1.8b, v2.8b
  77         addv b4, v3.8b
  78         mov x1, v4.d[0]
  79         cmp x1, #252
  80         bne .Lfailure
  81
  82         mov v3.16b, v0.16b
  83         eor v3.16b, v1.16b, v2.16b
  84         addv b4, v3.16b
  85         mov x1, v4.d[0]
  86         cmp x1, #247
  87         bne .Lfailure
  88
  89         pass
  90 .Lfailure:
  91         fail