sim/testsuite/sim/aarch64/uzp.s

   1 # mach: aarch64
   2
   3 # Check the unzip instructions: uzp1, uzp2.
   4
   5 .include "testutils.inc"
   6
   7 input1:
   8         .word 0x04030201
   9         .word 0x08070605
  10         .word 0x0c0b0a09
  11         .word 0x100f0e0d
  12 input2:
  13         .word 0x14131211
  14         .word 0x18171615
  15         .word 0x1c1b1a19
  16         .word 0x201f1e1d
  17 zl8b:
  18         .word 0x07050301
  19         .word 0x17151311
  20 zu8b:
  21         .word 0x08060402
  22         .word 0x18161412
  23 zl16b:
  24         .word 0x07050301
  25         .word 0x0f0d0b09
  26         .word 0x17151311
  27         .word 0x1f1d1b19
  28 zu16b:
  29         .word 0x08060402
  30         .word 0x100e0c0a
  31         .word 0x18161412
  32         .word 0x201e1c1a
  33 zl4h:
  34         .word 0x06050201
  35         .word 0x16151211
  36 zu4h:
  37         .word 0x08070403
  38         .word 0x18171413
  39 zl8h:
  40         .word 0x06050201
  41         .word 0x0e0d0a09
  42         .word 0x16151211
  43         .word 0x1e1d1a19
  44 zu8h:
  45         .word 0x08070403
  46         .word 0x100f0c0b
  47         .word 0x18171413
  48         .word 0x201f1c1b
  49 zl2s:
  50         .word 0x04030201
  51         .word 0x14131211
  52 zu2s:
  53         .word 0x08070605
  54         .word 0x18171615
  55 zl4s:
  56         .word 0x04030201
  57         .word 0x0c0b0a09
  58         .word 0x14131211
  59         .word 0x1c1b1a19
  60 zu4s:
  61         .word 0x08070605
  62         .word 0x100f0e0d
  63         .word 0x18171615
  64         .word 0x201f1e1d
  65 zl2d:
  66         .word 0x04030201
  67         .word 0x08070605
  68         .word 0x14131211
  69         .word 0x18171615
  70 zu2d:
  71         .word 0x0c0b0a09
  72         .word 0x100f0e0d
  73         .word 0x1c1b1a19
  74         .word 0x201f1e1d
  75
  76         start
  77         adrp x0, input1
  78         ldr q0, [x0, #:lo12:input1]
  79         adrp x0, input2
  80         ldr q1, [x0, #:lo12:input2]
  81
  82         uzp1 v2.8b, v0.8b, v1.8b
  83         mov x1, v2.d[0]
  84         adrp x3, zl8b
  85         ldr x4, [x3, #:lo12:zl8b]
  86         cmp x1, x4
  87         bne .Lfailure
  88
  89         uzp2 v2.8b, v0.8b, v1.8b
  90         mov x1, v2.d[0]
  91         adrp x3, zu8b
  92         ldr x4, [x3, #:lo12:zu8b]
  93         cmp x1, x4
  94         bne .Lfailure
  95
  96         uzp1 v2.16b, v0.16b, v1.16b
  97         mov x1, v2.d[0]
  98         mov x2, v2.d[1]
  99         adrp x3, zl16b
 100         ldr x4, [x3, #:lo12:zl16b]
 101         cmp x1, x4
 102         bne .Lfailure
 103         ldr x5, [x3, #:lo12:zl16b+8]
 104         cmp x2, x5
 105         bne .Lfailure
 106
 107         uzp2 v2.16b, v0.16b, v1.16b
 108         mov x1, v2.d[0]
 109         mov x2, v2.d[1]
 110         adrp x3, zu16b
 111         ldr x4, [x3, #:lo12:zu16b]
 112         cmp x1, x4
 113         bne .Lfailure
 114         ldr x5, [x3, #:lo12:zu16b+8]
 115         cmp x2, x5
 116         bne .Lfailure
 117
 118         uzp1 v2.4h, v0.4h, v1.4h
 119         mov x1, v2.d[0]
 120         adrp x3, zl4h
 121         ldr x4, [x3, #:lo12:zl4h]
 122         cmp x1, x4
 123         bne .Lfailure
 124
 125         uzp2 v2.4h, v0.4h, v1.4h
 126         mov x1, v2.d[0]
 127         adrp x3, zu4h
 128         ldr x4, [x3, #:lo12:zu4h]
 129         cmp x1, x4
 130         bne .Lfailure
 131
 132         uzp1 v2.8h, v0.8h, v1.8h
 133         mov x1, v2.d[0]
 134         mov x2, v2.d[1]
 135         adrp x3, zl8h
 136         ldr x4, [x3, #:lo12:zl8h]
 137         cmp x1, x4
 138         bne .Lfailure
 139         ldr x5, [x3, #:lo12:zl8h+8]
 140         cmp x2, x5
 141         bne .Lfailure
 142
 143         uzp2 v2.8h, v0.8h, v1.8h
 144         mov x1, v2.d[0]
 145         mov x2, v2.d[1]
 146         adrp x3, zu8h
 147         ldr x4, [x3, #:lo12:zu8h]
 148         cmp x1, x4
 149         bne .Lfailure
 150         ldr x5, [x3, #:lo12:zu8h+8]
 151         cmp x2, x5
 152         bne .Lfailure
 153
 154         uzp1 v2.2s, v0.2s, v1.2s
 155         mov x1, v2.d[0]
 156         adrp x3, zl2s
 157         ldr x4, [x3, #:lo12:zl2s]
 158         cmp x1, x4
 159         bne .Lfailure
 160
 161         uzp2 v2.2s, v0.2s, v1.2s
 162         mov x1, v2.d[0]
 163         adrp x3, zu2s
 164         ldr x4, [x3, #:lo12:zu2s]
 165         cmp x1, x4
 166         bne .Lfailure
 167
 168         uzp1 v2.4s, v0.4s, v1.4s
 169         mov x1, v2.d[0]
 170         mov x2, v2.d[1]
 171         adrp x3, zl4s
 172         ldr x4, [x3, #:lo12:zl4s]
 173         cmp x1, x4
 174         bne .Lfailure
 175         ldr x5, [x3, #:lo12:zl4s+8]
 176         cmp x2, x5
 177         bne .Lfailure
 178
 179         uzp2 v2.4s, v0.4s, v1.4s
 180         mov x1, v2.d[0]
 181         mov x2, v2.d[1]
 182         adrp x3, zu4s
 183         ldr x4, [x3, #:lo12:zu4s]
 184         cmp x1, x4
 185         bne .Lfailure
 186         ldr x5, [x3, #:lo12:zu4s+8]
 187         cmp x2, x5
 188         bne .Lfailure
 189
 190         uzp1 v2.2d, v0.2d, v1.2d
 191         mov x1, v2.d[0]
 192         mov x2, v2.d[1]
 193         adrp x3, zl2d
 194         ldr x4, [x3, #:lo12:zl2d]
 195         cmp x1, x4
 196         bne .Lfailure
 197         ldr x5, [x3, #:lo12:zl2d+8]
 198         cmp x2, x5
 199         bne .Lfailure
 200
 201         uzp2 v2.2d, v0.2d, v1.2d
 202         mov x1, v2.d[0]
 203         mov x2, v2.d[1]
 204         adrp x3, zu2d
 205         ldr x4, [x3, #:lo12:zu2d]
 206         cmp x1, x4
 207         bne .Lfailure
 208         ldr x5, [x3, #:lo12:zu2d+8]
 209         cmp x2, x5
 210         bne .Lfailure
 211
 212         pass
 213 .Lfailure:
 214         fail