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[deliverable/linux.git] / sound / soc / codecs / rt5514.h
1 /*
2 * rt5514.h -- RT5514 ALSA SoC audio driver
3 *
4 * Copyright 2015 Realtek Microelectronics
5 * Author: Oder Chiou <oder_chiou@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #ifndef __RT5514_H__
13 #define __RT5514_H__
14
15 #include <linux/clk.h>
16
17 #define RT5514_DEVICE_ID 0x10ec5514
18
19 #define RT5514_RESET 0x2000
20 #define RT5514_PWR_ANA1 0x2004
21 #define RT5514_PWR_ANA2 0x2008
22 #define RT5514_I2S_CTRL1 0x2010
23 #define RT5514_I2S_CTRL2 0x2014
24 #define RT5514_VAD_CTRL6 0x2030
25 #define RT5514_EXT_VAD_CTRL 0x206c
26 #define RT5514_DIG_IO_CTRL 0x2070
27 #define RT5514_PAD_CTRL1 0x2080
28 #define RT5514_DMIC_DATA_CTRL 0x20a0
29 #define RT5514_DIG_SOURCE_CTRL 0x20a4
30 #define RT5514_SRC_CTRL 0x20ac
31 #define RT5514_DOWNFILTER2_CTRL1 0x20d0
32 #define RT5514_PLL_SOURCE_CTRL 0x2100
33 #define RT5514_CLK_CTRL1 0x2104
34 #define RT5514_CLK_CTRL2 0x2108
35 #define RT5514_PLL3_CALIB_CTRL1 0x2110
36 #define RT5514_PLL3_CALIB_CTRL5 0x2124
37 #define RT5514_DELAY_BUF_CTRL1 0x2140
38 #define RT5514_DELAY_BUF_CTRL3 0x2148
39 #define RT5514_DOWNFILTER0_CTRL1 0x2190
40 #define RT5514_DOWNFILTER0_CTRL2 0x2194
41 #define RT5514_DOWNFILTER0_CTRL3 0x2198
42 #define RT5514_DOWNFILTER1_CTRL1 0x21a0
43 #define RT5514_DOWNFILTER1_CTRL2 0x21a4
44 #define RT5514_DOWNFILTER1_CTRL3 0x21a8
45 #define RT5514_ANA_CTRL_LDO10 0x2200
46 #define RT5514_ANA_CTRL_LDO18_16 0x2204
47 #define RT5514_ANA_CTRL_ADC12 0x2210
48 #define RT5514_ANA_CTRL_ADC21 0x2214
49 #define RT5514_ANA_CTRL_ADC22 0x2218
50 #define RT5514_ANA_CTRL_ADC23 0x221c
51 #define RT5514_ANA_CTRL_MICBST 0x2220
52 #define RT5514_ANA_CTRL_ADCFED 0x2224
53 #define RT5514_ANA_CTRL_INBUF 0x2228
54 #define RT5514_ANA_CTRL_VREF 0x222c
55 #define RT5514_ANA_CTRL_PLL3 0x2240
56 #define RT5514_ANA_CTRL_PLL1_1 0x2260
57 #define RT5514_ANA_CTRL_PLL1_2 0x2264
58 #define RT5514_DMIC_LP_CTRL 0x2e00
59 #define RT5514_MISC_CTRL_DSP 0x2e04
60 #define RT5514_DSP_CTRL1 0x2f00
61 #define RT5514_DSP_CTRL3 0x2f08
62 #define RT5514_DSP_CTRL4 0x2f10
63 #define RT5514_VENDOR_ID1 0x2ff0
64 #define RT5514_VENDOR_ID2 0x2ff4
65
66 #define RT5514_DSP_MAPPING 0x18000000
67
68 /* RT5514_PWR_ANA1 (0x2004) */
69 #define RT5514_POW_LDO18_IN (0x1 << 5)
70 #define RT5514_POW_LDO18_IN_BIT 5
71 #define RT5514_POW_LDO18_ADC (0x1 << 4)
72 #define RT5514_POW_LDO18_ADC_BIT 4
73 #define RT5514_POW_LDO21 (0x1 << 3)
74 #define RT5514_POW_LDO21_BIT 3
75 #define RT5514_POW_BG_LDO18_IN (0x1 << 2)
76 #define RT5514_POW_BG_LDO18_IN_BIT 2
77 #define RT5514_POW_BG_LDO21 (0x1 << 1)
78 #define RT5514_POW_BG_LDO21_BIT 1
79
80 /* RT5514_PWR_ANA2 (0x2008) */
81 #define RT5514_POW_PLL1 (0x1 << 18)
82 #define RT5514_POW_PLL1_BIT 18
83 #define RT5514_POW_PLL1_LDO (0x1 << 16)
84 #define RT5514_POW_PLL1_LDO_BIT 16
85 #define RT5514_POW_BG_MBIAS (0x1 << 15)
86 #define RT5514_POW_BG_MBIAS_BIT 15
87 #define RT5514_POW_MBIAS (0x1 << 14)
88 #define RT5514_POW_MBIAS_BIT 14
89 #define RT5514_POW_VREF2 (0x1 << 13)
90 #define RT5514_POW_VREF2_BIT 13
91 #define RT5514_POW_VREF1 (0x1 << 12)
92 #define RT5514_POW_VREF1_BIT 12
93 #define RT5514_POWR_LDO16 (0x1 << 11)
94 #define RT5514_POWR_LDO16_BIT 11
95 #define RT5514_POWL_LDO16 (0x1 << 10)
96 #define RT5514_POWL_LDO16_BIT 10
97 #define RT5514_POW_ADC2 (0x1 << 9)
98 #define RT5514_POW_ADC2_BIT 9
99 #define RT5514_POW_INPUT_BUF (0x1 << 8)
100 #define RT5514_POW_INPUT_BUF_BIT 8
101 #define RT5514_POW_ADC1_R (0x1 << 7)
102 #define RT5514_POW_ADC1_R_BIT 7
103 #define RT5514_POW_ADC1_L (0x1 << 6)
104 #define RT5514_POW_ADC1_L_BIT 6
105 #define RT5514_POW2_BSTR (0x1 << 5)
106 #define RT5514_POW2_BSTR_BIT 5
107 #define RT5514_POW2_BSTL (0x1 << 4)
108 #define RT5514_POW2_BSTL_BIT 4
109 #define RT5514_POW_BSTR (0x1 << 3)
110 #define RT5514_POW_BSTR_BIT 3
111 #define RT5514_POW_BSTL (0x1 << 2)
112 #define RT5514_POW_BSTL_BIT 2
113 #define RT5514_POW_ADCFEDR (0x1 << 1)
114 #define RT5514_POW_ADCFEDR_BIT 1
115 #define RT5514_POW_ADCFEDL (0x1 << 0)
116 #define RT5514_POW_ADCFEDL_BIT 0
117
118 /* RT5514_I2S_CTRL1 (0x2010) */
119 #define RT5514_TDM_MODE (0x1 << 28)
120 #define RT5514_TDM_MODE_SFT 28
121 #define RT5514_I2S_LR_MASK (0x1 << 26)
122 #define RT5514_I2S_LR_SFT 26
123 #define RT5514_I2S_LR_NOR (0x0 << 26)
124 #define RT5514_I2S_LR_INV (0x1 << 26)
125 #define RT5514_I2S_BP_MASK (0x1 << 25)
126 #define RT5514_I2S_BP_SFT 25
127 #define RT5514_I2S_BP_NOR (0x0 << 25)
128 #define RT5514_I2S_BP_INV (0x1 << 25)
129 #define RT5514_I2S_DF_MASK (0x7 << 16)
130 #define RT5514_I2S_DF_SFT 16
131 #define RT5514_I2S_DF_I2S (0x0 << 16)
132 #define RT5514_I2S_DF_LEFT (0x1 << 16)
133 #define RT5514_I2S_DF_PCM_A (0x2 << 16)
134 #define RT5514_I2S_DF_PCM_B (0x3 << 16)
135 #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10)
136 #define RT5514_TDMSLOT_SEL_RX_SFT 10
137 #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10)
138 #define RT5514_CH_LEN_RX_MASK (0x3 << 8)
139 #define RT5514_CH_LEN_RX_SFT 8
140 #define RT5514_CH_LEN_RX_16 (0x0 << 8)
141 #define RT5514_CH_LEN_RX_20 (0x1 << 8)
142 #define RT5514_CH_LEN_RX_24 (0x2 << 8)
143 #define RT5514_CH_LEN_RX_32 (0x3 << 8)
144 #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6)
145 #define RT5514_TDMSLOT_SEL_TX_SFT 6
146 #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6)
147 #define RT5514_CH_LEN_TX_MASK (0x3 << 4)
148 #define RT5514_CH_LEN_TX_SFT 4
149 #define RT5514_CH_LEN_TX_16 (0x0 << 4)
150 #define RT5514_CH_LEN_TX_20 (0x1 << 4)
151 #define RT5514_CH_LEN_TX_24 (0x2 << 4)
152 #define RT5514_CH_LEN_TX_32 (0x3 << 4)
153 #define RT5514_I2S_DL_MASK (0x3 << 0)
154 #define RT5514_I2S_DL_SFT 0
155 #define RT5514_I2S_DL_16 (0x0 << 0)
156 #define RT5514_I2S_DL_20 (0x1 << 0)
157 #define RT5514_I2S_DL_24 (0x2 << 0)
158 #define RT5514_I2S_DL_8 (0x3 << 0)
159
160 /* RT5514_DIG_SOURCE_CTRL (0x20a4) */
161 #define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1)
162 #define RT5514_AD1_DMIC_INPUT_SEL_SFT 1
163 #define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0)
164 #define RT5514_AD0_DMIC_INPUT_SEL_SFT 0
165
166 /* RT5514_PLL_SOURCE_CTRL (0x2100) */
167 #define RT5514_PLL_1_SEL_MASK (0x7 << 12)
168 #define RT5514_PLL_1_SEL_SFT 12
169 #define RT5514_PLL_1_SEL_SCLK (0x3 << 12)
170 #define RT5514_PLL_1_SEL_MCLK (0x4 << 12)
171
172 /* RT5514_CLK_CTRL1 (0x2104) */
173 #define RT5514_CLK_AD_ANA1_EN (0x1 << 31)
174 #define RT5514_CLK_AD_ANA1_EN_BIT 31
175 #define RT5514_CLK_AD1_EN (0x1 << 24)
176 #define RT5514_CLK_AD1_EN_BIT 24
177 #define RT5514_CLK_AD0_EN (0x1 << 23)
178 #define RT5514_CLK_AD0_EN_BIT 23
179 #define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8)
180 #define RT5514_CLK_DMIC_OUT_SEL_SFT 8
181
182 /* RT5514_CLK_CTRL2 (0x2108) */
183 #define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8)
184 #define RT5514_CLK_SYS_DIV_OUT_SFT 8
185 #define RT5514_SEL_ADC_OSR_MASK (0x7 << 4)
186 #define RT5514_SEL_ADC_OSR_SFT 4
187 #define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0)
188 #define RT5514_CLK_SYS_PRE_SEL_SFT 0
189 #define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0)
190 #define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0)
191
192 /* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */
193 #define RT5514_AD_DMIC_MIX (0x1 << 11)
194 #define RT5514_AD_DMIC_MIX_BIT 11
195 #define RT5514_AD_AD_MIX (0x1 << 10)
196 #define RT5514_AD_AD_MIX_BIT 10
197 #define RT5514_AD_AD_MUTE (0x1 << 7)
198 #define RT5514_AD_AD_MUTE_BIT 7
199 #define RT5514_AD_GAIN_MASK (0x7f << 0)
200 #define RT5514_AD_GAIN_SFT 0
201
202 /* RT5514_ANA_CTRL_MICBST (0x2220) */
203 #define RT5514_SEL_BSTL_MASK (0xf << 4)
204 #define RT5514_SEL_BSTL_SFT 4
205 #define RT5514_SEL_BSTR_MASK (0xf << 0)
206 #define RT5514_SEL_BSTR_SFT 0
207
208 /* RT5514_ANA_CTRL_PLL1_1 (0x2260) */
209 #define RT5514_PLL_K_MAX 0x1f
210 #define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16)
211 #define RT5514_PLL_K_SFT 16
212 #define RT5514_PLL_N_MAX 0x1ff
213 #define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7)
214 #define RT5514_PLL_N_SFT 4
215 #define RT5514_PLL_M_MAX 0xf
216 #define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0)
217 #define RT5514_PLL_M_SFT 0
218
219 /* RT5514_ANA_CTRL_PLL1_2 (0x2264) */
220 #define RT5514_PLL_M_BP (0x1 << 2)
221 #define RT5514_PLL_M_BP_SFT 2
222 #define RT5514_PLL_K_BP (0x1 << 1)
223 #define RT5514_PLL_K_BP_SFT 1
224 #define RT5514_EN_LDO_PLL1 (0x1 << 0)
225 #define RT5514_EN_LDO_PLL1_BIT 0
226
227 #define RT5514_PLL_INP_MAX 40000000
228 #define RT5514_PLL_INP_MIN 256000
229
230 #define RT5514_FIRMWARE1 "rt5514_dsp_fw1.bin"
231 #define RT5514_FIRMWARE2 "rt5514_dsp_fw2.bin"
232
233 /* System Clock Source */
234 enum {
235 RT5514_SCLK_S_MCLK,
236 RT5514_SCLK_S_PLL1,
237 };
238
239 /* PLL1 Source */
240 enum {
241 RT5514_PLL1_S_MCLK,
242 RT5514_PLL1_S_BCLK,
243 };
244
245 struct rt5514_priv {
246 struct snd_soc_codec *codec;
247 struct regmap *i2c_regmap, *regmap;
248 struct clk *mclk;
249 int sysclk;
250 int sysclk_src;
251 int lrck;
252 int bclk;
253 int pll_src;
254 int pll_in;
255 int pll_out;
256 int dsp_enabled;
257 };
258
259 #endif /* __RT5514_H__ */
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