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ASoC: arizona: Make logging of FLL calculations clearer
[deliverable/linux.git] / sound / soc / codecs / wm_adsp.c
1 /*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
34
35 #include "wm_adsp.h"
36
37 #define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39 #define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41 #define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43 #define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45 #define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
47
48 #define ADSP1_CONTROL_1 0x00
49 #define ADSP1_CONTROL_2 0x02
50 #define ADSP1_CONTROL_3 0x03
51 #define ADSP1_CONTROL_4 0x04
52 #define ADSP1_CONTROL_5 0x06
53 #define ADSP1_CONTROL_6 0x07
54 #define ADSP1_CONTROL_7 0x08
55 #define ADSP1_CONTROL_8 0x09
56 #define ADSP1_CONTROL_9 0x0A
57 #define ADSP1_CONTROL_10 0x0B
58 #define ADSP1_CONTROL_11 0x0C
59 #define ADSP1_CONTROL_12 0x0D
60 #define ADSP1_CONTROL_13 0x0F
61 #define ADSP1_CONTROL_14 0x10
62 #define ADSP1_CONTROL_15 0x11
63 #define ADSP1_CONTROL_16 0x12
64 #define ADSP1_CONTROL_17 0x13
65 #define ADSP1_CONTROL_18 0x14
66 #define ADSP1_CONTROL_19 0x16
67 #define ADSP1_CONTROL_20 0x17
68 #define ADSP1_CONTROL_21 0x18
69 #define ADSP1_CONTROL_22 0x1A
70 #define ADSP1_CONTROL_23 0x1B
71 #define ADSP1_CONTROL_24 0x1C
72 #define ADSP1_CONTROL_25 0x1E
73 #define ADSP1_CONTROL_26 0x20
74 #define ADSP1_CONTROL_27 0x21
75 #define ADSP1_CONTROL_28 0x22
76 #define ADSP1_CONTROL_29 0x23
77 #define ADSP1_CONTROL_30 0x24
78 #define ADSP1_CONTROL_31 0x26
79
80 /*
81 * ADSP1 Control 19
82 */
83 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
86
87
88 /*
89 * ADSP1 Control 30
90 */
91 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103 #define ADSP1_START 0x0001 /* DSP1_START */
104 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
105 #define ADSP1_START_SHIFT 0 /* DSP1_START */
106 #define ADSP1_START_WIDTH 1 /* DSP1_START */
107
108 /*
109 * ADSP1 Control 31
110 */
111 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
114
115 #define ADSP2_CONTROL 0x0
116 #define ADSP2_CLOCKING 0x1
117 #define ADSP2_STATUS1 0x4
118 #define ADSP2_WDMA_CONFIG_1 0x30
119 #define ADSP2_WDMA_CONFIG_2 0x31
120 #define ADSP2_RDMA_CONFIG_1 0x34
121
122 #define ADSP2_SCRATCH0 0x40
123 #define ADSP2_SCRATCH1 0x41
124 #define ADSP2_SCRATCH2 0x42
125 #define ADSP2_SCRATCH3 0x43
126
127 /*
128 * ADSP2 Control
129 */
130
131 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143 #define ADSP2_START 0x0001 /* DSP1_START */
144 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
145 #define ADSP2_START_SHIFT 0 /* DSP1_START */
146 #define ADSP2_START_WIDTH 1 /* DSP1_START */
147
148 /*
149 * ADSP2 clocking
150 */
151 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
154
155 /*
156 * ADSP2 Status 1
157 */
158 #define ADSP2_RAM_RDY 0x0001
159 #define ADSP2_RAM_RDY_MASK 0x0001
160 #define ADSP2_RAM_RDY_SHIFT 0
161 #define ADSP2_RAM_RDY_WIDTH 1
162
163 struct wm_adsp_buf {
164 struct list_head list;
165 void *buf;
166 };
167
168 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
169 struct list_head *list)
170 {
171 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
172
173 if (buf == NULL)
174 return NULL;
175
176 buf->buf = vmalloc(len);
177 if (!buf->buf) {
178 vfree(buf);
179 return NULL;
180 }
181 memcpy(buf->buf, src, len);
182
183 if (list)
184 list_add_tail(&buf->list, list);
185
186 return buf;
187 }
188
189 static void wm_adsp_buf_free(struct list_head *list)
190 {
191 while (!list_empty(list)) {
192 struct wm_adsp_buf *buf = list_first_entry(list,
193 struct wm_adsp_buf,
194 list);
195 list_del(&buf->list);
196 vfree(buf->buf);
197 kfree(buf);
198 }
199 }
200
201 #define WM_ADSP_FW_MBC_VSS 0
202 #define WM_ADSP_FW_HIFI 1
203 #define WM_ADSP_FW_TX 2
204 #define WM_ADSP_FW_TX_SPK 3
205 #define WM_ADSP_FW_RX 4
206 #define WM_ADSP_FW_RX_ANC 5
207 #define WM_ADSP_FW_CTRL 6
208 #define WM_ADSP_FW_ASR 7
209 #define WM_ADSP_FW_TRACE 8
210 #define WM_ADSP_FW_SPK_PROT 9
211 #define WM_ADSP_FW_MISC 10
212
213 #define WM_ADSP_NUM_FW 11
214
215 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
216 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
217 [WM_ADSP_FW_HIFI] = "MasterHiFi",
218 [WM_ADSP_FW_TX] = "Tx",
219 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
220 [WM_ADSP_FW_RX] = "Rx",
221 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
222 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
223 [WM_ADSP_FW_ASR] = "ASR Assist",
224 [WM_ADSP_FW_TRACE] = "Dbg Trace",
225 [WM_ADSP_FW_SPK_PROT] = "Protection",
226 [WM_ADSP_FW_MISC] = "Misc",
227 };
228
229 struct wm_adsp_system_config_xm_hdr {
230 __be32 sys_enable;
231 __be32 fw_id;
232 __be32 fw_rev;
233 __be32 boot_status;
234 __be32 watchdog;
235 __be32 dma_buffer_size;
236 __be32 rdma[6];
237 __be32 wdma[8];
238 __be32 build_job_name[3];
239 __be32 build_job_number;
240 };
241
242 struct wm_adsp_alg_xm_struct {
243 __be32 magic;
244 __be32 smoothing;
245 __be32 threshold;
246 __be32 host_buf_ptr;
247 __be32 start_seq;
248 __be32 high_water_mark;
249 __be32 low_water_mark;
250 __be64 smoothed_power;
251 };
252
253 struct wm_adsp_buffer {
254 __be32 X_buf_base; /* XM base addr of first X area */
255 __be32 X_buf_size; /* Size of 1st X area in words */
256 __be32 X_buf_base2; /* XM base addr of 2nd X area */
257 __be32 X_buf_brk; /* Total X size in words */
258 __be32 Y_buf_base; /* YM base addr of Y area */
259 __be32 wrap; /* Total size X and Y in words */
260 __be32 high_water_mark; /* Point at which IRQ is asserted */
261 __be32 irq_count; /* bits 1-31 count IRQ assertions */
262 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
263 __be32 next_write_index; /* word index of next write */
264 __be32 next_read_index; /* word index of next read */
265 __be32 error; /* error if any */
266 __be32 oldest_block_index; /* word index of oldest surviving */
267 __be32 requested_rewind; /* how many blocks rewind was done */
268 __be32 reserved_space; /* internal */
269 __be32 min_free; /* min free space since stream start */
270 __be32 blocks_written[2]; /* total blocks written (64 bit) */
271 __be32 words_written[2]; /* total words written (64 bit) */
272 };
273
274 struct wm_adsp_compr_buf {
275 struct wm_adsp *dsp;
276
277 struct wm_adsp_buffer_region *regions;
278 u32 host_buf_ptr;
279
280 u32 error;
281 u32 irq_count;
282 int read_index;
283 int avail;
284 };
285
286 struct wm_adsp_compr {
287 struct wm_adsp *dsp;
288 struct wm_adsp_compr_buf *buf;
289
290 struct snd_compr_stream *stream;
291 struct snd_compressed_buffer size;
292
293 u32 *raw_buf;
294 unsigned int copied_total;
295 };
296
297 #define WM_ADSP_DATA_WORD_SIZE 3
298
299 #define WM_ADSP_MIN_FRAGMENTS 1
300 #define WM_ADSP_MAX_FRAGMENTS 256
301 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
302 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
303
304 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
305
306 #define HOST_BUFFER_FIELD(field) \
307 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
308
309 #define ALG_XM_FIELD(field) \
310 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
311
312 static int wm_adsp_buffer_init(struct wm_adsp *dsp);
313 static int wm_adsp_buffer_free(struct wm_adsp *dsp);
314
315 struct wm_adsp_buffer_region {
316 unsigned int offset;
317 unsigned int cumulative_size;
318 unsigned int mem_type;
319 unsigned int base_addr;
320 };
321
322 struct wm_adsp_buffer_region_def {
323 unsigned int mem_type;
324 unsigned int base_offset;
325 unsigned int size_offset;
326 };
327
328 static const struct wm_adsp_buffer_region_def default_regions[] = {
329 {
330 .mem_type = WMFW_ADSP2_XM,
331 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
332 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
333 },
334 {
335 .mem_type = WMFW_ADSP2_XM,
336 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
337 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
338 },
339 {
340 .mem_type = WMFW_ADSP2_YM,
341 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
342 .size_offset = HOST_BUFFER_FIELD(wrap),
343 },
344 };
345
346 struct wm_adsp_fw_caps {
347 u32 id;
348 struct snd_codec_desc desc;
349 int num_regions;
350 const struct wm_adsp_buffer_region_def *region_defs;
351 };
352
353 static const struct wm_adsp_fw_caps ctrl_caps[] = {
354 {
355 .id = SND_AUDIOCODEC_BESPOKE,
356 .desc = {
357 .max_ch = 1,
358 .sample_rates = { 16000 },
359 .num_sample_rates = 1,
360 .formats = SNDRV_PCM_FMTBIT_S16_LE,
361 },
362 .num_regions = ARRAY_SIZE(default_regions),
363 .region_defs = default_regions,
364 },
365 };
366
367 static const struct wm_adsp_fw_caps trace_caps[] = {
368 {
369 .id = SND_AUDIOCODEC_BESPOKE,
370 .desc = {
371 .max_ch = 8,
372 .sample_rates = {
373 4000, 8000, 11025, 12000, 16000, 22050,
374 24000, 32000, 44100, 48000, 64000, 88200,
375 96000, 176400, 192000
376 },
377 .num_sample_rates = 15,
378 .formats = SNDRV_PCM_FMTBIT_S16_LE,
379 },
380 .num_regions = ARRAY_SIZE(default_regions),
381 .region_defs = default_regions,
382 },
383 };
384
385 static const struct {
386 const char *file;
387 int compr_direction;
388 int num_caps;
389 const struct wm_adsp_fw_caps *caps;
390 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
391 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
392 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
393 [WM_ADSP_FW_TX] = { .file = "tx" },
394 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
395 [WM_ADSP_FW_RX] = { .file = "rx" },
396 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
397 [WM_ADSP_FW_CTRL] = {
398 .file = "ctrl",
399 .compr_direction = SND_COMPRESS_CAPTURE,
400 .num_caps = ARRAY_SIZE(ctrl_caps),
401 .caps = ctrl_caps,
402 },
403 [WM_ADSP_FW_ASR] = { .file = "asr" },
404 [WM_ADSP_FW_TRACE] = {
405 .file = "trace",
406 .compr_direction = SND_COMPRESS_CAPTURE,
407 .num_caps = ARRAY_SIZE(trace_caps),
408 .caps = trace_caps,
409 },
410 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
411 [WM_ADSP_FW_MISC] = { .file = "misc" },
412 };
413
414 struct wm_coeff_ctl_ops {
415 int (*xget)(struct snd_kcontrol *kcontrol,
416 struct snd_ctl_elem_value *ucontrol);
417 int (*xput)(struct snd_kcontrol *kcontrol,
418 struct snd_ctl_elem_value *ucontrol);
419 int (*xinfo)(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_info *uinfo);
421 };
422
423 struct wm_coeff_ctl {
424 const char *name;
425 const char *fw_name;
426 struct wm_adsp_alg_region alg_region;
427 struct wm_coeff_ctl_ops ops;
428 struct wm_adsp *dsp;
429 unsigned int enabled:1;
430 struct list_head list;
431 void *cache;
432 unsigned int offset;
433 size_t len;
434 unsigned int set:1;
435 struct snd_kcontrol *kcontrol;
436 unsigned int flags;
437 };
438
439 #ifdef CONFIG_DEBUG_FS
440 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
441 {
442 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
443
444 kfree(dsp->wmfw_file_name);
445 dsp->wmfw_file_name = tmp;
446 }
447
448 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
449 {
450 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
451
452 kfree(dsp->bin_file_name);
453 dsp->bin_file_name = tmp;
454 }
455
456 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
457 {
458 kfree(dsp->wmfw_file_name);
459 kfree(dsp->bin_file_name);
460 dsp->wmfw_file_name = NULL;
461 dsp->bin_file_name = NULL;
462 }
463
464 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
465 char __user *user_buf,
466 size_t count, loff_t *ppos)
467 {
468 struct wm_adsp *dsp = file->private_data;
469 ssize_t ret;
470
471 mutex_lock(&dsp->pwr_lock);
472
473 if (!dsp->wmfw_file_name || !dsp->running)
474 ret = 0;
475 else
476 ret = simple_read_from_buffer(user_buf, count, ppos,
477 dsp->wmfw_file_name,
478 strlen(dsp->wmfw_file_name));
479
480 mutex_unlock(&dsp->pwr_lock);
481 return ret;
482 }
483
484 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
485 char __user *user_buf,
486 size_t count, loff_t *ppos)
487 {
488 struct wm_adsp *dsp = file->private_data;
489 ssize_t ret;
490
491 mutex_lock(&dsp->pwr_lock);
492
493 if (!dsp->bin_file_name || !dsp->running)
494 ret = 0;
495 else
496 ret = simple_read_from_buffer(user_buf, count, ppos,
497 dsp->bin_file_name,
498 strlen(dsp->bin_file_name));
499
500 mutex_unlock(&dsp->pwr_lock);
501 return ret;
502 }
503
504 static const struct {
505 const char *name;
506 const struct file_operations fops;
507 } wm_adsp_debugfs_fops[] = {
508 {
509 .name = "wmfw_file_name",
510 .fops = {
511 .open = simple_open,
512 .read = wm_adsp_debugfs_wmfw_read,
513 },
514 },
515 {
516 .name = "bin_file_name",
517 .fops = {
518 .open = simple_open,
519 .read = wm_adsp_debugfs_bin_read,
520 },
521 },
522 };
523
524 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
525 struct snd_soc_codec *codec)
526 {
527 struct dentry *root = NULL;
528 char *root_name;
529 int i;
530
531 if (!codec->component.debugfs_root) {
532 adsp_err(dsp, "No codec debugfs root\n");
533 goto err;
534 }
535
536 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
537 if (!root_name)
538 goto err;
539
540 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
541 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
542 kfree(root_name);
543
544 if (!root)
545 goto err;
546
547 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
548 goto err;
549
550 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
551 goto err;
552
553 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
554 &dsp->fw_id_version))
555 goto err;
556
557 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
558 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
559 S_IRUGO, root, dsp,
560 &wm_adsp_debugfs_fops[i].fops))
561 goto err;
562 }
563
564 dsp->debugfs_root = root;
565 return;
566
567 err:
568 debugfs_remove_recursive(root);
569 adsp_err(dsp, "Failed to create debugfs\n");
570 }
571
572 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
573 {
574 wm_adsp_debugfs_clear(dsp);
575 debugfs_remove_recursive(dsp->debugfs_root);
576 }
577 #else
578 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
579 struct snd_soc_codec *codec)
580 {
581 }
582
583 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
584 {
585 }
586
587 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
588 const char *s)
589 {
590 }
591
592 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
593 const char *s)
594 {
595 }
596
597 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
598 {
599 }
600 #endif
601
602 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
603 struct snd_ctl_elem_value *ucontrol)
604 {
605 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
606 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
607 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
608
609 ucontrol->value.integer.value[0] = dsp[e->shift_l].fw;
610
611 return 0;
612 }
613
614 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616 {
617 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
618 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
619 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
620 int ret = 0;
621
622 if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw)
623 return 0;
624
625 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
626 return -EINVAL;
627
628 mutex_lock(&dsp[e->shift_l].pwr_lock);
629
630 if (dsp[e->shift_l].running || dsp[e->shift_l].compr)
631 ret = -EBUSY;
632 else
633 dsp[e->shift_l].fw = ucontrol->value.integer.value[0];
634
635 mutex_unlock(&dsp[e->shift_l].pwr_lock);
636
637 return ret;
638 }
639
640 static const struct soc_enum wm_adsp_fw_enum[] = {
641 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
642 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
643 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
644 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
645 };
646
647 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
648 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
649 wm_adsp_fw_get, wm_adsp_fw_put),
650 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
651 wm_adsp_fw_get, wm_adsp_fw_put),
652 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
653 wm_adsp_fw_get, wm_adsp_fw_put),
654 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
655 wm_adsp_fw_get, wm_adsp_fw_put),
656 };
657 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
658
659 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
660 int type)
661 {
662 int i;
663
664 for (i = 0; i < dsp->num_mems; i++)
665 if (dsp->mem[i].type == type)
666 return &dsp->mem[i];
667
668 return NULL;
669 }
670
671 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
672 unsigned int offset)
673 {
674 if (WARN_ON(!mem))
675 return offset;
676 switch (mem->type) {
677 case WMFW_ADSP1_PM:
678 return mem->base + (offset * 3);
679 case WMFW_ADSP1_DM:
680 return mem->base + (offset * 2);
681 case WMFW_ADSP2_XM:
682 return mem->base + (offset * 2);
683 case WMFW_ADSP2_YM:
684 return mem->base + (offset * 2);
685 case WMFW_ADSP1_ZM:
686 return mem->base + (offset * 2);
687 default:
688 WARN(1, "Unknown memory region type");
689 return offset;
690 }
691 }
692
693 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
694 {
695 u16 scratch[4];
696 int ret;
697
698 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
699 scratch, sizeof(scratch));
700 if (ret) {
701 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
702 return;
703 }
704
705 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
706 be16_to_cpu(scratch[0]),
707 be16_to_cpu(scratch[1]),
708 be16_to_cpu(scratch[2]),
709 be16_to_cpu(scratch[3]));
710 }
711
712 static int wm_coeff_info(struct snd_kcontrol *kctl,
713 struct snd_ctl_elem_info *uinfo)
714 {
715 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
716
717 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
718 uinfo->count = ctl->len;
719 return 0;
720 }
721
722 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
723 const void *buf, size_t len)
724 {
725 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
726 const struct wm_adsp_region *mem;
727 struct wm_adsp *dsp = ctl->dsp;
728 void *scratch;
729 int ret;
730 unsigned int reg;
731
732 mem = wm_adsp_find_region(dsp, alg_region->type);
733 if (!mem) {
734 adsp_err(dsp, "No base for region %x\n",
735 alg_region->type);
736 return -EINVAL;
737 }
738
739 reg = ctl->alg_region.base + ctl->offset;
740 reg = wm_adsp_region_to_reg(mem, reg);
741
742 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
743 if (!scratch)
744 return -ENOMEM;
745
746 ret = regmap_raw_write(dsp->regmap, reg, scratch,
747 ctl->len);
748 if (ret) {
749 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
750 ctl->len, reg, ret);
751 kfree(scratch);
752 return ret;
753 }
754 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
755
756 kfree(scratch);
757
758 return 0;
759 }
760
761 static int wm_coeff_put(struct snd_kcontrol *kctl,
762 struct snd_ctl_elem_value *ucontrol)
763 {
764 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
765 char *p = ucontrol->value.bytes.data;
766 int ret = 0;
767
768 mutex_lock(&ctl->dsp->pwr_lock);
769
770 memcpy(ctl->cache, p, ctl->len);
771
772 ctl->set = 1;
773 if (ctl->enabled)
774 ret = wm_coeff_write_control(ctl, p, ctl->len);
775
776 mutex_unlock(&ctl->dsp->pwr_lock);
777
778 return ret;
779 }
780
781 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
782 void *buf, size_t len)
783 {
784 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
785 const struct wm_adsp_region *mem;
786 struct wm_adsp *dsp = ctl->dsp;
787 void *scratch;
788 int ret;
789 unsigned int reg;
790
791 mem = wm_adsp_find_region(dsp, alg_region->type);
792 if (!mem) {
793 adsp_err(dsp, "No base for region %x\n",
794 alg_region->type);
795 return -EINVAL;
796 }
797
798 reg = ctl->alg_region.base + ctl->offset;
799 reg = wm_adsp_region_to_reg(mem, reg);
800
801 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
802 if (!scratch)
803 return -ENOMEM;
804
805 ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len);
806 if (ret) {
807 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
808 ctl->len, reg, ret);
809 kfree(scratch);
810 return ret;
811 }
812 adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg);
813
814 memcpy(buf, scratch, ctl->len);
815 kfree(scratch);
816
817 return 0;
818 }
819
820 static int wm_coeff_get(struct snd_kcontrol *kctl,
821 struct snd_ctl_elem_value *ucontrol)
822 {
823 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kctl->private_value;
824 char *p = ucontrol->value.bytes.data;
825 int ret = 0;
826
827 mutex_lock(&ctl->dsp->pwr_lock);
828
829 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
830 if (ctl->enabled)
831 ret = wm_coeff_read_control(ctl, p, ctl->len);
832 else
833 ret = -EPERM;
834 } else {
835 if (!ctl->flags && ctl->enabled)
836 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
837
838 memcpy(p, ctl->cache, ctl->len);
839 }
840
841 mutex_unlock(&ctl->dsp->pwr_lock);
842
843 return ret;
844 }
845
846 struct wmfw_ctl_work {
847 struct wm_adsp *dsp;
848 struct wm_coeff_ctl *ctl;
849 struct work_struct work;
850 };
851
852 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
853 {
854 struct snd_kcontrol_new *kcontrol;
855 int ret;
856
857 if (!ctl || !ctl->name)
858 return -EINVAL;
859
860 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
861 if (!kcontrol)
862 return -ENOMEM;
863 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
864
865 kcontrol->name = ctl->name;
866 kcontrol->info = wm_coeff_info;
867 kcontrol->get = wm_coeff_get;
868 kcontrol->put = wm_coeff_put;
869 kcontrol->private_value = (unsigned long)ctl;
870
871 if (ctl->flags) {
872 if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)
873 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
874 if (ctl->flags & WMFW_CTL_FLAG_READABLE)
875 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ;
876 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
877 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
878 }
879
880 ret = snd_soc_add_card_controls(dsp->card,
881 kcontrol, 1);
882 if (ret < 0)
883 goto err_kcontrol;
884
885 kfree(kcontrol);
886
887 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card,
888 ctl->name);
889
890 return 0;
891
892 err_kcontrol:
893 kfree(kcontrol);
894 return ret;
895 }
896
897 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
898 {
899 struct wm_coeff_ctl *ctl;
900 int ret;
901
902 list_for_each_entry(ctl, &dsp->ctl_list, list) {
903 if (!ctl->enabled || ctl->set)
904 continue;
905 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
906 continue;
907
908 ret = wm_coeff_read_control(ctl,
909 ctl->cache,
910 ctl->len);
911 if (ret < 0)
912 return ret;
913 }
914
915 return 0;
916 }
917
918 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
919 {
920 struct wm_coeff_ctl *ctl;
921 int ret;
922
923 list_for_each_entry(ctl, &dsp->ctl_list, list) {
924 if (!ctl->enabled)
925 continue;
926 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
927 ret = wm_coeff_write_control(ctl,
928 ctl->cache,
929 ctl->len);
930 if (ret < 0)
931 return ret;
932 }
933 }
934
935 return 0;
936 }
937
938 static void wm_adsp_ctl_work(struct work_struct *work)
939 {
940 struct wmfw_ctl_work *ctl_work = container_of(work,
941 struct wmfw_ctl_work,
942 work);
943
944 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
945 kfree(ctl_work);
946 }
947
948 static int wm_adsp_create_control(struct wm_adsp *dsp,
949 const struct wm_adsp_alg_region *alg_region,
950 unsigned int offset, unsigned int len,
951 const char *subname, unsigned int subname_len,
952 unsigned int flags)
953 {
954 struct wm_coeff_ctl *ctl;
955 struct wmfw_ctl_work *ctl_work;
956 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
957 char *region_name;
958 int ret;
959
960 if (flags & WMFW_CTL_FLAG_SYS)
961 return 0;
962
963 switch (alg_region->type) {
964 case WMFW_ADSP1_PM:
965 region_name = "PM";
966 break;
967 case WMFW_ADSP1_DM:
968 region_name = "DM";
969 break;
970 case WMFW_ADSP2_XM:
971 region_name = "XM";
972 break;
973 case WMFW_ADSP2_YM:
974 region_name = "YM";
975 break;
976 case WMFW_ADSP1_ZM:
977 region_name = "ZM";
978 break;
979 default:
980 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
981 return -EINVAL;
982 }
983
984 switch (dsp->fw_ver) {
985 case 0:
986 case 1:
987 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
988 dsp->num, region_name, alg_region->alg);
989 break;
990 default:
991 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
992 "DSP%d%c %.12s %x", dsp->num, *region_name,
993 wm_adsp_fw_text[dsp->fw], alg_region->alg);
994
995 /* Truncate the subname from the start if it is too long */
996 if (subname) {
997 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
998 int skip = 0;
999
1000 if (subname_len > avail)
1001 skip = subname_len - avail;
1002
1003 snprintf(name + ret,
1004 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1005 subname_len - skip, subname + skip);
1006 }
1007 break;
1008 }
1009
1010 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1011 if (!strcmp(ctl->name, name)) {
1012 if (!ctl->enabled)
1013 ctl->enabled = 1;
1014 return 0;
1015 }
1016 }
1017
1018 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1019 if (!ctl)
1020 return -ENOMEM;
1021 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1022 ctl->alg_region = *alg_region;
1023 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1024 if (!ctl->name) {
1025 ret = -ENOMEM;
1026 goto err_ctl;
1027 }
1028 ctl->enabled = 1;
1029 ctl->set = 0;
1030 ctl->ops.xget = wm_coeff_get;
1031 ctl->ops.xput = wm_coeff_put;
1032 ctl->dsp = dsp;
1033
1034 ctl->flags = flags;
1035 ctl->offset = offset;
1036 if (len > 512) {
1037 adsp_warn(dsp, "Truncating control %s from %d\n",
1038 ctl->name, len);
1039 len = 512;
1040 }
1041 ctl->len = len;
1042 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1043 if (!ctl->cache) {
1044 ret = -ENOMEM;
1045 goto err_ctl_name;
1046 }
1047
1048 list_add(&ctl->list, &dsp->ctl_list);
1049
1050 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1051 if (!ctl_work) {
1052 ret = -ENOMEM;
1053 goto err_ctl_cache;
1054 }
1055
1056 ctl_work->dsp = dsp;
1057 ctl_work->ctl = ctl;
1058 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1059 schedule_work(&ctl_work->work);
1060
1061 return 0;
1062
1063 err_ctl_cache:
1064 kfree(ctl->cache);
1065 err_ctl_name:
1066 kfree(ctl->name);
1067 err_ctl:
1068 kfree(ctl);
1069
1070 return ret;
1071 }
1072
1073 struct wm_coeff_parsed_alg {
1074 int id;
1075 const u8 *name;
1076 int name_len;
1077 int ncoeff;
1078 };
1079
1080 struct wm_coeff_parsed_coeff {
1081 int offset;
1082 int mem_type;
1083 const u8 *name;
1084 int name_len;
1085 int ctl_type;
1086 int flags;
1087 int len;
1088 };
1089
1090 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1091 {
1092 int length;
1093
1094 switch (bytes) {
1095 case 1:
1096 length = **pos;
1097 break;
1098 case 2:
1099 length = le16_to_cpu(*((__le16 *)*pos));
1100 break;
1101 default:
1102 return 0;
1103 }
1104
1105 if (str)
1106 *str = *pos + bytes;
1107
1108 *pos += ((length + bytes) + 3) & ~0x03;
1109
1110 return length;
1111 }
1112
1113 static int wm_coeff_parse_int(int bytes, const u8 **pos)
1114 {
1115 int val = 0;
1116
1117 switch (bytes) {
1118 case 2:
1119 val = le16_to_cpu(*((__le16 *)*pos));
1120 break;
1121 case 4:
1122 val = le32_to_cpu(*((__le32 *)*pos));
1123 break;
1124 default:
1125 break;
1126 }
1127
1128 *pos += bytes;
1129
1130 return val;
1131 }
1132
1133 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1134 struct wm_coeff_parsed_alg *blk)
1135 {
1136 const struct wmfw_adsp_alg_data *raw;
1137
1138 switch (dsp->fw_ver) {
1139 case 0:
1140 case 1:
1141 raw = (const struct wmfw_adsp_alg_data *)*data;
1142 *data = raw->data;
1143
1144 blk->id = le32_to_cpu(raw->id);
1145 blk->name = raw->name;
1146 blk->name_len = strlen(raw->name);
1147 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1148 break;
1149 default:
1150 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1151 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1152 &blk->name);
1153 wm_coeff_parse_string(sizeof(u16), data, NULL);
1154 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1155 break;
1156 }
1157
1158 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1159 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1160 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1161 }
1162
1163 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1164 struct wm_coeff_parsed_coeff *blk)
1165 {
1166 const struct wmfw_adsp_coeff_data *raw;
1167 const u8 *tmp;
1168 int length;
1169
1170 switch (dsp->fw_ver) {
1171 case 0:
1172 case 1:
1173 raw = (const struct wmfw_adsp_coeff_data *)*data;
1174 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1175
1176 blk->offset = le16_to_cpu(raw->hdr.offset);
1177 blk->mem_type = le16_to_cpu(raw->hdr.type);
1178 blk->name = raw->name;
1179 blk->name_len = strlen(raw->name);
1180 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1181 blk->flags = le16_to_cpu(raw->flags);
1182 blk->len = le32_to_cpu(raw->len);
1183 break;
1184 default:
1185 tmp = *data;
1186 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1187 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1188 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1189 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1190 &blk->name);
1191 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1192 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1193 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1194 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1195 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1196
1197 *data = *data + sizeof(raw->hdr) + length;
1198 break;
1199 }
1200
1201 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1202 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1203 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1204 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1205 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1206 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1207 }
1208
1209 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1210 const struct wmfw_region *region)
1211 {
1212 struct wm_adsp_alg_region alg_region = {};
1213 struct wm_coeff_parsed_alg alg_blk;
1214 struct wm_coeff_parsed_coeff coeff_blk;
1215 const u8 *data = region->data;
1216 int i, ret;
1217
1218 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1219 for (i = 0; i < alg_blk.ncoeff; i++) {
1220 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1221
1222 switch (coeff_blk.ctl_type) {
1223 case SNDRV_CTL_ELEM_TYPE_BYTES:
1224 break;
1225 default:
1226 adsp_err(dsp, "Unknown control type: %d\n",
1227 coeff_blk.ctl_type);
1228 return -EINVAL;
1229 }
1230
1231 alg_region.type = coeff_blk.mem_type;
1232 alg_region.alg = alg_blk.id;
1233
1234 ret = wm_adsp_create_control(dsp, &alg_region,
1235 coeff_blk.offset,
1236 coeff_blk.len,
1237 coeff_blk.name,
1238 coeff_blk.name_len,
1239 coeff_blk.flags);
1240 if (ret < 0)
1241 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1242 coeff_blk.name_len, coeff_blk.name, ret);
1243 }
1244
1245 return 0;
1246 }
1247
1248 static int wm_adsp_load(struct wm_adsp *dsp)
1249 {
1250 LIST_HEAD(buf_list);
1251 const struct firmware *firmware;
1252 struct regmap *regmap = dsp->regmap;
1253 unsigned int pos = 0;
1254 const struct wmfw_header *header;
1255 const struct wmfw_adsp1_sizes *adsp1_sizes;
1256 const struct wmfw_adsp2_sizes *adsp2_sizes;
1257 const struct wmfw_footer *footer;
1258 const struct wmfw_region *region;
1259 const struct wm_adsp_region *mem;
1260 const char *region_name;
1261 char *file, *text;
1262 struct wm_adsp_buf *buf;
1263 unsigned int reg;
1264 int regions = 0;
1265 int ret, offset, type, sizes;
1266
1267 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1268 if (file == NULL)
1269 return -ENOMEM;
1270
1271 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1272 wm_adsp_fw[dsp->fw].file);
1273 file[PAGE_SIZE - 1] = '\0';
1274
1275 ret = request_firmware(&firmware, file, dsp->dev);
1276 if (ret != 0) {
1277 adsp_err(dsp, "Failed to request '%s'\n", file);
1278 goto out;
1279 }
1280 ret = -EINVAL;
1281
1282 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1283 if (pos >= firmware->size) {
1284 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1285 file, firmware->size);
1286 goto out_fw;
1287 }
1288
1289 header = (void *)&firmware->data[0];
1290
1291 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1292 adsp_err(dsp, "%s: invalid magic\n", file);
1293 goto out_fw;
1294 }
1295
1296 switch (header->ver) {
1297 case 0:
1298 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1299 file, header->ver);
1300 break;
1301 case 1:
1302 case 2:
1303 break;
1304 default:
1305 adsp_err(dsp, "%s: unknown file format %d\n",
1306 file, header->ver);
1307 goto out_fw;
1308 }
1309
1310 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1311 dsp->fw_ver = header->ver;
1312
1313 if (header->core != dsp->type) {
1314 adsp_err(dsp, "%s: invalid core %d != %d\n",
1315 file, header->core, dsp->type);
1316 goto out_fw;
1317 }
1318
1319 switch (dsp->type) {
1320 case WMFW_ADSP1:
1321 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1322 adsp1_sizes = (void *)&(header[1]);
1323 footer = (void *)&(adsp1_sizes[1]);
1324 sizes = sizeof(*adsp1_sizes);
1325
1326 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1327 file, le32_to_cpu(adsp1_sizes->dm),
1328 le32_to_cpu(adsp1_sizes->pm),
1329 le32_to_cpu(adsp1_sizes->zm));
1330 break;
1331
1332 case WMFW_ADSP2:
1333 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1334 adsp2_sizes = (void *)&(header[1]);
1335 footer = (void *)&(adsp2_sizes[1]);
1336 sizes = sizeof(*adsp2_sizes);
1337
1338 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1339 file, le32_to_cpu(adsp2_sizes->xm),
1340 le32_to_cpu(adsp2_sizes->ym),
1341 le32_to_cpu(adsp2_sizes->pm),
1342 le32_to_cpu(adsp2_sizes->zm));
1343 break;
1344
1345 default:
1346 WARN(1, "Unknown DSP type");
1347 goto out_fw;
1348 }
1349
1350 if (le32_to_cpu(header->len) != sizeof(*header) +
1351 sizes + sizeof(*footer)) {
1352 adsp_err(dsp, "%s: unexpected header length %d\n",
1353 file, le32_to_cpu(header->len));
1354 goto out_fw;
1355 }
1356
1357 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1358 le64_to_cpu(footer->timestamp));
1359
1360 while (pos < firmware->size &&
1361 pos - firmware->size > sizeof(*region)) {
1362 region = (void *)&(firmware->data[pos]);
1363 region_name = "Unknown";
1364 reg = 0;
1365 text = NULL;
1366 offset = le32_to_cpu(region->offset) & 0xffffff;
1367 type = be32_to_cpu(region->type) & 0xff;
1368 mem = wm_adsp_find_region(dsp, type);
1369
1370 switch (type) {
1371 case WMFW_NAME_TEXT:
1372 region_name = "Firmware name";
1373 text = kzalloc(le32_to_cpu(region->len) + 1,
1374 GFP_KERNEL);
1375 break;
1376 case WMFW_ALGORITHM_DATA:
1377 region_name = "Algorithm";
1378 ret = wm_adsp_parse_coeff(dsp, region);
1379 if (ret != 0)
1380 goto out_fw;
1381 break;
1382 case WMFW_INFO_TEXT:
1383 region_name = "Information";
1384 text = kzalloc(le32_to_cpu(region->len) + 1,
1385 GFP_KERNEL);
1386 break;
1387 case WMFW_ABSOLUTE:
1388 region_name = "Absolute";
1389 reg = offset;
1390 break;
1391 case WMFW_ADSP1_PM:
1392 region_name = "PM";
1393 reg = wm_adsp_region_to_reg(mem, offset);
1394 break;
1395 case WMFW_ADSP1_DM:
1396 region_name = "DM";
1397 reg = wm_adsp_region_to_reg(mem, offset);
1398 break;
1399 case WMFW_ADSP2_XM:
1400 region_name = "XM";
1401 reg = wm_adsp_region_to_reg(mem, offset);
1402 break;
1403 case WMFW_ADSP2_YM:
1404 region_name = "YM";
1405 reg = wm_adsp_region_to_reg(mem, offset);
1406 break;
1407 case WMFW_ADSP1_ZM:
1408 region_name = "ZM";
1409 reg = wm_adsp_region_to_reg(mem, offset);
1410 break;
1411 default:
1412 adsp_warn(dsp,
1413 "%s.%d: Unknown region type %x at %d(%x)\n",
1414 file, regions, type, pos, pos);
1415 break;
1416 }
1417
1418 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1419 regions, le32_to_cpu(region->len), offset,
1420 region_name);
1421
1422 if (text) {
1423 memcpy(text, region->data, le32_to_cpu(region->len));
1424 adsp_info(dsp, "%s: %s\n", file, text);
1425 kfree(text);
1426 }
1427
1428 if (reg) {
1429 buf = wm_adsp_buf_alloc(region->data,
1430 le32_to_cpu(region->len),
1431 &buf_list);
1432 if (!buf) {
1433 adsp_err(dsp, "Out of memory\n");
1434 ret = -ENOMEM;
1435 goto out_fw;
1436 }
1437
1438 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1439 le32_to_cpu(region->len));
1440 if (ret != 0) {
1441 adsp_err(dsp,
1442 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1443 file, regions,
1444 le32_to_cpu(region->len), offset,
1445 region_name, ret);
1446 goto out_fw;
1447 }
1448 }
1449
1450 pos += le32_to_cpu(region->len) + sizeof(*region);
1451 regions++;
1452 }
1453
1454 ret = regmap_async_complete(regmap);
1455 if (ret != 0) {
1456 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1457 goto out_fw;
1458 }
1459
1460 if (pos > firmware->size)
1461 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1462 file, regions, pos - firmware->size);
1463
1464 wm_adsp_debugfs_save_wmfwname(dsp, file);
1465
1466 out_fw:
1467 regmap_async_complete(regmap);
1468 wm_adsp_buf_free(&buf_list);
1469 release_firmware(firmware);
1470 out:
1471 kfree(file);
1472
1473 return ret;
1474 }
1475
1476 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1477 const struct wm_adsp_alg_region *alg_region)
1478 {
1479 struct wm_coeff_ctl *ctl;
1480
1481 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1482 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1483 alg_region->alg == ctl->alg_region.alg &&
1484 alg_region->type == ctl->alg_region.type) {
1485 ctl->alg_region.base = alg_region->base;
1486 }
1487 }
1488 }
1489
1490 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1491 unsigned int pos, unsigned int len)
1492 {
1493 void *alg;
1494 int ret;
1495 __be32 val;
1496
1497 if (n_algs == 0) {
1498 adsp_err(dsp, "No algorithms\n");
1499 return ERR_PTR(-EINVAL);
1500 }
1501
1502 if (n_algs > 1024) {
1503 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1504 return ERR_PTR(-EINVAL);
1505 }
1506
1507 /* Read the terminator first to validate the length */
1508 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1509 if (ret != 0) {
1510 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1511 ret);
1512 return ERR_PTR(ret);
1513 }
1514
1515 if (be32_to_cpu(val) != 0xbedead)
1516 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1517 pos + len, be32_to_cpu(val));
1518
1519 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1520 if (!alg)
1521 return ERR_PTR(-ENOMEM);
1522
1523 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1524 if (ret != 0) {
1525 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1526 ret);
1527 kfree(alg);
1528 return ERR_PTR(ret);
1529 }
1530
1531 return alg;
1532 }
1533
1534 static struct wm_adsp_alg_region *
1535 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1536 {
1537 struct wm_adsp_alg_region *alg_region;
1538
1539 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1540 if (id == alg_region->alg && type == alg_region->type)
1541 return alg_region;
1542 }
1543
1544 return NULL;
1545 }
1546
1547 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1548 int type, __be32 id,
1549 __be32 base)
1550 {
1551 struct wm_adsp_alg_region *alg_region;
1552
1553 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1554 if (!alg_region)
1555 return ERR_PTR(-ENOMEM);
1556
1557 alg_region->type = type;
1558 alg_region->alg = be32_to_cpu(id);
1559 alg_region->base = be32_to_cpu(base);
1560
1561 list_add_tail(&alg_region->list, &dsp->alg_regions);
1562
1563 if (dsp->fw_ver > 0)
1564 wm_adsp_ctl_fixup_base(dsp, alg_region);
1565
1566 return alg_region;
1567 }
1568
1569 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1570 {
1571 struct wmfw_adsp1_id_hdr adsp1_id;
1572 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1573 struct wm_adsp_alg_region *alg_region;
1574 const struct wm_adsp_region *mem;
1575 unsigned int pos, len;
1576 size_t n_algs;
1577 int i, ret;
1578
1579 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1580 if (WARN_ON(!mem))
1581 return -EINVAL;
1582
1583 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1584 sizeof(adsp1_id));
1585 if (ret != 0) {
1586 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1587 ret);
1588 return ret;
1589 }
1590
1591 n_algs = be32_to_cpu(adsp1_id.n_algs);
1592 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1593 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1594 dsp->fw_id,
1595 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1596 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1597 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1598 n_algs);
1599
1600 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1601 adsp1_id.fw.id, adsp1_id.zm);
1602 if (IS_ERR(alg_region))
1603 return PTR_ERR(alg_region);
1604
1605 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1606 adsp1_id.fw.id, adsp1_id.dm);
1607 if (IS_ERR(alg_region))
1608 return PTR_ERR(alg_region);
1609
1610 pos = sizeof(adsp1_id) / 2;
1611 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1612
1613 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1614 if (IS_ERR(adsp1_alg))
1615 return PTR_ERR(adsp1_alg);
1616
1617 for (i = 0; i < n_algs; i++) {
1618 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1619 i, be32_to_cpu(adsp1_alg[i].alg.id),
1620 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1621 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1622 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1623 be32_to_cpu(adsp1_alg[i].dm),
1624 be32_to_cpu(adsp1_alg[i].zm));
1625
1626 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1627 adsp1_alg[i].alg.id,
1628 adsp1_alg[i].dm);
1629 if (IS_ERR(alg_region)) {
1630 ret = PTR_ERR(alg_region);
1631 goto out;
1632 }
1633 if (dsp->fw_ver == 0) {
1634 if (i + 1 < n_algs) {
1635 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1636 len -= be32_to_cpu(adsp1_alg[i].dm);
1637 len *= 4;
1638 wm_adsp_create_control(dsp, alg_region, 0,
1639 len, NULL, 0, 0);
1640 } else {
1641 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1642 be32_to_cpu(adsp1_alg[i].alg.id));
1643 }
1644 }
1645
1646 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1647 adsp1_alg[i].alg.id,
1648 adsp1_alg[i].zm);
1649 if (IS_ERR(alg_region)) {
1650 ret = PTR_ERR(alg_region);
1651 goto out;
1652 }
1653 if (dsp->fw_ver == 0) {
1654 if (i + 1 < n_algs) {
1655 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1656 len -= be32_to_cpu(adsp1_alg[i].zm);
1657 len *= 4;
1658 wm_adsp_create_control(dsp, alg_region, 0,
1659 len, NULL, 0, 0);
1660 } else {
1661 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1662 be32_to_cpu(adsp1_alg[i].alg.id));
1663 }
1664 }
1665 }
1666
1667 out:
1668 kfree(adsp1_alg);
1669 return ret;
1670 }
1671
1672 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1673 {
1674 struct wmfw_adsp2_id_hdr adsp2_id;
1675 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1676 struct wm_adsp_alg_region *alg_region;
1677 const struct wm_adsp_region *mem;
1678 unsigned int pos, len;
1679 size_t n_algs;
1680 int i, ret;
1681
1682 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1683 if (WARN_ON(!mem))
1684 return -EINVAL;
1685
1686 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1687 sizeof(adsp2_id));
1688 if (ret != 0) {
1689 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1690 ret);
1691 return ret;
1692 }
1693
1694 n_algs = be32_to_cpu(adsp2_id.n_algs);
1695 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1696 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1697 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1698 dsp->fw_id,
1699 (dsp->fw_id_version & 0xff0000) >> 16,
1700 (dsp->fw_id_version & 0xff00) >> 8,
1701 dsp->fw_id_version & 0xff,
1702 n_algs);
1703
1704 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1705 adsp2_id.fw.id, adsp2_id.xm);
1706 if (IS_ERR(alg_region))
1707 return PTR_ERR(alg_region);
1708
1709 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1710 adsp2_id.fw.id, adsp2_id.ym);
1711 if (IS_ERR(alg_region))
1712 return PTR_ERR(alg_region);
1713
1714 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1715 adsp2_id.fw.id, adsp2_id.zm);
1716 if (IS_ERR(alg_region))
1717 return PTR_ERR(alg_region);
1718
1719 pos = sizeof(adsp2_id) / 2;
1720 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1721
1722 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1723 if (IS_ERR(adsp2_alg))
1724 return PTR_ERR(adsp2_alg);
1725
1726 for (i = 0; i < n_algs; i++) {
1727 adsp_info(dsp,
1728 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1729 i, be32_to_cpu(adsp2_alg[i].alg.id),
1730 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1731 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1732 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1733 be32_to_cpu(adsp2_alg[i].xm),
1734 be32_to_cpu(adsp2_alg[i].ym),
1735 be32_to_cpu(adsp2_alg[i].zm));
1736
1737 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1738 adsp2_alg[i].alg.id,
1739 adsp2_alg[i].xm);
1740 if (IS_ERR(alg_region)) {
1741 ret = PTR_ERR(alg_region);
1742 goto out;
1743 }
1744 if (dsp->fw_ver == 0) {
1745 if (i + 1 < n_algs) {
1746 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1747 len -= be32_to_cpu(adsp2_alg[i].xm);
1748 len *= 4;
1749 wm_adsp_create_control(dsp, alg_region, 0,
1750 len, NULL, 0, 0);
1751 } else {
1752 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1753 be32_to_cpu(adsp2_alg[i].alg.id));
1754 }
1755 }
1756
1757 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1758 adsp2_alg[i].alg.id,
1759 adsp2_alg[i].ym);
1760 if (IS_ERR(alg_region)) {
1761 ret = PTR_ERR(alg_region);
1762 goto out;
1763 }
1764 if (dsp->fw_ver == 0) {
1765 if (i + 1 < n_algs) {
1766 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1767 len -= be32_to_cpu(adsp2_alg[i].ym);
1768 len *= 4;
1769 wm_adsp_create_control(dsp, alg_region, 0,
1770 len, NULL, 0, 0);
1771 } else {
1772 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1773 be32_to_cpu(adsp2_alg[i].alg.id));
1774 }
1775 }
1776
1777 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1778 adsp2_alg[i].alg.id,
1779 adsp2_alg[i].zm);
1780 if (IS_ERR(alg_region)) {
1781 ret = PTR_ERR(alg_region);
1782 goto out;
1783 }
1784 if (dsp->fw_ver == 0) {
1785 if (i + 1 < n_algs) {
1786 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1787 len -= be32_to_cpu(adsp2_alg[i].zm);
1788 len *= 4;
1789 wm_adsp_create_control(dsp, alg_region, 0,
1790 len, NULL, 0, 0);
1791 } else {
1792 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1793 be32_to_cpu(adsp2_alg[i].alg.id));
1794 }
1795 }
1796 }
1797
1798 out:
1799 kfree(adsp2_alg);
1800 return ret;
1801 }
1802
1803 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1804 {
1805 LIST_HEAD(buf_list);
1806 struct regmap *regmap = dsp->regmap;
1807 struct wmfw_coeff_hdr *hdr;
1808 struct wmfw_coeff_item *blk;
1809 const struct firmware *firmware;
1810 const struct wm_adsp_region *mem;
1811 struct wm_adsp_alg_region *alg_region;
1812 const char *region_name;
1813 int ret, pos, blocks, type, offset, reg;
1814 char *file;
1815 struct wm_adsp_buf *buf;
1816
1817 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1818 if (file == NULL)
1819 return -ENOMEM;
1820
1821 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1822 wm_adsp_fw[dsp->fw].file);
1823 file[PAGE_SIZE - 1] = '\0';
1824
1825 ret = request_firmware(&firmware, file, dsp->dev);
1826 if (ret != 0) {
1827 adsp_warn(dsp, "Failed to request '%s'\n", file);
1828 ret = 0;
1829 goto out;
1830 }
1831 ret = -EINVAL;
1832
1833 if (sizeof(*hdr) >= firmware->size) {
1834 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1835 file, firmware->size);
1836 goto out_fw;
1837 }
1838
1839 hdr = (void *)&firmware->data[0];
1840 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1841 adsp_err(dsp, "%s: invalid magic\n", file);
1842 goto out_fw;
1843 }
1844
1845 switch (be32_to_cpu(hdr->rev) & 0xff) {
1846 case 1:
1847 break;
1848 default:
1849 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1850 file, be32_to_cpu(hdr->rev) & 0xff);
1851 ret = -EINVAL;
1852 goto out_fw;
1853 }
1854
1855 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1856 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1857 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1858 le32_to_cpu(hdr->ver) & 0xff);
1859
1860 pos = le32_to_cpu(hdr->len);
1861
1862 blocks = 0;
1863 while (pos < firmware->size &&
1864 pos - firmware->size > sizeof(*blk)) {
1865 blk = (void *)(&firmware->data[pos]);
1866
1867 type = le16_to_cpu(blk->type);
1868 offset = le16_to_cpu(blk->offset);
1869
1870 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1871 file, blocks, le32_to_cpu(blk->id),
1872 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1873 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1874 le32_to_cpu(blk->ver) & 0xff);
1875 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1876 file, blocks, le32_to_cpu(blk->len), offset, type);
1877
1878 reg = 0;
1879 region_name = "Unknown";
1880 switch (type) {
1881 case (WMFW_NAME_TEXT << 8):
1882 case (WMFW_INFO_TEXT << 8):
1883 break;
1884 case (WMFW_ABSOLUTE << 8):
1885 /*
1886 * Old files may use this for global
1887 * coefficients.
1888 */
1889 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1890 offset == 0) {
1891 region_name = "global coefficients";
1892 mem = wm_adsp_find_region(dsp, type);
1893 if (!mem) {
1894 adsp_err(dsp, "No ZM\n");
1895 break;
1896 }
1897 reg = wm_adsp_region_to_reg(mem, 0);
1898
1899 } else {
1900 region_name = "register";
1901 reg = offset;
1902 }
1903 break;
1904
1905 case WMFW_ADSP1_DM:
1906 case WMFW_ADSP1_ZM:
1907 case WMFW_ADSP2_XM:
1908 case WMFW_ADSP2_YM:
1909 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1910 file, blocks, le32_to_cpu(blk->len),
1911 type, le32_to_cpu(blk->id));
1912
1913 mem = wm_adsp_find_region(dsp, type);
1914 if (!mem) {
1915 adsp_err(dsp, "No base for region %x\n", type);
1916 break;
1917 }
1918
1919 alg_region = wm_adsp_find_alg_region(dsp, type,
1920 le32_to_cpu(blk->id));
1921 if (alg_region) {
1922 reg = alg_region->base;
1923 reg = wm_adsp_region_to_reg(mem, reg);
1924 reg += offset;
1925 } else {
1926 adsp_err(dsp, "No %x for algorithm %x\n",
1927 type, le32_to_cpu(blk->id));
1928 }
1929 break;
1930
1931 default:
1932 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1933 file, blocks, type, pos);
1934 break;
1935 }
1936
1937 if (reg) {
1938 buf = wm_adsp_buf_alloc(blk->data,
1939 le32_to_cpu(blk->len),
1940 &buf_list);
1941 if (!buf) {
1942 adsp_err(dsp, "Out of memory\n");
1943 ret = -ENOMEM;
1944 goto out_fw;
1945 }
1946
1947 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1948 file, blocks, le32_to_cpu(blk->len),
1949 reg);
1950 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1951 le32_to_cpu(blk->len));
1952 if (ret != 0) {
1953 adsp_err(dsp,
1954 "%s.%d: Failed to write to %x in %s: %d\n",
1955 file, blocks, reg, region_name, ret);
1956 }
1957 }
1958
1959 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
1960 blocks++;
1961 }
1962
1963 ret = regmap_async_complete(regmap);
1964 if (ret != 0)
1965 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1966
1967 if (pos > firmware->size)
1968 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1969 file, blocks, pos - firmware->size);
1970
1971 wm_adsp_debugfs_save_binname(dsp, file);
1972
1973 out_fw:
1974 regmap_async_complete(regmap);
1975 release_firmware(firmware);
1976 wm_adsp_buf_free(&buf_list);
1977 out:
1978 kfree(file);
1979 return ret;
1980 }
1981
1982 int wm_adsp1_init(struct wm_adsp *dsp)
1983 {
1984 INIT_LIST_HEAD(&dsp->alg_regions);
1985
1986 mutex_init(&dsp->pwr_lock);
1987
1988 return 0;
1989 }
1990 EXPORT_SYMBOL_GPL(wm_adsp1_init);
1991
1992 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1993 struct snd_kcontrol *kcontrol,
1994 int event)
1995 {
1996 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1997 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1998 struct wm_adsp *dsp = &dsps[w->shift];
1999 struct wm_adsp_alg_region *alg_region;
2000 struct wm_coeff_ctl *ctl;
2001 int ret;
2002 unsigned int val;
2003
2004 dsp->card = codec->component.card;
2005
2006 mutex_lock(&dsp->pwr_lock);
2007
2008 switch (event) {
2009 case SND_SOC_DAPM_POST_PMU:
2010 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2011 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2012
2013 /*
2014 * For simplicity set the DSP clock rate to be the
2015 * SYSCLK rate rather than making it configurable.
2016 */
2017 if (dsp->sysclk_reg) {
2018 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2019 if (ret != 0) {
2020 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2021 ret);
2022 goto err_mutex;
2023 }
2024
2025 val = (val & dsp->sysclk_mask)
2026 >> dsp->sysclk_shift;
2027
2028 ret = regmap_update_bits(dsp->regmap,
2029 dsp->base + ADSP1_CONTROL_31,
2030 ADSP1_CLK_SEL_MASK, val);
2031 if (ret != 0) {
2032 adsp_err(dsp, "Failed to set clock rate: %d\n",
2033 ret);
2034 goto err_mutex;
2035 }
2036 }
2037
2038 ret = wm_adsp_load(dsp);
2039 if (ret != 0)
2040 goto err_ena;
2041
2042 ret = wm_adsp1_setup_algs(dsp);
2043 if (ret != 0)
2044 goto err_ena;
2045
2046 ret = wm_adsp_load_coeff(dsp);
2047 if (ret != 0)
2048 goto err_ena;
2049
2050 /* Initialize caches for enabled and unset controls */
2051 ret = wm_coeff_init_control_caches(dsp);
2052 if (ret != 0)
2053 goto err_ena;
2054
2055 /* Sync set controls */
2056 ret = wm_coeff_sync_controls(dsp);
2057 if (ret != 0)
2058 goto err_ena;
2059
2060 /* Start the core running */
2061 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2062 ADSP1_CORE_ENA | ADSP1_START,
2063 ADSP1_CORE_ENA | ADSP1_START);
2064 break;
2065
2066 case SND_SOC_DAPM_PRE_PMD:
2067 /* Halt the core */
2068 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2069 ADSP1_CORE_ENA | ADSP1_START, 0);
2070
2071 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2072 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2073
2074 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2075 ADSP1_SYS_ENA, 0);
2076
2077 list_for_each_entry(ctl, &dsp->ctl_list, list)
2078 ctl->enabled = 0;
2079
2080 while (!list_empty(&dsp->alg_regions)) {
2081 alg_region = list_first_entry(&dsp->alg_regions,
2082 struct wm_adsp_alg_region,
2083 list);
2084 list_del(&alg_region->list);
2085 kfree(alg_region);
2086 }
2087 break;
2088
2089 default:
2090 break;
2091 }
2092
2093 mutex_unlock(&dsp->pwr_lock);
2094
2095 return 0;
2096
2097 err_ena:
2098 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2099 ADSP1_SYS_ENA, 0);
2100 err_mutex:
2101 mutex_unlock(&dsp->pwr_lock);
2102
2103 return ret;
2104 }
2105 EXPORT_SYMBOL_GPL(wm_adsp1_event);
2106
2107 static int wm_adsp2_ena(struct wm_adsp *dsp)
2108 {
2109 unsigned int val;
2110 int ret, count;
2111
2112 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2113 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2114 if (ret != 0)
2115 return ret;
2116
2117 /* Wait for the RAM to start, should be near instantaneous */
2118 for (count = 0; count < 10; ++count) {
2119 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
2120 &val);
2121 if (ret != 0)
2122 return ret;
2123
2124 if (val & ADSP2_RAM_RDY)
2125 break;
2126
2127 msleep(1);
2128 }
2129
2130 if (!(val & ADSP2_RAM_RDY)) {
2131 adsp_err(dsp, "Failed to start DSP RAM\n");
2132 return -EBUSY;
2133 }
2134
2135 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2136
2137 return 0;
2138 }
2139
2140 static void wm_adsp2_boot_work(struct work_struct *work)
2141 {
2142 struct wm_adsp *dsp = container_of(work,
2143 struct wm_adsp,
2144 boot_work);
2145 int ret;
2146
2147 mutex_lock(&dsp->pwr_lock);
2148
2149 ret = wm_adsp2_ena(dsp);
2150 if (ret != 0)
2151 goto err_mutex;
2152
2153 ret = wm_adsp_load(dsp);
2154 if (ret != 0)
2155 goto err_ena;
2156
2157 ret = wm_adsp2_setup_algs(dsp);
2158 if (ret != 0)
2159 goto err_ena;
2160
2161 ret = wm_adsp_load_coeff(dsp);
2162 if (ret != 0)
2163 goto err_ena;
2164
2165 /* Initialize caches for enabled and unset controls */
2166 ret = wm_coeff_init_control_caches(dsp);
2167 if (ret != 0)
2168 goto err_ena;
2169
2170 /* Sync set controls */
2171 ret = wm_coeff_sync_controls(dsp);
2172 if (ret != 0)
2173 goto err_ena;
2174
2175 dsp->running = true;
2176
2177 mutex_unlock(&dsp->pwr_lock);
2178
2179 return;
2180
2181 err_ena:
2182 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2183 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2184 err_mutex:
2185 mutex_unlock(&dsp->pwr_lock);
2186 }
2187
2188 static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2189 {
2190 int ret;
2191
2192 ret = regmap_update_bits_async(dsp->regmap,
2193 dsp->base + ADSP2_CLOCKING,
2194 ADSP2_CLK_SEL_MASK,
2195 freq << ADSP2_CLK_SEL_SHIFT);
2196 if (ret != 0)
2197 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2198 }
2199
2200 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2201 struct snd_kcontrol *kcontrol, int event,
2202 unsigned int freq)
2203 {
2204 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2205 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2206 struct wm_adsp *dsp = &dsps[w->shift];
2207
2208 dsp->card = codec->component.card;
2209
2210 switch (event) {
2211 case SND_SOC_DAPM_PRE_PMU:
2212 wm_adsp2_set_dspclk(dsp, freq);
2213 queue_work(system_unbound_wq, &dsp->boot_work);
2214 break;
2215 default:
2216 break;
2217 }
2218
2219 return 0;
2220 }
2221 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2222
2223 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2224 struct snd_kcontrol *kcontrol, int event)
2225 {
2226 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2227 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2228 struct wm_adsp *dsp = &dsps[w->shift];
2229 struct wm_adsp_alg_region *alg_region;
2230 struct wm_coeff_ctl *ctl;
2231 int ret;
2232
2233 switch (event) {
2234 case SND_SOC_DAPM_POST_PMU:
2235 flush_work(&dsp->boot_work);
2236
2237 if (!dsp->running)
2238 return -EIO;
2239
2240 ret = regmap_update_bits(dsp->regmap,
2241 dsp->base + ADSP2_CONTROL,
2242 ADSP2_CORE_ENA | ADSP2_START,
2243 ADSP2_CORE_ENA | ADSP2_START);
2244 if (ret != 0)
2245 goto err;
2246
2247 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2248 ret = wm_adsp_buffer_init(dsp);
2249
2250 break;
2251
2252 case SND_SOC_DAPM_PRE_PMD:
2253 /* Log firmware state, it can be useful for analysis */
2254 wm_adsp2_show_fw_status(dsp);
2255
2256 mutex_lock(&dsp->pwr_lock);
2257
2258 wm_adsp_debugfs_clear(dsp);
2259
2260 dsp->fw_id = 0;
2261 dsp->fw_id_version = 0;
2262 dsp->running = false;
2263
2264 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2265 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
2266 ADSP2_START, 0);
2267
2268 /* Make sure DMAs are quiesced */
2269 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2270 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2271 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2272
2273 list_for_each_entry(ctl, &dsp->ctl_list, list)
2274 ctl->enabled = 0;
2275
2276 while (!list_empty(&dsp->alg_regions)) {
2277 alg_region = list_first_entry(&dsp->alg_regions,
2278 struct wm_adsp_alg_region,
2279 list);
2280 list_del(&alg_region->list);
2281 kfree(alg_region);
2282 }
2283
2284 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2285 wm_adsp_buffer_free(dsp);
2286
2287 mutex_unlock(&dsp->pwr_lock);
2288
2289 adsp_dbg(dsp, "Shutdown complete\n");
2290 break;
2291
2292 default:
2293 break;
2294 }
2295
2296 return 0;
2297 err:
2298 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2299 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2300 return ret;
2301 }
2302 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2303
2304 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2305 {
2306 wm_adsp2_init_debugfs(dsp, codec);
2307
2308 return snd_soc_add_codec_controls(codec,
2309 &wm_adsp_fw_controls[dsp->num - 1],
2310 1);
2311 }
2312 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2313
2314 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2315 {
2316 wm_adsp2_cleanup_debugfs(dsp);
2317
2318 return 0;
2319 }
2320 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2321
2322 int wm_adsp2_init(struct wm_adsp *dsp)
2323 {
2324 int ret;
2325
2326 /*
2327 * Disable the DSP memory by default when in reset for a small
2328 * power saving.
2329 */
2330 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2331 ADSP2_MEM_ENA, 0);
2332 if (ret != 0) {
2333 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2334 return ret;
2335 }
2336
2337 INIT_LIST_HEAD(&dsp->alg_regions);
2338 INIT_LIST_HEAD(&dsp->ctl_list);
2339 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2340
2341 mutex_init(&dsp->pwr_lock);
2342
2343 return 0;
2344 }
2345 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2346
2347 int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2348 {
2349 struct wm_adsp_compr *compr;
2350 int ret = 0;
2351
2352 mutex_lock(&dsp->pwr_lock);
2353
2354 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2355 adsp_err(dsp, "Firmware does not support compressed API\n");
2356 ret = -ENXIO;
2357 goto out;
2358 }
2359
2360 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2361 adsp_err(dsp, "Firmware does not support stream direction\n");
2362 ret = -EINVAL;
2363 goto out;
2364 }
2365
2366 if (dsp->compr) {
2367 /* It is expect this limitation will be removed in future */
2368 adsp_err(dsp, "Only a single stream supported per DSP\n");
2369 ret = -EBUSY;
2370 goto out;
2371 }
2372
2373 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2374 if (!compr) {
2375 ret = -ENOMEM;
2376 goto out;
2377 }
2378
2379 compr->dsp = dsp;
2380 compr->stream = stream;
2381
2382 dsp->compr = compr;
2383
2384 stream->runtime->private_data = compr;
2385
2386 out:
2387 mutex_unlock(&dsp->pwr_lock);
2388
2389 return ret;
2390 }
2391 EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
2392
2393 int wm_adsp_compr_free(struct snd_compr_stream *stream)
2394 {
2395 struct wm_adsp_compr *compr = stream->runtime->private_data;
2396 struct wm_adsp *dsp = compr->dsp;
2397
2398 mutex_lock(&dsp->pwr_lock);
2399
2400 dsp->compr = NULL;
2401
2402 kfree(compr->raw_buf);
2403 kfree(compr);
2404
2405 mutex_unlock(&dsp->pwr_lock);
2406
2407 return 0;
2408 }
2409 EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
2410
2411 static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
2412 struct snd_compr_params *params)
2413 {
2414 struct wm_adsp_compr *compr = stream->runtime->private_data;
2415 struct wm_adsp *dsp = compr->dsp;
2416 const struct wm_adsp_fw_caps *caps;
2417 const struct snd_codec_desc *desc;
2418 int i, j;
2419
2420 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
2421 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
2422 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
2423 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
2424 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
2425 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
2426 params->buffer.fragment_size,
2427 params->buffer.fragments);
2428
2429 return -EINVAL;
2430 }
2431
2432 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
2433 caps = &wm_adsp_fw[dsp->fw].caps[i];
2434 desc = &caps->desc;
2435
2436 if (caps->id != params->codec.id)
2437 continue;
2438
2439 if (stream->direction == SND_COMPRESS_PLAYBACK) {
2440 if (desc->max_ch < params->codec.ch_out)
2441 continue;
2442 } else {
2443 if (desc->max_ch < params->codec.ch_in)
2444 continue;
2445 }
2446
2447 if (!(desc->formats & (1 << params->codec.format)))
2448 continue;
2449
2450 for (j = 0; j < desc->num_sample_rates; ++j)
2451 if (desc->sample_rates[j] == params->codec.sample_rate)
2452 return 0;
2453 }
2454
2455 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2456 params->codec.id, params->codec.ch_in, params->codec.ch_out,
2457 params->codec.sample_rate, params->codec.format);
2458 return -EINVAL;
2459 }
2460
2461 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
2462 {
2463 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
2464 }
2465
2466 int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
2467 struct snd_compr_params *params)
2468 {
2469 struct wm_adsp_compr *compr = stream->runtime->private_data;
2470 unsigned int size;
2471 int ret;
2472
2473 ret = wm_adsp_compr_check_params(stream, params);
2474 if (ret)
2475 return ret;
2476
2477 compr->size = params->buffer;
2478
2479 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
2480 compr->size.fragment_size, compr->size.fragments);
2481
2482 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
2483 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
2484 if (!compr->raw_buf)
2485 return -ENOMEM;
2486
2487 return 0;
2488 }
2489 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
2490
2491 int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
2492 struct snd_compr_caps *caps)
2493 {
2494 struct wm_adsp_compr *compr = stream->runtime->private_data;
2495 int fw = compr->dsp->fw;
2496 int i;
2497
2498 if (wm_adsp_fw[fw].caps) {
2499 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
2500 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
2501
2502 caps->num_codecs = i;
2503 caps->direction = wm_adsp_fw[fw].compr_direction;
2504
2505 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
2506 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
2507 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
2508 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
2509 }
2510
2511 return 0;
2512 }
2513 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
2514
2515 static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
2516 unsigned int mem_addr,
2517 unsigned int num_words, u32 *data)
2518 {
2519 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2520 unsigned int i, reg;
2521 int ret;
2522
2523 if (!mem)
2524 return -EINVAL;
2525
2526 reg = wm_adsp_region_to_reg(mem, mem_addr);
2527
2528 ret = regmap_raw_read(dsp->regmap, reg, data,
2529 sizeof(*data) * num_words);
2530 if (ret < 0)
2531 return ret;
2532
2533 for (i = 0; i < num_words; ++i)
2534 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
2535
2536 return 0;
2537 }
2538
2539 static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
2540 unsigned int mem_addr, u32 *data)
2541 {
2542 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
2543 }
2544
2545 static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
2546 unsigned int mem_addr, u32 data)
2547 {
2548 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2549 unsigned int reg;
2550
2551 if (!mem)
2552 return -EINVAL;
2553
2554 reg = wm_adsp_region_to_reg(mem, mem_addr);
2555
2556 data = cpu_to_be32(data & 0x00ffffffu);
2557
2558 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
2559 }
2560
2561 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
2562 unsigned int field_offset, u32 *data)
2563 {
2564 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
2565 buf->host_buf_ptr + field_offset, data);
2566 }
2567
2568 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
2569 unsigned int field_offset, u32 data)
2570 {
2571 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
2572 buf->host_buf_ptr + field_offset, data);
2573 }
2574
2575 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
2576 {
2577 struct wm_adsp_alg_region *alg_region;
2578 struct wm_adsp *dsp = buf->dsp;
2579 u32 xmalg, addr, magic;
2580 int i, ret;
2581
2582 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
2583 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
2584
2585 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
2586 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
2587 if (ret < 0)
2588 return ret;
2589
2590 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
2591 return -EINVAL;
2592
2593 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
2594 for (i = 0; i < 5; ++i) {
2595 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
2596 &buf->host_buf_ptr);
2597 if (ret < 0)
2598 return ret;
2599
2600 if (buf->host_buf_ptr)
2601 break;
2602
2603 usleep_range(1000, 2000);
2604 }
2605
2606 if (!buf->host_buf_ptr)
2607 return -EIO;
2608
2609 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
2610
2611 return 0;
2612 }
2613
2614 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
2615 {
2616 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
2617 struct wm_adsp_buffer_region *region;
2618 u32 offset = 0;
2619 int i, ret;
2620
2621 for (i = 0; i < caps->num_regions; ++i) {
2622 region = &buf->regions[i];
2623
2624 region->offset = offset;
2625 region->mem_type = caps->region_defs[i].mem_type;
2626
2627 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
2628 &region->base_addr);
2629 if (ret < 0)
2630 return ret;
2631
2632 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
2633 &offset);
2634 if (ret < 0)
2635 return ret;
2636
2637 region->cumulative_size = offset;
2638
2639 adsp_dbg(buf->dsp,
2640 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2641 i, region->mem_type, region->base_addr,
2642 region->offset, region->cumulative_size);
2643 }
2644
2645 return 0;
2646 }
2647
2648 static int wm_adsp_buffer_init(struct wm_adsp *dsp)
2649 {
2650 struct wm_adsp_compr_buf *buf;
2651 int ret;
2652
2653 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
2654 if (!buf)
2655 return -ENOMEM;
2656
2657 buf->dsp = dsp;
2658 buf->read_index = -1;
2659 buf->irq_count = 0xFFFFFFFF;
2660
2661 ret = wm_adsp_buffer_locate(buf);
2662 if (ret < 0) {
2663 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
2664 goto err_buffer;
2665 }
2666
2667 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
2668 sizeof(*buf->regions), GFP_KERNEL);
2669 if (!buf->regions) {
2670 ret = -ENOMEM;
2671 goto err_buffer;
2672 }
2673
2674 ret = wm_adsp_buffer_populate(buf);
2675 if (ret < 0) {
2676 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
2677 goto err_regions;
2678 }
2679
2680 dsp->buffer = buf;
2681
2682 return 0;
2683
2684 err_regions:
2685 kfree(buf->regions);
2686 err_buffer:
2687 kfree(buf);
2688 return ret;
2689 }
2690
2691 static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2692 {
2693 if (dsp->buffer) {
2694 kfree(dsp->buffer->regions);
2695 kfree(dsp->buffer);
2696
2697 dsp->buffer = NULL;
2698 }
2699
2700 return 0;
2701 }
2702
2703 static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2704 {
2705 return compr->buf != NULL;
2706 }
2707
2708 static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2709 {
2710 /*
2711 * Note this will be more complex once each DSP can support multiple
2712 * streams
2713 */
2714 if (!compr->dsp->buffer)
2715 return -EINVAL;
2716
2717 compr->buf = compr->dsp->buffer;
2718
2719 return 0;
2720 }
2721
2722 int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2723 {
2724 struct wm_adsp_compr *compr = stream->runtime->private_data;
2725 struct wm_adsp *dsp = compr->dsp;
2726 int ret = 0;
2727
2728 adsp_dbg(dsp, "Trigger: %d\n", cmd);
2729
2730 mutex_lock(&dsp->pwr_lock);
2731
2732 switch (cmd) {
2733 case SNDRV_PCM_TRIGGER_START:
2734 if (wm_adsp_compr_attached(compr))
2735 break;
2736
2737 ret = wm_adsp_compr_attach(compr);
2738 if (ret < 0) {
2739 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
2740 ret);
2741 break;
2742 }
2743
2744 /* Trigger the IRQ at one fragment of data */
2745 ret = wm_adsp_buffer_write(compr->buf,
2746 HOST_BUFFER_FIELD(high_water_mark),
2747 wm_adsp_compr_frag_words(compr));
2748 if (ret < 0) {
2749 adsp_err(dsp, "Failed to set high water mark: %d\n",
2750 ret);
2751 break;
2752 }
2753 break;
2754 case SNDRV_PCM_TRIGGER_STOP:
2755 break;
2756 default:
2757 ret = -EINVAL;
2758 break;
2759 }
2760
2761 mutex_unlock(&dsp->pwr_lock);
2762
2763 return ret;
2764 }
2765 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
2766
2767 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
2768 {
2769 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
2770
2771 return buf->regions[last_region].cumulative_size;
2772 }
2773
2774 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
2775 {
2776 u32 next_read_index, next_write_index;
2777 int write_index, read_index, avail;
2778 int ret;
2779
2780 /* Only sync read index if we haven't already read a valid index */
2781 if (buf->read_index < 0) {
2782 ret = wm_adsp_buffer_read(buf,
2783 HOST_BUFFER_FIELD(next_read_index),
2784 &next_read_index);
2785 if (ret < 0)
2786 return ret;
2787
2788 read_index = sign_extend32(next_read_index, 23);
2789
2790 if (read_index < 0) {
2791 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
2792 return 0;
2793 }
2794
2795 buf->read_index = read_index;
2796 }
2797
2798 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
2799 &next_write_index);
2800 if (ret < 0)
2801 return ret;
2802
2803 write_index = sign_extend32(next_write_index, 23);
2804
2805 avail = write_index - buf->read_index;
2806 if (avail < 0)
2807 avail += wm_adsp_buffer_size(buf);
2808
2809 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
2810 buf->read_index, write_index, avail);
2811
2812 buf->avail = avail;
2813
2814 return 0;
2815 }
2816
2817 int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
2818 {
2819 struct wm_adsp_compr_buf *buf = dsp->buffer;
2820 struct wm_adsp_compr *compr = dsp->compr;
2821 int ret = 0;
2822
2823 mutex_lock(&dsp->pwr_lock);
2824
2825 if (!buf) {
2826 ret = -ENODEV;
2827 goto out;
2828 }
2829
2830 adsp_dbg(dsp, "Handling buffer IRQ\n");
2831
2832 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
2833 if (ret < 0) {
2834 adsp_err(dsp, "Failed to check buffer error: %d\n", ret);
2835 goto out;
2836 }
2837 if (buf->error != 0) {
2838 adsp_err(dsp, "Buffer error occurred: %d\n", buf->error);
2839 ret = -EIO;
2840 goto out;
2841 }
2842
2843 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
2844 &buf->irq_count);
2845 if (ret < 0) {
2846 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
2847 goto out;
2848 }
2849
2850 ret = wm_adsp_buffer_update_avail(buf);
2851 if (ret < 0) {
2852 adsp_err(dsp, "Error reading avail: %d\n", ret);
2853 goto out;
2854 }
2855
2856 if (compr->stream)
2857 snd_compr_fragment_elapsed(compr->stream);
2858
2859 out:
2860 mutex_unlock(&dsp->pwr_lock);
2861
2862 return ret;
2863 }
2864 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
2865
2866 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
2867 {
2868 if (buf->irq_count & 0x01)
2869 return 0;
2870
2871 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
2872 buf->irq_count);
2873
2874 buf->irq_count |= 0x01;
2875
2876 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
2877 buf->irq_count);
2878 }
2879
2880 int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
2881 struct snd_compr_tstamp *tstamp)
2882 {
2883 struct wm_adsp_compr *compr = stream->runtime->private_data;
2884 struct wm_adsp_compr_buf *buf = compr->buf;
2885 struct wm_adsp *dsp = compr->dsp;
2886 int ret = 0;
2887
2888 adsp_dbg(dsp, "Pointer request\n");
2889
2890 mutex_lock(&dsp->pwr_lock);
2891
2892 if (!compr->buf) {
2893 ret = -ENXIO;
2894 goto out;
2895 }
2896
2897 if (compr->buf->error) {
2898 ret = -EIO;
2899 goto out;
2900 }
2901
2902 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
2903 ret = wm_adsp_buffer_update_avail(buf);
2904 if (ret < 0) {
2905 adsp_err(dsp, "Error reading avail: %d\n", ret);
2906 goto out;
2907 }
2908
2909 /*
2910 * If we really have less than 1 fragment available tell the
2911 * DSP to inform us once a whole fragment is available.
2912 */
2913 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
2914 ret = wm_adsp_buffer_reenable_irq(buf);
2915 if (ret < 0) {
2916 adsp_err(dsp,
2917 "Failed to re-enable buffer IRQ: %d\n",
2918 ret);
2919 goto out;
2920 }
2921 }
2922 }
2923
2924 tstamp->copied_total = compr->copied_total;
2925 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
2926
2927 out:
2928 mutex_unlock(&dsp->pwr_lock);
2929
2930 return ret;
2931 }
2932 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
2933
2934 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
2935 {
2936 struct wm_adsp_compr_buf *buf = compr->buf;
2937 u8 *pack_in = (u8 *)compr->raw_buf;
2938 u8 *pack_out = (u8 *)compr->raw_buf;
2939 unsigned int adsp_addr;
2940 int mem_type, nwords, max_read;
2941 int i, j, ret;
2942
2943 /* Calculate read parameters */
2944 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
2945 if (buf->read_index < buf->regions[i].cumulative_size)
2946 break;
2947
2948 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
2949 return -EINVAL;
2950
2951 mem_type = buf->regions[i].mem_type;
2952 adsp_addr = buf->regions[i].base_addr +
2953 (buf->read_index - buf->regions[i].offset);
2954
2955 max_read = wm_adsp_compr_frag_words(compr);
2956 nwords = buf->regions[i].cumulative_size - buf->read_index;
2957
2958 if (nwords > target)
2959 nwords = target;
2960 if (nwords > buf->avail)
2961 nwords = buf->avail;
2962 if (nwords > max_read)
2963 nwords = max_read;
2964 if (!nwords)
2965 return 0;
2966
2967 /* Read data from DSP */
2968 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
2969 nwords, compr->raw_buf);
2970 if (ret < 0)
2971 return ret;
2972
2973 /* Remove the padding bytes from the data read from the DSP */
2974 for (i = 0; i < nwords; i++) {
2975 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
2976 *pack_out++ = *pack_in++;
2977
2978 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
2979 }
2980
2981 /* update read index to account for words read */
2982 buf->read_index += nwords;
2983 if (buf->read_index == wm_adsp_buffer_size(buf))
2984 buf->read_index = 0;
2985
2986 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
2987 buf->read_index);
2988 if (ret < 0)
2989 return ret;
2990
2991 /* update avail to account for words read */
2992 buf->avail -= nwords;
2993
2994 return nwords;
2995 }
2996
2997 static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
2998 char __user *buf, size_t count)
2999 {
3000 struct wm_adsp *dsp = compr->dsp;
3001 int ntotal = 0;
3002 int nwords, nbytes;
3003
3004 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3005
3006 if (!compr->buf)
3007 return -ENXIO;
3008
3009 if (compr->buf->error)
3010 return -EIO;
3011
3012 count /= WM_ADSP_DATA_WORD_SIZE;
3013
3014 do {
3015 nwords = wm_adsp_buffer_capture_block(compr, count);
3016 if (nwords < 0) {
3017 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3018 return nwords;
3019 }
3020
3021 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3022
3023 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3024
3025 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3026 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3027 ntotal, nbytes);
3028 return -EFAULT;
3029 }
3030
3031 count -= nwords;
3032 ntotal += nbytes;
3033 } while (nwords > 0 && count > 0);
3034
3035 compr->copied_total += ntotal;
3036
3037 return ntotal;
3038 }
3039
3040 int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3041 size_t count)
3042 {
3043 struct wm_adsp_compr *compr = stream->runtime->private_data;
3044 struct wm_adsp *dsp = compr->dsp;
3045 int ret;
3046
3047 mutex_lock(&dsp->pwr_lock);
3048
3049 if (stream->direction == SND_COMPRESS_CAPTURE)
3050 ret = wm_adsp_compr_read(compr, buf, count);
3051 else
3052 ret = -ENOTSUPP;
3053
3054 mutex_unlock(&dsp->pwr_lock);
3055
3056 return ret;
3057 }
3058 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3059
3060 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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