2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
35 #include <linux/mfd/arizona/registers.h>
40 #define adsp_crit(_dsp, fmt, ...) \
41 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42 #define adsp_err(_dsp, fmt, ...) \
43 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44 #define adsp_warn(_dsp, fmt, ...) \
45 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46 #define adsp_info(_dsp, fmt, ...) \
47 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define adsp_dbg(_dsp, fmt, ...) \
49 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
51 #define ADSP1_CONTROL_1 0x00
52 #define ADSP1_CONTROL_2 0x02
53 #define ADSP1_CONTROL_3 0x03
54 #define ADSP1_CONTROL_4 0x04
55 #define ADSP1_CONTROL_5 0x06
56 #define ADSP1_CONTROL_6 0x07
57 #define ADSP1_CONTROL_7 0x08
58 #define ADSP1_CONTROL_8 0x09
59 #define ADSP1_CONTROL_9 0x0A
60 #define ADSP1_CONTROL_10 0x0B
61 #define ADSP1_CONTROL_11 0x0C
62 #define ADSP1_CONTROL_12 0x0D
63 #define ADSP1_CONTROL_13 0x0F
64 #define ADSP1_CONTROL_14 0x10
65 #define ADSP1_CONTROL_15 0x11
66 #define ADSP1_CONTROL_16 0x12
67 #define ADSP1_CONTROL_17 0x13
68 #define ADSP1_CONTROL_18 0x14
69 #define ADSP1_CONTROL_19 0x16
70 #define ADSP1_CONTROL_20 0x17
71 #define ADSP1_CONTROL_21 0x18
72 #define ADSP1_CONTROL_22 0x1A
73 #define ADSP1_CONTROL_23 0x1B
74 #define ADSP1_CONTROL_24 0x1C
75 #define ADSP1_CONTROL_25 0x1E
76 #define ADSP1_CONTROL_26 0x20
77 #define ADSP1_CONTROL_27 0x21
78 #define ADSP1_CONTROL_28 0x22
79 #define ADSP1_CONTROL_29 0x23
80 #define ADSP1_CONTROL_30 0x24
81 #define ADSP1_CONTROL_31 0x26
86 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
87 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
88 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
94 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
96 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
97 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
98 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
99 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
100 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
101 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
102 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
103 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
104 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
105 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
106 #define ADSP1_START 0x0001 /* DSP1_START */
107 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
108 #define ADSP1_START_SHIFT 0 /* DSP1_START */
109 #define ADSP1_START_WIDTH 1 /* DSP1_START */
114 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
115 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
116 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
118 #define ADSP2_CONTROL 0x0
119 #define ADSP2_CLOCKING 0x1
120 #define ADSP2_STATUS1 0x4
121 #define ADSP2_WDMA_CONFIG_1 0x30
122 #define ADSP2_WDMA_CONFIG_2 0x31
123 #define ADSP2_RDMA_CONFIG_1 0x34
125 #define ADSP2_SCRATCH0 0x40
126 #define ADSP2_SCRATCH1 0x41
127 #define ADSP2_SCRATCH2 0x42
128 #define ADSP2_SCRATCH3 0x43
134 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
135 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
136 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
137 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
138 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
139 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
140 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
141 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
142 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
143 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
144 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
145 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
146 #define ADSP2_START 0x0001 /* DSP1_START */
147 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
148 #define ADSP2_START_SHIFT 0 /* DSP1_START */
149 #define ADSP2_START_WIDTH 1 /* DSP1_START */
154 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
155 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
156 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
161 #define ADSP2_RAM_RDY 0x0001
162 #define ADSP2_RAM_RDY_MASK 0x0001
163 #define ADSP2_RAM_RDY_SHIFT 0
164 #define ADSP2_RAM_RDY_WIDTH 1
167 struct list_head list
;
171 static struct wm_adsp_buf
*wm_adsp_buf_alloc(const void *src
, size_t len
,
172 struct list_head
*list
)
174 struct wm_adsp_buf
*buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
179 buf
->buf
= vmalloc(len
);
184 memcpy(buf
->buf
, src
, len
);
187 list_add_tail(&buf
->list
, list
);
192 static void wm_adsp_buf_free(struct list_head
*list
)
194 while (!list_empty(list
)) {
195 struct wm_adsp_buf
*buf
= list_first_entry(list
,
198 list_del(&buf
->list
);
204 #define WM_ADSP_FW_MBC_VSS 0
205 #define WM_ADSP_FW_HIFI 1
206 #define WM_ADSP_FW_TX 2
207 #define WM_ADSP_FW_TX_SPK 3
208 #define WM_ADSP_FW_RX 4
209 #define WM_ADSP_FW_RX_ANC 5
210 #define WM_ADSP_FW_CTRL 6
211 #define WM_ADSP_FW_ASR 7
212 #define WM_ADSP_FW_TRACE 8
213 #define WM_ADSP_FW_SPK_PROT 9
214 #define WM_ADSP_FW_MISC 10
216 #define WM_ADSP_NUM_FW 11
218 static const char *wm_adsp_fw_text
[WM_ADSP_NUM_FW
] = {
219 [WM_ADSP_FW_MBC_VSS
] = "MBC/VSS",
220 [WM_ADSP_FW_HIFI
] = "MasterHiFi",
221 [WM_ADSP_FW_TX
] = "Tx",
222 [WM_ADSP_FW_TX_SPK
] = "Tx Speaker",
223 [WM_ADSP_FW_RX
] = "Rx",
224 [WM_ADSP_FW_RX_ANC
] = "Rx ANC",
225 [WM_ADSP_FW_CTRL
] = "Voice Ctrl",
226 [WM_ADSP_FW_ASR
] = "ASR Assist",
227 [WM_ADSP_FW_TRACE
] = "Dbg Trace",
228 [WM_ADSP_FW_SPK_PROT
] = "Protection",
229 [WM_ADSP_FW_MISC
] = "Misc",
232 struct wm_adsp_system_config_xm_hdr
{
238 __be32 dma_buffer_size
;
241 __be32 build_job_name
[3];
242 __be32 build_job_number
;
245 struct wm_adsp_alg_xm_struct
{
251 __be32 high_water_mark
;
252 __be32 low_water_mark
;
253 __be64 smoothed_power
;
256 struct wm_adsp_buffer
{
257 __be32 X_buf_base
; /* XM base addr of first X area */
258 __be32 X_buf_size
; /* Size of 1st X area in words */
259 __be32 X_buf_base2
; /* XM base addr of 2nd X area */
260 __be32 X_buf_brk
; /* Total X size in words */
261 __be32 Y_buf_base
; /* YM base addr of Y area */
262 __be32 wrap
; /* Total size X and Y in words */
263 __be32 high_water_mark
; /* Point at which IRQ is asserted */
264 __be32 irq_count
; /* bits 1-31 count IRQ assertions */
265 __be32 irq_ack
; /* acked IRQ count, bit 0 enables IRQ */
266 __be32 next_write_index
; /* word index of next write */
267 __be32 next_read_index
; /* word index of next read */
268 __be32 error
; /* error if any */
269 __be32 oldest_block_index
; /* word index of oldest surviving */
270 __be32 requested_rewind
; /* how many blocks rewind was done */
271 __be32 reserved_space
; /* internal */
272 __be32 min_free
; /* min free space since stream start */
273 __be32 blocks_written
[2]; /* total blocks written (64 bit) */
274 __be32 words_written
[2]; /* total words written (64 bit) */
277 struct wm_adsp_compr_buf
{
280 struct wm_adsp_buffer_region
*regions
;
284 struct wm_adsp_compr
{
286 struct wm_adsp_compr_buf
*buf
;
288 struct snd_compr_stream
*stream
;
289 struct snd_compressed_buffer size
;
292 #define WM_ADSP_DATA_WORD_SIZE 3
294 #define WM_ADSP_MIN_FRAGMENTS 1
295 #define WM_ADSP_MAX_FRAGMENTS 256
296 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
297 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
299 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
301 #define HOST_BUFFER_FIELD(field) \
302 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
304 #define ALG_XM_FIELD(field) \
305 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
307 static int wm_adsp_buffer_init(struct wm_adsp
*dsp
);
308 static int wm_adsp_buffer_free(struct wm_adsp
*dsp
);
310 struct wm_adsp_buffer_region
{
312 unsigned int cumulative_size
;
313 unsigned int mem_type
;
314 unsigned int base_addr
;
317 struct wm_adsp_buffer_region_def
{
318 unsigned int mem_type
;
319 unsigned int base_offset
;
320 unsigned int size_offset
;
323 static struct wm_adsp_buffer_region_def ez2control_regions
[] = {
325 .mem_type
= WMFW_ADSP2_XM
,
326 .base_offset
= HOST_BUFFER_FIELD(X_buf_base
),
327 .size_offset
= HOST_BUFFER_FIELD(X_buf_size
),
330 .mem_type
= WMFW_ADSP2_XM
,
331 .base_offset
= HOST_BUFFER_FIELD(X_buf_base2
),
332 .size_offset
= HOST_BUFFER_FIELD(X_buf_brk
),
335 .mem_type
= WMFW_ADSP2_YM
,
336 .base_offset
= HOST_BUFFER_FIELD(Y_buf_base
),
337 .size_offset
= HOST_BUFFER_FIELD(wrap
),
341 struct wm_adsp_fw_caps
{
343 struct snd_codec_desc desc
;
345 struct wm_adsp_buffer_region_def
*region_defs
;
348 static const struct wm_adsp_fw_caps ez2control_caps
[] = {
350 .id
= SND_AUDIOCODEC_BESPOKE
,
353 .sample_rates
= { 16000 },
354 .num_sample_rates
= 1,
355 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
357 .num_regions
= ARRAY_SIZE(ez2control_regions
),
358 .region_defs
= ez2control_regions
,
362 static const struct {
366 const struct wm_adsp_fw_caps
*caps
;
367 } wm_adsp_fw
[WM_ADSP_NUM_FW
] = {
368 [WM_ADSP_FW_MBC_VSS
] = { .file
= "mbc-vss" },
369 [WM_ADSP_FW_HIFI
] = { .file
= "hifi" },
370 [WM_ADSP_FW_TX
] = { .file
= "tx" },
371 [WM_ADSP_FW_TX_SPK
] = { .file
= "tx-spk" },
372 [WM_ADSP_FW_RX
] = { .file
= "rx" },
373 [WM_ADSP_FW_RX_ANC
] = { .file
= "rx-anc" },
374 [WM_ADSP_FW_CTRL
] = {
376 .compr_direction
= SND_COMPRESS_CAPTURE
,
377 .num_caps
= ARRAY_SIZE(ez2control_caps
),
378 .caps
= ez2control_caps
,
380 [WM_ADSP_FW_ASR
] = { .file
= "asr" },
381 [WM_ADSP_FW_TRACE
] = { .file
= "trace" },
382 [WM_ADSP_FW_SPK_PROT
] = { .file
= "spk-prot" },
383 [WM_ADSP_FW_MISC
] = { .file
= "misc" },
386 struct wm_coeff_ctl_ops
{
387 int (*xget
)(struct snd_kcontrol
*kcontrol
,
388 struct snd_ctl_elem_value
*ucontrol
);
389 int (*xput
)(struct snd_kcontrol
*kcontrol
,
390 struct snd_ctl_elem_value
*ucontrol
);
391 int (*xinfo
)(struct snd_kcontrol
*kcontrol
,
392 struct snd_ctl_elem_info
*uinfo
);
395 struct wm_coeff_ctl
{
398 struct wm_adsp_alg_region alg_region
;
399 struct wm_coeff_ctl_ops ops
;
401 unsigned int enabled
:1;
402 struct list_head list
;
407 struct snd_kcontrol
*kcontrol
;
411 #ifdef CONFIG_DEBUG_FS
412 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp
*dsp
, const char *s
)
414 char *tmp
= kasprintf(GFP_KERNEL
, "%s\n", s
);
416 kfree(dsp
->wmfw_file_name
);
417 dsp
->wmfw_file_name
= tmp
;
420 static void wm_adsp_debugfs_save_binname(struct wm_adsp
*dsp
, const char *s
)
422 char *tmp
= kasprintf(GFP_KERNEL
, "%s\n", s
);
424 kfree(dsp
->bin_file_name
);
425 dsp
->bin_file_name
= tmp
;
428 static void wm_adsp_debugfs_clear(struct wm_adsp
*dsp
)
430 kfree(dsp
->wmfw_file_name
);
431 kfree(dsp
->bin_file_name
);
432 dsp
->wmfw_file_name
= NULL
;
433 dsp
->bin_file_name
= NULL
;
436 static ssize_t
wm_adsp_debugfs_wmfw_read(struct file
*file
,
437 char __user
*user_buf
,
438 size_t count
, loff_t
*ppos
)
440 struct wm_adsp
*dsp
= file
->private_data
;
443 mutex_lock(&dsp
->pwr_lock
);
445 if (!dsp
->wmfw_file_name
|| !dsp
->running
)
448 ret
= simple_read_from_buffer(user_buf
, count
, ppos
,
450 strlen(dsp
->wmfw_file_name
));
452 mutex_unlock(&dsp
->pwr_lock
);
456 static ssize_t
wm_adsp_debugfs_bin_read(struct file
*file
,
457 char __user
*user_buf
,
458 size_t count
, loff_t
*ppos
)
460 struct wm_adsp
*dsp
= file
->private_data
;
463 mutex_lock(&dsp
->pwr_lock
);
465 if (!dsp
->bin_file_name
|| !dsp
->running
)
468 ret
= simple_read_from_buffer(user_buf
, count
, ppos
,
470 strlen(dsp
->bin_file_name
));
472 mutex_unlock(&dsp
->pwr_lock
);
476 static const struct {
478 const struct file_operations fops
;
479 } wm_adsp_debugfs_fops
[] = {
481 .name
= "wmfw_file_name",
484 .read
= wm_adsp_debugfs_wmfw_read
,
488 .name
= "bin_file_name",
491 .read
= wm_adsp_debugfs_bin_read
,
496 static void wm_adsp2_init_debugfs(struct wm_adsp
*dsp
,
497 struct snd_soc_codec
*codec
)
499 struct dentry
*root
= NULL
;
503 if (!codec
->component
.debugfs_root
) {
504 adsp_err(dsp
, "No codec debugfs root\n");
508 root_name
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
512 snprintf(root_name
, PAGE_SIZE
, "dsp%d", dsp
->num
);
513 root
= debugfs_create_dir(root_name
, codec
->component
.debugfs_root
);
519 if (!debugfs_create_bool("running", S_IRUGO
, root
, &dsp
->running
))
522 if (!debugfs_create_x32("fw_id", S_IRUGO
, root
, &dsp
->fw_id
))
525 if (!debugfs_create_x32("fw_version", S_IRUGO
, root
,
526 &dsp
->fw_id_version
))
529 for (i
= 0; i
< ARRAY_SIZE(wm_adsp_debugfs_fops
); ++i
) {
530 if (!debugfs_create_file(wm_adsp_debugfs_fops
[i
].name
,
532 &wm_adsp_debugfs_fops
[i
].fops
))
536 dsp
->debugfs_root
= root
;
540 debugfs_remove_recursive(root
);
541 adsp_err(dsp
, "Failed to create debugfs\n");
544 static void wm_adsp2_cleanup_debugfs(struct wm_adsp
*dsp
)
546 wm_adsp_debugfs_clear(dsp
);
547 debugfs_remove_recursive(dsp
->debugfs_root
);
550 static inline void wm_adsp2_init_debugfs(struct wm_adsp
*dsp
,
551 struct snd_soc_codec
*codec
)
555 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp
*dsp
)
559 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp
*dsp
,
564 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp
*dsp
,
569 static inline void wm_adsp_debugfs_clear(struct wm_adsp
*dsp
)
574 static int wm_adsp_fw_get(struct snd_kcontrol
*kcontrol
,
575 struct snd_ctl_elem_value
*ucontrol
)
577 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
578 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
579 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
581 ucontrol
->value
.integer
.value
[0] = dsp
[e
->shift_l
].fw
;
586 static int wm_adsp_fw_put(struct snd_kcontrol
*kcontrol
,
587 struct snd_ctl_elem_value
*ucontrol
)
589 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
590 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
591 struct wm_adsp
*dsp
= snd_soc_codec_get_drvdata(codec
);
594 if (ucontrol
->value
.integer
.value
[0] == dsp
[e
->shift_l
].fw
)
597 if (ucontrol
->value
.integer
.value
[0] >= WM_ADSP_NUM_FW
)
600 mutex_lock(&dsp
[e
->shift_l
].pwr_lock
);
602 if (dsp
[e
->shift_l
].running
|| dsp
[e
->shift_l
].compr
)
605 dsp
[e
->shift_l
].fw
= ucontrol
->value
.integer
.value
[0];
607 mutex_unlock(&dsp
[e
->shift_l
].pwr_lock
);
612 static const struct soc_enum wm_adsp_fw_enum
[] = {
613 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
614 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
615 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
616 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text
), wm_adsp_fw_text
),
619 const struct snd_kcontrol_new wm_adsp_fw_controls
[] = {
620 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum
[0],
621 wm_adsp_fw_get
, wm_adsp_fw_put
),
622 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum
[1],
623 wm_adsp_fw_get
, wm_adsp_fw_put
),
624 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum
[2],
625 wm_adsp_fw_get
, wm_adsp_fw_put
),
626 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum
[3],
627 wm_adsp_fw_get
, wm_adsp_fw_put
),
629 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls
);
631 static struct wm_adsp_region
const *wm_adsp_find_region(struct wm_adsp
*dsp
,
636 for (i
= 0; i
< dsp
->num_mems
; i
++)
637 if (dsp
->mem
[i
].type
== type
)
643 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region
const *mem
,
650 return mem
->base
+ (offset
* 3);
652 return mem
->base
+ (offset
* 2);
654 return mem
->base
+ (offset
* 2);
656 return mem
->base
+ (offset
* 2);
658 return mem
->base
+ (offset
* 2);
660 WARN(1, "Unknown memory region type");
665 static void wm_adsp2_show_fw_status(struct wm_adsp
*dsp
)
670 ret
= regmap_raw_read(dsp
->regmap
, dsp
->base
+ ADSP2_SCRATCH0
,
671 scratch
, sizeof(scratch
));
673 adsp_err(dsp
, "Failed to read SCRATCH regs: %d\n", ret
);
677 adsp_dbg(dsp
, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
678 be16_to_cpu(scratch
[0]),
679 be16_to_cpu(scratch
[1]),
680 be16_to_cpu(scratch
[2]),
681 be16_to_cpu(scratch
[3]));
684 static int wm_coeff_info(struct snd_kcontrol
*kctl
,
685 struct snd_ctl_elem_info
*uinfo
)
687 struct wm_coeff_ctl
*ctl
= (struct wm_coeff_ctl
*)kctl
->private_value
;
689 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
690 uinfo
->count
= ctl
->len
;
694 static int wm_coeff_write_control(struct wm_coeff_ctl
*ctl
,
695 const void *buf
, size_t len
)
697 struct wm_adsp_alg_region
*alg_region
= &ctl
->alg_region
;
698 const struct wm_adsp_region
*mem
;
699 struct wm_adsp
*dsp
= ctl
->dsp
;
704 mem
= wm_adsp_find_region(dsp
, alg_region
->type
);
706 adsp_err(dsp
, "No base for region %x\n",
711 reg
= ctl
->alg_region
.base
+ ctl
->offset
;
712 reg
= wm_adsp_region_to_reg(mem
, reg
);
714 scratch
= kmemdup(buf
, ctl
->len
, GFP_KERNEL
| GFP_DMA
);
718 ret
= regmap_raw_write(dsp
->regmap
, reg
, scratch
,
721 adsp_err(dsp
, "Failed to write %zu bytes to %x: %d\n",
726 adsp_dbg(dsp
, "Wrote %zu bytes to %x\n", ctl
->len
, reg
);
733 static int wm_coeff_put(struct snd_kcontrol
*kctl
,
734 struct snd_ctl_elem_value
*ucontrol
)
736 struct wm_coeff_ctl
*ctl
= (struct wm_coeff_ctl
*)kctl
->private_value
;
737 char *p
= ucontrol
->value
.bytes
.data
;
740 mutex_lock(&ctl
->dsp
->pwr_lock
);
742 memcpy(ctl
->cache
, p
, ctl
->len
);
746 ret
= wm_coeff_write_control(ctl
, p
, ctl
->len
);
748 mutex_unlock(&ctl
->dsp
->pwr_lock
);
753 static int wm_coeff_read_control(struct wm_coeff_ctl
*ctl
,
754 void *buf
, size_t len
)
756 struct wm_adsp_alg_region
*alg_region
= &ctl
->alg_region
;
757 const struct wm_adsp_region
*mem
;
758 struct wm_adsp
*dsp
= ctl
->dsp
;
763 mem
= wm_adsp_find_region(dsp
, alg_region
->type
);
765 adsp_err(dsp
, "No base for region %x\n",
770 reg
= ctl
->alg_region
.base
+ ctl
->offset
;
771 reg
= wm_adsp_region_to_reg(mem
, reg
);
773 scratch
= kmalloc(ctl
->len
, GFP_KERNEL
| GFP_DMA
);
777 ret
= regmap_raw_read(dsp
->regmap
, reg
, scratch
, ctl
->len
);
779 adsp_err(dsp
, "Failed to read %zu bytes from %x: %d\n",
784 adsp_dbg(dsp
, "Read %zu bytes from %x\n", ctl
->len
, reg
);
786 memcpy(buf
, scratch
, ctl
->len
);
792 static int wm_coeff_get(struct snd_kcontrol
*kctl
,
793 struct snd_ctl_elem_value
*ucontrol
)
795 struct wm_coeff_ctl
*ctl
= (struct wm_coeff_ctl
*)kctl
->private_value
;
796 char *p
= ucontrol
->value
.bytes
.data
;
799 mutex_lock(&ctl
->dsp
->pwr_lock
);
801 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
) {
803 ret
= wm_coeff_read_control(ctl
, p
, ctl
->len
);
807 if (!ctl
->flags
&& ctl
->enabled
)
808 ret
= wm_coeff_read_control(ctl
, ctl
->cache
, ctl
->len
);
810 memcpy(p
, ctl
->cache
, ctl
->len
);
813 mutex_unlock(&ctl
->dsp
->pwr_lock
);
818 struct wmfw_ctl_work
{
820 struct wm_coeff_ctl
*ctl
;
821 struct work_struct work
;
824 static int wmfw_add_ctl(struct wm_adsp
*dsp
, struct wm_coeff_ctl
*ctl
)
826 struct snd_kcontrol_new
*kcontrol
;
829 if (!ctl
|| !ctl
->name
)
832 kcontrol
= kzalloc(sizeof(*kcontrol
), GFP_KERNEL
);
835 kcontrol
->iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
837 kcontrol
->name
= ctl
->name
;
838 kcontrol
->info
= wm_coeff_info
;
839 kcontrol
->get
= wm_coeff_get
;
840 kcontrol
->put
= wm_coeff_put
;
841 kcontrol
->private_value
= (unsigned long)ctl
;
844 if (ctl
->flags
& WMFW_CTL_FLAG_WRITEABLE
)
845 kcontrol
->access
|= SNDRV_CTL_ELEM_ACCESS_WRITE
;
846 if (ctl
->flags
& WMFW_CTL_FLAG_READABLE
)
847 kcontrol
->access
|= SNDRV_CTL_ELEM_ACCESS_READ
;
848 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)
849 kcontrol
->access
|= SNDRV_CTL_ELEM_ACCESS_VOLATILE
;
852 ret
= snd_soc_add_card_controls(dsp
->card
,
859 ctl
->kcontrol
= snd_soc_card_get_kcontrol(dsp
->card
,
869 static int wm_coeff_init_control_caches(struct wm_adsp
*dsp
)
871 struct wm_coeff_ctl
*ctl
;
874 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
875 if (!ctl
->enabled
|| ctl
->set
)
877 if (ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)
880 ret
= wm_coeff_read_control(ctl
,
890 static int wm_coeff_sync_controls(struct wm_adsp
*dsp
)
892 struct wm_coeff_ctl
*ctl
;
895 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
898 if (ctl
->set
&& !(ctl
->flags
& WMFW_CTL_FLAG_VOLATILE
)) {
899 ret
= wm_coeff_write_control(ctl
,
910 static void wm_adsp_ctl_work(struct work_struct
*work
)
912 struct wmfw_ctl_work
*ctl_work
= container_of(work
,
913 struct wmfw_ctl_work
,
916 wmfw_add_ctl(ctl_work
->dsp
, ctl_work
->ctl
);
920 static int wm_adsp_create_control(struct wm_adsp
*dsp
,
921 const struct wm_adsp_alg_region
*alg_region
,
922 unsigned int offset
, unsigned int len
,
923 const char *subname
, unsigned int subname_len
,
926 struct wm_coeff_ctl
*ctl
;
927 struct wmfw_ctl_work
*ctl_work
;
928 char name
[SNDRV_CTL_ELEM_ID_NAME_MAXLEN
];
932 if (flags
& WMFW_CTL_FLAG_SYS
)
935 switch (alg_region
->type
) {
952 adsp_err(dsp
, "Unknown region type: %d\n", alg_region
->type
);
956 switch (dsp
->fw_ver
) {
959 snprintf(name
, SNDRV_CTL_ELEM_ID_NAME_MAXLEN
, "DSP%d %s %x",
960 dsp
->num
, region_name
, alg_region
->alg
);
963 ret
= snprintf(name
, SNDRV_CTL_ELEM_ID_NAME_MAXLEN
,
964 "DSP%d%c %.12s %x", dsp
->num
, *region_name
,
965 wm_adsp_fw_text
[dsp
->fw
], alg_region
->alg
);
967 /* Truncate the subname from the start if it is too long */
969 int avail
= SNDRV_CTL_ELEM_ID_NAME_MAXLEN
- ret
- 2;
972 if (subname_len
> avail
)
973 skip
= subname_len
- avail
;
976 SNDRV_CTL_ELEM_ID_NAME_MAXLEN
- ret
, " %.*s",
977 subname_len
- skip
, subname
+ skip
);
982 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
983 if (!strcmp(ctl
->name
, name
)) {
990 ctl
= kzalloc(sizeof(*ctl
), GFP_KERNEL
);
993 ctl
->fw_name
= wm_adsp_fw_text
[dsp
->fw
];
994 ctl
->alg_region
= *alg_region
;
995 ctl
->name
= kmemdup(name
, strlen(name
) + 1, GFP_KERNEL
);
1002 ctl
->ops
.xget
= wm_coeff_get
;
1003 ctl
->ops
.xput
= wm_coeff_put
;
1007 ctl
->offset
= offset
;
1009 adsp_warn(dsp
, "Truncating control %s from %d\n",
1014 ctl
->cache
= kzalloc(ctl
->len
, GFP_KERNEL
);
1020 list_add(&ctl
->list
, &dsp
->ctl_list
);
1022 ctl_work
= kzalloc(sizeof(*ctl_work
), GFP_KERNEL
);
1028 ctl_work
->dsp
= dsp
;
1029 ctl_work
->ctl
= ctl
;
1030 INIT_WORK(&ctl_work
->work
, wm_adsp_ctl_work
);
1031 schedule_work(&ctl_work
->work
);
1045 struct wm_coeff_parsed_alg
{
1052 struct wm_coeff_parsed_coeff
{
1062 static int wm_coeff_parse_string(int bytes
, const u8
**pos
, const u8
**str
)
1071 length
= le16_to_cpu(*((__le16
*)*pos
));
1078 *str
= *pos
+ bytes
;
1080 *pos
+= ((length
+ bytes
) + 3) & ~0x03;
1085 static int wm_coeff_parse_int(int bytes
, const u8
**pos
)
1091 val
= le16_to_cpu(*((__le16
*)*pos
));
1094 val
= le32_to_cpu(*((__le32
*)*pos
));
1105 static inline void wm_coeff_parse_alg(struct wm_adsp
*dsp
, const u8
**data
,
1106 struct wm_coeff_parsed_alg
*blk
)
1108 const struct wmfw_adsp_alg_data
*raw
;
1110 switch (dsp
->fw_ver
) {
1113 raw
= (const struct wmfw_adsp_alg_data
*)*data
;
1116 blk
->id
= le32_to_cpu(raw
->id
);
1117 blk
->name
= raw
->name
;
1118 blk
->name_len
= strlen(raw
->name
);
1119 blk
->ncoeff
= le32_to_cpu(raw
->ncoeff
);
1122 blk
->id
= wm_coeff_parse_int(sizeof(raw
->id
), data
);
1123 blk
->name_len
= wm_coeff_parse_string(sizeof(u8
), data
,
1125 wm_coeff_parse_string(sizeof(u16
), data
, NULL
);
1126 blk
->ncoeff
= wm_coeff_parse_int(sizeof(raw
->ncoeff
), data
);
1130 adsp_dbg(dsp
, "Algorithm ID: %#x\n", blk
->id
);
1131 adsp_dbg(dsp
, "Algorithm name: %.*s\n", blk
->name_len
, blk
->name
);
1132 adsp_dbg(dsp
, "# of coefficient descriptors: %#x\n", blk
->ncoeff
);
1135 static inline void wm_coeff_parse_coeff(struct wm_adsp
*dsp
, const u8
**data
,
1136 struct wm_coeff_parsed_coeff
*blk
)
1138 const struct wmfw_adsp_coeff_data
*raw
;
1142 switch (dsp
->fw_ver
) {
1145 raw
= (const struct wmfw_adsp_coeff_data
*)*data
;
1146 *data
= *data
+ sizeof(raw
->hdr
) + le32_to_cpu(raw
->hdr
.size
);
1148 blk
->offset
= le16_to_cpu(raw
->hdr
.offset
);
1149 blk
->mem_type
= le16_to_cpu(raw
->hdr
.type
);
1150 blk
->name
= raw
->name
;
1151 blk
->name_len
= strlen(raw
->name
);
1152 blk
->ctl_type
= le16_to_cpu(raw
->ctl_type
);
1153 blk
->flags
= le16_to_cpu(raw
->flags
);
1154 blk
->len
= le32_to_cpu(raw
->len
);
1158 blk
->offset
= wm_coeff_parse_int(sizeof(raw
->hdr
.offset
), &tmp
);
1159 blk
->mem_type
= wm_coeff_parse_int(sizeof(raw
->hdr
.type
), &tmp
);
1160 length
= wm_coeff_parse_int(sizeof(raw
->hdr
.size
), &tmp
);
1161 blk
->name_len
= wm_coeff_parse_string(sizeof(u8
), &tmp
,
1163 wm_coeff_parse_string(sizeof(u8
), &tmp
, NULL
);
1164 wm_coeff_parse_string(sizeof(u16
), &tmp
, NULL
);
1165 blk
->ctl_type
= wm_coeff_parse_int(sizeof(raw
->ctl_type
), &tmp
);
1166 blk
->flags
= wm_coeff_parse_int(sizeof(raw
->flags
), &tmp
);
1167 blk
->len
= wm_coeff_parse_int(sizeof(raw
->len
), &tmp
);
1169 *data
= *data
+ sizeof(raw
->hdr
) + length
;
1173 adsp_dbg(dsp
, "\tCoefficient type: %#x\n", blk
->mem_type
);
1174 adsp_dbg(dsp
, "\tCoefficient offset: %#x\n", blk
->offset
);
1175 adsp_dbg(dsp
, "\tCoefficient name: %.*s\n", blk
->name_len
, blk
->name
);
1176 adsp_dbg(dsp
, "\tCoefficient flags: %#x\n", blk
->flags
);
1177 adsp_dbg(dsp
, "\tALSA control type: %#x\n", blk
->ctl_type
);
1178 adsp_dbg(dsp
, "\tALSA control len: %#x\n", blk
->len
);
1181 static int wm_adsp_parse_coeff(struct wm_adsp
*dsp
,
1182 const struct wmfw_region
*region
)
1184 struct wm_adsp_alg_region alg_region
= {};
1185 struct wm_coeff_parsed_alg alg_blk
;
1186 struct wm_coeff_parsed_coeff coeff_blk
;
1187 const u8
*data
= region
->data
;
1190 wm_coeff_parse_alg(dsp
, &data
, &alg_blk
);
1191 for (i
= 0; i
< alg_blk
.ncoeff
; i
++) {
1192 wm_coeff_parse_coeff(dsp
, &data
, &coeff_blk
);
1194 switch (coeff_blk
.ctl_type
) {
1195 case SNDRV_CTL_ELEM_TYPE_BYTES
:
1198 adsp_err(dsp
, "Unknown control type: %d\n",
1199 coeff_blk
.ctl_type
);
1203 alg_region
.type
= coeff_blk
.mem_type
;
1204 alg_region
.alg
= alg_blk
.id
;
1206 ret
= wm_adsp_create_control(dsp
, &alg_region
,
1213 adsp_err(dsp
, "Failed to create control: %.*s, %d\n",
1214 coeff_blk
.name_len
, coeff_blk
.name
, ret
);
1220 static int wm_adsp_load(struct wm_adsp
*dsp
)
1222 LIST_HEAD(buf_list
);
1223 const struct firmware
*firmware
;
1224 struct regmap
*regmap
= dsp
->regmap
;
1225 unsigned int pos
= 0;
1226 const struct wmfw_header
*header
;
1227 const struct wmfw_adsp1_sizes
*adsp1_sizes
;
1228 const struct wmfw_adsp2_sizes
*adsp2_sizes
;
1229 const struct wmfw_footer
*footer
;
1230 const struct wmfw_region
*region
;
1231 const struct wm_adsp_region
*mem
;
1232 const char *region_name
;
1234 struct wm_adsp_buf
*buf
;
1237 int ret
, offset
, type
, sizes
;
1239 file
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1243 snprintf(file
, PAGE_SIZE
, "%s-dsp%d-%s.wmfw", dsp
->part
, dsp
->num
,
1244 wm_adsp_fw
[dsp
->fw
].file
);
1245 file
[PAGE_SIZE
- 1] = '\0';
1247 ret
= request_firmware(&firmware
, file
, dsp
->dev
);
1249 adsp_err(dsp
, "Failed to request '%s'\n", file
);
1254 pos
= sizeof(*header
) + sizeof(*adsp1_sizes
) + sizeof(*footer
);
1255 if (pos
>= firmware
->size
) {
1256 adsp_err(dsp
, "%s: file too short, %zu bytes\n",
1257 file
, firmware
->size
);
1261 header
= (void *)&firmware
->data
[0];
1263 if (memcmp(&header
->magic
[0], "WMFW", 4) != 0) {
1264 adsp_err(dsp
, "%s: invalid magic\n", file
);
1268 switch (header
->ver
) {
1270 adsp_warn(dsp
, "%s: Depreciated file format %d\n",
1277 adsp_err(dsp
, "%s: unknown file format %d\n",
1282 adsp_info(dsp
, "Firmware version: %d\n", header
->ver
);
1283 dsp
->fw_ver
= header
->ver
;
1285 if (header
->core
!= dsp
->type
) {
1286 adsp_err(dsp
, "%s: invalid core %d != %d\n",
1287 file
, header
->core
, dsp
->type
);
1291 switch (dsp
->type
) {
1293 pos
= sizeof(*header
) + sizeof(*adsp1_sizes
) + sizeof(*footer
);
1294 adsp1_sizes
= (void *)&(header
[1]);
1295 footer
= (void *)&(adsp1_sizes
[1]);
1296 sizes
= sizeof(*adsp1_sizes
);
1298 adsp_dbg(dsp
, "%s: %d DM, %d PM, %d ZM\n",
1299 file
, le32_to_cpu(adsp1_sizes
->dm
),
1300 le32_to_cpu(adsp1_sizes
->pm
),
1301 le32_to_cpu(adsp1_sizes
->zm
));
1305 pos
= sizeof(*header
) + sizeof(*adsp2_sizes
) + sizeof(*footer
);
1306 adsp2_sizes
= (void *)&(header
[1]);
1307 footer
= (void *)&(adsp2_sizes
[1]);
1308 sizes
= sizeof(*adsp2_sizes
);
1310 adsp_dbg(dsp
, "%s: %d XM, %d YM %d PM, %d ZM\n",
1311 file
, le32_to_cpu(adsp2_sizes
->xm
),
1312 le32_to_cpu(adsp2_sizes
->ym
),
1313 le32_to_cpu(adsp2_sizes
->pm
),
1314 le32_to_cpu(adsp2_sizes
->zm
));
1318 WARN(1, "Unknown DSP type");
1322 if (le32_to_cpu(header
->len
) != sizeof(*header
) +
1323 sizes
+ sizeof(*footer
)) {
1324 adsp_err(dsp
, "%s: unexpected header length %d\n",
1325 file
, le32_to_cpu(header
->len
));
1329 adsp_dbg(dsp
, "%s: timestamp %llu\n", file
,
1330 le64_to_cpu(footer
->timestamp
));
1332 while (pos
< firmware
->size
&&
1333 pos
- firmware
->size
> sizeof(*region
)) {
1334 region
= (void *)&(firmware
->data
[pos
]);
1335 region_name
= "Unknown";
1338 offset
= le32_to_cpu(region
->offset
) & 0xffffff;
1339 type
= be32_to_cpu(region
->type
) & 0xff;
1340 mem
= wm_adsp_find_region(dsp
, type
);
1343 case WMFW_NAME_TEXT
:
1344 region_name
= "Firmware name";
1345 text
= kzalloc(le32_to_cpu(region
->len
) + 1,
1348 case WMFW_ALGORITHM_DATA
:
1349 region_name
= "Algorithm";
1350 ret
= wm_adsp_parse_coeff(dsp
, region
);
1354 case WMFW_INFO_TEXT
:
1355 region_name
= "Information";
1356 text
= kzalloc(le32_to_cpu(region
->len
) + 1,
1360 region_name
= "Absolute";
1365 reg
= wm_adsp_region_to_reg(mem
, offset
);
1369 reg
= wm_adsp_region_to_reg(mem
, offset
);
1373 reg
= wm_adsp_region_to_reg(mem
, offset
);
1377 reg
= wm_adsp_region_to_reg(mem
, offset
);
1381 reg
= wm_adsp_region_to_reg(mem
, offset
);
1385 "%s.%d: Unknown region type %x at %d(%x)\n",
1386 file
, regions
, type
, pos
, pos
);
1390 adsp_dbg(dsp
, "%s.%d: %d bytes at %d in %s\n", file
,
1391 regions
, le32_to_cpu(region
->len
), offset
,
1395 memcpy(text
, region
->data
, le32_to_cpu(region
->len
));
1396 adsp_info(dsp
, "%s: %s\n", file
, text
);
1401 buf
= wm_adsp_buf_alloc(region
->data
,
1402 le32_to_cpu(region
->len
),
1405 adsp_err(dsp
, "Out of memory\n");
1410 ret
= regmap_raw_write_async(regmap
, reg
, buf
->buf
,
1411 le32_to_cpu(region
->len
));
1414 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1416 le32_to_cpu(region
->len
), offset
,
1422 pos
+= le32_to_cpu(region
->len
) + sizeof(*region
);
1426 ret
= regmap_async_complete(regmap
);
1428 adsp_err(dsp
, "Failed to complete async write: %d\n", ret
);
1432 if (pos
> firmware
->size
)
1433 adsp_warn(dsp
, "%s.%d: %zu bytes at end of file\n",
1434 file
, regions
, pos
- firmware
->size
);
1436 wm_adsp_debugfs_save_wmfwname(dsp
, file
);
1439 regmap_async_complete(regmap
);
1440 wm_adsp_buf_free(&buf_list
);
1441 release_firmware(firmware
);
1448 static void wm_adsp_ctl_fixup_base(struct wm_adsp
*dsp
,
1449 const struct wm_adsp_alg_region
*alg_region
)
1451 struct wm_coeff_ctl
*ctl
;
1453 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
) {
1454 if (ctl
->fw_name
== wm_adsp_fw_text
[dsp
->fw
] &&
1455 alg_region
->alg
== ctl
->alg_region
.alg
&&
1456 alg_region
->type
== ctl
->alg_region
.type
) {
1457 ctl
->alg_region
.base
= alg_region
->base
;
1462 static void *wm_adsp_read_algs(struct wm_adsp
*dsp
, size_t n_algs
,
1463 unsigned int pos
, unsigned int len
)
1470 adsp_err(dsp
, "No algorithms\n");
1471 return ERR_PTR(-EINVAL
);
1474 if (n_algs
> 1024) {
1475 adsp_err(dsp
, "Algorithm count %zx excessive\n", n_algs
);
1476 return ERR_PTR(-EINVAL
);
1479 /* Read the terminator first to validate the length */
1480 ret
= regmap_raw_read(dsp
->regmap
, pos
+ len
, &val
, sizeof(val
));
1482 adsp_err(dsp
, "Failed to read algorithm list end: %d\n",
1484 return ERR_PTR(ret
);
1487 if (be32_to_cpu(val
) != 0xbedead)
1488 adsp_warn(dsp
, "Algorithm list end %x 0x%x != 0xbeadead\n",
1489 pos
+ len
, be32_to_cpu(val
));
1491 alg
= kzalloc(len
* 2, GFP_KERNEL
| GFP_DMA
);
1493 return ERR_PTR(-ENOMEM
);
1495 ret
= regmap_raw_read(dsp
->regmap
, pos
, alg
, len
* 2);
1497 adsp_err(dsp
, "Failed to read algorithm list: %d\n",
1500 return ERR_PTR(ret
);
1506 static struct wm_adsp_alg_region
*
1507 wm_adsp_find_alg_region(struct wm_adsp
*dsp
, int type
, unsigned int id
)
1509 struct wm_adsp_alg_region
*alg_region
;
1511 list_for_each_entry(alg_region
, &dsp
->alg_regions
, list
) {
1512 if (id
== alg_region
->alg
&& type
== alg_region
->type
)
1519 static struct wm_adsp_alg_region
*wm_adsp_create_region(struct wm_adsp
*dsp
,
1520 int type
, __be32 id
,
1523 struct wm_adsp_alg_region
*alg_region
;
1525 alg_region
= kzalloc(sizeof(*alg_region
), GFP_KERNEL
);
1527 return ERR_PTR(-ENOMEM
);
1529 alg_region
->type
= type
;
1530 alg_region
->alg
= be32_to_cpu(id
);
1531 alg_region
->base
= be32_to_cpu(base
);
1533 list_add_tail(&alg_region
->list
, &dsp
->alg_regions
);
1535 if (dsp
->fw_ver
> 0)
1536 wm_adsp_ctl_fixup_base(dsp
, alg_region
);
1541 static int wm_adsp1_setup_algs(struct wm_adsp
*dsp
)
1543 struct wmfw_adsp1_id_hdr adsp1_id
;
1544 struct wmfw_adsp1_alg_hdr
*adsp1_alg
;
1545 struct wm_adsp_alg_region
*alg_region
;
1546 const struct wm_adsp_region
*mem
;
1547 unsigned int pos
, len
;
1551 mem
= wm_adsp_find_region(dsp
, WMFW_ADSP1_DM
);
1555 ret
= regmap_raw_read(dsp
->regmap
, mem
->base
, &adsp1_id
,
1558 adsp_err(dsp
, "Failed to read algorithm info: %d\n",
1563 n_algs
= be32_to_cpu(adsp1_id
.n_algs
);
1564 dsp
->fw_id
= be32_to_cpu(adsp1_id
.fw
.id
);
1565 adsp_info(dsp
, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1567 (be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff0000) >> 16,
1568 (be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff00) >> 8,
1569 be32_to_cpu(adsp1_id
.fw
.ver
) & 0xff,
1572 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_ZM
,
1573 adsp1_id
.fw
.id
, adsp1_id
.zm
);
1574 if (IS_ERR(alg_region
))
1575 return PTR_ERR(alg_region
);
1577 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_DM
,
1578 adsp1_id
.fw
.id
, adsp1_id
.dm
);
1579 if (IS_ERR(alg_region
))
1580 return PTR_ERR(alg_region
);
1582 pos
= sizeof(adsp1_id
) / 2;
1583 len
= (sizeof(*adsp1_alg
) * n_algs
) / 2;
1585 adsp1_alg
= wm_adsp_read_algs(dsp
, n_algs
, mem
->base
+ pos
, len
);
1586 if (IS_ERR(adsp1_alg
))
1587 return PTR_ERR(adsp1_alg
);
1589 for (i
= 0; i
< n_algs
; i
++) {
1590 adsp_info(dsp
, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1591 i
, be32_to_cpu(adsp1_alg
[i
].alg
.id
),
1592 (be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff0000) >> 16,
1593 (be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff00) >> 8,
1594 be32_to_cpu(adsp1_alg
[i
].alg
.ver
) & 0xff,
1595 be32_to_cpu(adsp1_alg
[i
].dm
),
1596 be32_to_cpu(adsp1_alg
[i
].zm
));
1598 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_DM
,
1599 adsp1_alg
[i
].alg
.id
,
1601 if (IS_ERR(alg_region
)) {
1602 ret
= PTR_ERR(alg_region
);
1605 if (dsp
->fw_ver
== 0) {
1606 if (i
+ 1 < n_algs
) {
1607 len
= be32_to_cpu(adsp1_alg
[i
+ 1].dm
);
1608 len
-= be32_to_cpu(adsp1_alg
[i
].dm
);
1610 wm_adsp_create_control(dsp
, alg_region
, 0,
1613 adsp_warn(dsp
, "Missing length info for region DM with ID %x\n",
1614 be32_to_cpu(adsp1_alg
[i
].alg
.id
));
1618 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP1_ZM
,
1619 adsp1_alg
[i
].alg
.id
,
1621 if (IS_ERR(alg_region
)) {
1622 ret
= PTR_ERR(alg_region
);
1625 if (dsp
->fw_ver
== 0) {
1626 if (i
+ 1 < n_algs
) {
1627 len
= be32_to_cpu(adsp1_alg
[i
+ 1].zm
);
1628 len
-= be32_to_cpu(adsp1_alg
[i
].zm
);
1630 wm_adsp_create_control(dsp
, alg_region
, 0,
1633 adsp_warn(dsp
, "Missing length info for region ZM with ID %x\n",
1634 be32_to_cpu(adsp1_alg
[i
].alg
.id
));
1644 static int wm_adsp2_setup_algs(struct wm_adsp
*dsp
)
1646 struct wmfw_adsp2_id_hdr adsp2_id
;
1647 struct wmfw_adsp2_alg_hdr
*adsp2_alg
;
1648 struct wm_adsp_alg_region
*alg_region
;
1649 const struct wm_adsp_region
*mem
;
1650 unsigned int pos
, len
;
1654 mem
= wm_adsp_find_region(dsp
, WMFW_ADSP2_XM
);
1658 ret
= regmap_raw_read(dsp
->regmap
, mem
->base
, &adsp2_id
,
1661 adsp_err(dsp
, "Failed to read algorithm info: %d\n",
1666 n_algs
= be32_to_cpu(adsp2_id
.n_algs
);
1667 dsp
->fw_id
= be32_to_cpu(adsp2_id
.fw
.id
);
1668 dsp
->fw_id_version
= be32_to_cpu(adsp2_id
.fw
.ver
);
1669 adsp_info(dsp
, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1671 (dsp
->fw_id_version
& 0xff0000) >> 16,
1672 (dsp
->fw_id_version
& 0xff00) >> 8,
1673 dsp
->fw_id_version
& 0xff,
1676 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_XM
,
1677 adsp2_id
.fw
.id
, adsp2_id
.xm
);
1678 if (IS_ERR(alg_region
))
1679 return PTR_ERR(alg_region
);
1681 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_YM
,
1682 adsp2_id
.fw
.id
, adsp2_id
.ym
);
1683 if (IS_ERR(alg_region
))
1684 return PTR_ERR(alg_region
);
1686 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_ZM
,
1687 adsp2_id
.fw
.id
, adsp2_id
.zm
);
1688 if (IS_ERR(alg_region
))
1689 return PTR_ERR(alg_region
);
1691 pos
= sizeof(adsp2_id
) / 2;
1692 len
= (sizeof(*adsp2_alg
) * n_algs
) / 2;
1694 adsp2_alg
= wm_adsp_read_algs(dsp
, n_algs
, mem
->base
+ pos
, len
);
1695 if (IS_ERR(adsp2_alg
))
1696 return PTR_ERR(adsp2_alg
);
1698 for (i
= 0; i
< n_algs
; i
++) {
1700 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1701 i
, be32_to_cpu(adsp2_alg
[i
].alg
.id
),
1702 (be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff0000) >> 16,
1703 (be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff00) >> 8,
1704 be32_to_cpu(adsp2_alg
[i
].alg
.ver
) & 0xff,
1705 be32_to_cpu(adsp2_alg
[i
].xm
),
1706 be32_to_cpu(adsp2_alg
[i
].ym
),
1707 be32_to_cpu(adsp2_alg
[i
].zm
));
1709 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_XM
,
1710 adsp2_alg
[i
].alg
.id
,
1712 if (IS_ERR(alg_region
)) {
1713 ret
= PTR_ERR(alg_region
);
1716 if (dsp
->fw_ver
== 0) {
1717 if (i
+ 1 < n_algs
) {
1718 len
= be32_to_cpu(adsp2_alg
[i
+ 1].xm
);
1719 len
-= be32_to_cpu(adsp2_alg
[i
].xm
);
1721 wm_adsp_create_control(dsp
, alg_region
, 0,
1724 adsp_warn(dsp
, "Missing length info for region XM with ID %x\n",
1725 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
1729 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_YM
,
1730 adsp2_alg
[i
].alg
.id
,
1732 if (IS_ERR(alg_region
)) {
1733 ret
= PTR_ERR(alg_region
);
1736 if (dsp
->fw_ver
== 0) {
1737 if (i
+ 1 < n_algs
) {
1738 len
= be32_to_cpu(adsp2_alg
[i
+ 1].ym
);
1739 len
-= be32_to_cpu(adsp2_alg
[i
].ym
);
1741 wm_adsp_create_control(dsp
, alg_region
, 0,
1744 adsp_warn(dsp
, "Missing length info for region YM with ID %x\n",
1745 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
1749 alg_region
= wm_adsp_create_region(dsp
, WMFW_ADSP2_ZM
,
1750 adsp2_alg
[i
].alg
.id
,
1752 if (IS_ERR(alg_region
)) {
1753 ret
= PTR_ERR(alg_region
);
1756 if (dsp
->fw_ver
== 0) {
1757 if (i
+ 1 < n_algs
) {
1758 len
= be32_to_cpu(adsp2_alg
[i
+ 1].zm
);
1759 len
-= be32_to_cpu(adsp2_alg
[i
].zm
);
1761 wm_adsp_create_control(dsp
, alg_region
, 0,
1764 adsp_warn(dsp
, "Missing length info for region ZM with ID %x\n",
1765 be32_to_cpu(adsp2_alg
[i
].alg
.id
));
1775 static int wm_adsp_load_coeff(struct wm_adsp
*dsp
)
1777 LIST_HEAD(buf_list
);
1778 struct regmap
*regmap
= dsp
->regmap
;
1779 struct wmfw_coeff_hdr
*hdr
;
1780 struct wmfw_coeff_item
*blk
;
1781 const struct firmware
*firmware
;
1782 const struct wm_adsp_region
*mem
;
1783 struct wm_adsp_alg_region
*alg_region
;
1784 const char *region_name
;
1785 int ret
, pos
, blocks
, type
, offset
, reg
;
1787 struct wm_adsp_buf
*buf
;
1789 file
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1793 snprintf(file
, PAGE_SIZE
, "%s-dsp%d-%s.bin", dsp
->part
, dsp
->num
,
1794 wm_adsp_fw
[dsp
->fw
].file
);
1795 file
[PAGE_SIZE
- 1] = '\0';
1797 ret
= request_firmware(&firmware
, file
, dsp
->dev
);
1799 adsp_warn(dsp
, "Failed to request '%s'\n", file
);
1805 if (sizeof(*hdr
) >= firmware
->size
) {
1806 adsp_err(dsp
, "%s: file too short, %zu bytes\n",
1807 file
, firmware
->size
);
1811 hdr
= (void *)&firmware
->data
[0];
1812 if (memcmp(hdr
->magic
, "WMDR", 4) != 0) {
1813 adsp_err(dsp
, "%s: invalid magic\n", file
);
1817 switch (be32_to_cpu(hdr
->rev
) & 0xff) {
1821 adsp_err(dsp
, "%s: Unsupported coefficient file format %d\n",
1822 file
, be32_to_cpu(hdr
->rev
) & 0xff);
1827 adsp_dbg(dsp
, "%s: v%d.%d.%d\n", file
,
1828 (le32_to_cpu(hdr
->ver
) >> 16) & 0xff,
1829 (le32_to_cpu(hdr
->ver
) >> 8) & 0xff,
1830 le32_to_cpu(hdr
->ver
) & 0xff);
1832 pos
= le32_to_cpu(hdr
->len
);
1835 while (pos
< firmware
->size
&&
1836 pos
- firmware
->size
> sizeof(*blk
)) {
1837 blk
= (void *)(&firmware
->data
[pos
]);
1839 type
= le16_to_cpu(blk
->type
);
1840 offset
= le16_to_cpu(blk
->offset
);
1842 adsp_dbg(dsp
, "%s.%d: %x v%d.%d.%d\n",
1843 file
, blocks
, le32_to_cpu(blk
->id
),
1844 (le32_to_cpu(blk
->ver
) >> 16) & 0xff,
1845 (le32_to_cpu(blk
->ver
) >> 8) & 0xff,
1846 le32_to_cpu(blk
->ver
) & 0xff);
1847 adsp_dbg(dsp
, "%s.%d: %d bytes at 0x%x in %x\n",
1848 file
, blocks
, le32_to_cpu(blk
->len
), offset
, type
);
1851 region_name
= "Unknown";
1853 case (WMFW_NAME_TEXT
<< 8):
1854 case (WMFW_INFO_TEXT
<< 8):
1856 case (WMFW_ABSOLUTE
<< 8):
1858 * Old files may use this for global
1861 if (le32_to_cpu(blk
->id
) == dsp
->fw_id
&&
1863 region_name
= "global coefficients";
1864 mem
= wm_adsp_find_region(dsp
, type
);
1866 adsp_err(dsp
, "No ZM\n");
1869 reg
= wm_adsp_region_to_reg(mem
, 0);
1872 region_name
= "register";
1881 adsp_dbg(dsp
, "%s.%d: %d bytes in %x for %x\n",
1882 file
, blocks
, le32_to_cpu(blk
->len
),
1883 type
, le32_to_cpu(blk
->id
));
1885 mem
= wm_adsp_find_region(dsp
, type
);
1887 adsp_err(dsp
, "No base for region %x\n", type
);
1891 alg_region
= wm_adsp_find_alg_region(dsp
, type
,
1892 le32_to_cpu(blk
->id
));
1894 reg
= alg_region
->base
;
1895 reg
= wm_adsp_region_to_reg(mem
, reg
);
1898 adsp_err(dsp
, "No %x for algorithm %x\n",
1899 type
, le32_to_cpu(blk
->id
));
1904 adsp_err(dsp
, "%s.%d: Unknown region type %x at %d\n",
1905 file
, blocks
, type
, pos
);
1910 buf
= wm_adsp_buf_alloc(blk
->data
,
1911 le32_to_cpu(blk
->len
),
1914 adsp_err(dsp
, "Out of memory\n");
1919 adsp_dbg(dsp
, "%s.%d: Writing %d bytes at %x\n",
1920 file
, blocks
, le32_to_cpu(blk
->len
),
1922 ret
= regmap_raw_write_async(regmap
, reg
, buf
->buf
,
1923 le32_to_cpu(blk
->len
));
1926 "%s.%d: Failed to write to %x in %s: %d\n",
1927 file
, blocks
, reg
, region_name
, ret
);
1931 pos
+= (le32_to_cpu(blk
->len
) + sizeof(*blk
) + 3) & ~0x03;
1935 ret
= regmap_async_complete(regmap
);
1937 adsp_err(dsp
, "Failed to complete async write: %d\n", ret
);
1939 if (pos
> firmware
->size
)
1940 adsp_warn(dsp
, "%s.%d: %zu bytes at end of file\n",
1941 file
, blocks
, pos
- firmware
->size
);
1943 wm_adsp_debugfs_save_binname(dsp
, file
);
1946 regmap_async_complete(regmap
);
1947 release_firmware(firmware
);
1948 wm_adsp_buf_free(&buf_list
);
1954 int wm_adsp1_init(struct wm_adsp
*dsp
)
1956 INIT_LIST_HEAD(&dsp
->alg_regions
);
1958 mutex_init(&dsp
->pwr_lock
);
1962 EXPORT_SYMBOL_GPL(wm_adsp1_init
);
1964 int wm_adsp1_event(struct snd_soc_dapm_widget
*w
,
1965 struct snd_kcontrol
*kcontrol
,
1968 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1969 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
1970 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
1971 struct wm_adsp_alg_region
*alg_region
;
1972 struct wm_coeff_ctl
*ctl
;
1976 dsp
->card
= codec
->component
.card
;
1978 mutex_lock(&dsp
->pwr_lock
);
1981 case SND_SOC_DAPM_POST_PMU
:
1982 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
1983 ADSP1_SYS_ENA
, ADSP1_SYS_ENA
);
1986 * For simplicity set the DSP clock rate to be the
1987 * SYSCLK rate rather than making it configurable.
1989 if (dsp
->sysclk_reg
) {
1990 ret
= regmap_read(dsp
->regmap
, dsp
->sysclk_reg
, &val
);
1992 adsp_err(dsp
, "Failed to read SYSCLK state: %d\n",
1997 val
= (val
& dsp
->sysclk_mask
)
1998 >> dsp
->sysclk_shift
;
2000 ret
= regmap_update_bits(dsp
->regmap
,
2001 dsp
->base
+ ADSP1_CONTROL_31
,
2002 ADSP1_CLK_SEL_MASK
, val
);
2004 adsp_err(dsp
, "Failed to set clock rate: %d\n",
2010 ret
= wm_adsp_load(dsp
);
2014 ret
= wm_adsp1_setup_algs(dsp
);
2018 ret
= wm_adsp_load_coeff(dsp
);
2022 /* Initialize caches for enabled and unset controls */
2023 ret
= wm_coeff_init_control_caches(dsp
);
2027 /* Sync set controls */
2028 ret
= wm_coeff_sync_controls(dsp
);
2032 /* Start the core running */
2033 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2034 ADSP1_CORE_ENA
| ADSP1_START
,
2035 ADSP1_CORE_ENA
| ADSP1_START
);
2038 case SND_SOC_DAPM_PRE_PMD
:
2040 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2041 ADSP1_CORE_ENA
| ADSP1_START
, 0);
2043 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_19
,
2044 ADSP1_WDMA_BUFFER_LENGTH_MASK
, 0);
2046 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2049 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
)
2052 while (!list_empty(&dsp
->alg_regions
)) {
2053 alg_region
= list_first_entry(&dsp
->alg_regions
,
2054 struct wm_adsp_alg_region
,
2056 list_del(&alg_region
->list
);
2065 mutex_unlock(&dsp
->pwr_lock
);
2070 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP1_CONTROL_30
,
2073 mutex_unlock(&dsp
->pwr_lock
);
2077 EXPORT_SYMBOL_GPL(wm_adsp1_event
);
2079 static int wm_adsp2_ena(struct wm_adsp
*dsp
)
2084 ret
= regmap_update_bits_async(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2085 ADSP2_SYS_ENA
, ADSP2_SYS_ENA
);
2089 /* Wait for the RAM to start, should be near instantaneous */
2090 for (count
= 0; count
< 10; ++count
) {
2091 ret
= regmap_read(dsp
->regmap
, dsp
->base
+ ADSP2_STATUS1
,
2096 if (val
& ADSP2_RAM_RDY
)
2102 if (!(val
& ADSP2_RAM_RDY
)) {
2103 adsp_err(dsp
, "Failed to start DSP RAM\n");
2107 adsp_dbg(dsp
, "RAM ready after %d polls\n", count
);
2112 static void wm_adsp2_boot_work(struct work_struct
*work
)
2114 struct wm_adsp
*dsp
= container_of(work
,
2120 mutex_lock(&dsp
->pwr_lock
);
2123 * For simplicity set the DSP clock rate to be the
2124 * SYSCLK rate rather than making it configurable.
2126 ret
= regmap_read(dsp
->regmap
, ARIZONA_SYSTEM_CLOCK_1
, &val
);
2128 adsp_err(dsp
, "Failed to read SYSCLK state: %d\n", ret
);
2131 val
= (val
& ARIZONA_SYSCLK_FREQ_MASK
)
2132 >> ARIZONA_SYSCLK_FREQ_SHIFT
;
2134 ret
= regmap_update_bits_async(dsp
->regmap
,
2135 dsp
->base
+ ADSP2_CLOCKING
,
2136 ADSP2_CLK_SEL_MASK
, val
);
2138 adsp_err(dsp
, "Failed to set clock rate: %d\n", ret
);
2142 ret
= wm_adsp2_ena(dsp
);
2146 ret
= wm_adsp_load(dsp
);
2150 ret
= wm_adsp2_setup_algs(dsp
);
2154 ret
= wm_adsp_load_coeff(dsp
);
2158 /* Initialize caches for enabled and unset controls */
2159 ret
= wm_coeff_init_control_caches(dsp
);
2163 /* Sync set controls */
2164 ret
= wm_coeff_sync_controls(dsp
);
2168 dsp
->running
= true;
2170 mutex_unlock(&dsp
->pwr_lock
);
2175 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2176 ADSP2_SYS_ENA
| ADSP2_CORE_ENA
| ADSP2_START
, 0);
2178 mutex_unlock(&dsp
->pwr_lock
);
2181 int wm_adsp2_early_event(struct snd_soc_dapm_widget
*w
,
2182 struct snd_kcontrol
*kcontrol
, int event
)
2184 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
2185 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
2186 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
2188 dsp
->card
= codec
->component
.card
;
2191 case SND_SOC_DAPM_PRE_PMU
:
2192 queue_work(system_unbound_wq
, &dsp
->boot_work
);
2200 EXPORT_SYMBOL_GPL(wm_adsp2_early_event
);
2202 int wm_adsp2_event(struct snd_soc_dapm_widget
*w
,
2203 struct snd_kcontrol
*kcontrol
, int event
)
2205 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
2206 struct wm_adsp
*dsps
= snd_soc_codec_get_drvdata(codec
);
2207 struct wm_adsp
*dsp
= &dsps
[w
->shift
];
2208 struct wm_adsp_alg_region
*alg_region
;
2209 struct wm_coeff_ctl
*ctl
;
2213 case SND_SOC_DAPM_POST_PMU
:
2214 flush_work(&dsp
->boot_work
);
2219 ret
= regmap_update_bits(dsp
->regmap
,
2220 dsp
->base
+ ADSP2_CONTROL
,
2221 ADSP2_CORE_ENA
| ADSP2_START
,
2222 ADSP2_CORE_ENA
| ADSP2_START
);
2226 if (wm_adsp_fw
[dsp
->fw
].num_caps
!= 0)
2227 ret
= wm_adsp_buffer_init(dsp
);
2231 case SND_SOC_DAPM_PRE_PMD
:
2232 /* Log firmware state, it can be useful for analysis */
2233 wm_adsp2_show_fw_status(dsp
);
2235 mutex_lock(&dsp
->pwr_lock
);
2237 wm_adsp_debugfs_clear(dsp
);
2240 dsp
->fw_id_version
= 0;
2241 dsp
->running
= false;
2243 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2244 ADSP2_SYS_ENA
| ADSP2_CORE_ENA
|
2247 /* Make sure DMAs are quiesced */
2248 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_WDMA_CONFIG_1
, 0);
2249 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_WDMA_CONFIG_2
, 0);
2250 regmap_write(dsp
->regmap
, dsp
->base
+ ADSP2_RDMA_CONFIG_1
, 0);
2252 list_for_each_entry(ctl
, &dsp
->ctl_list
, list
)
2255 while (!list_empty(&dsp
->alg_regions
)) {
2256 alg_region
= list_first_entry(&dsp
->alg_regions
,
2257 struct wm_adsp_alg_region
,
2259 list_del(&alg_region
->list
);
2263 if (wm_adsp_fw
[dsp
->fw
].num_caps
!= 0)
2264 wm_adsp_buffer_free(dsp
);
2266 mutex_unlock(&dsp
->pwr_lock
);
2268 adsp_dbg(dsp
, "Shutdown complete\n");
2277 regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2278 ADSP2_SYS_ENA
| ADSP2_CORE_ENA
| ADSP2_START
, 0);
2281 EXPORT_SYMBOL_GPL(wm_adsp2_event
);
2283 int wm_adsp2_codec_probe(struct wm_adsp
*dsp
, struct snd_soc_codec
*codec
)
2285 wm_adsp2_init_debugfs(dsp
, codec
);
2287 return snd_soc_add_codec_controls(codec
,
2288 &wm_adsp_fw_controls
[dsp
->num
- 1],
2291 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe
);
2293 int wm_adsp2_codec_remove(struct wm_adsp
*dsp
, struct snd_soc_codec
*codec
)
2295 wm_adsp2_cleanup_debugfs(dsp
);
2299 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove
);
2301 int wm_adsp2_init(struct wm_adsp
*dsp
)
2306 * Disable the DSP memory by default when in reset for a small
2309 ret
= regmap_update_bits(dsp
->regmap
, dsp
->base
+ ADSP2_CONTROL
,
2312 adsp_err(dsp
, "Failed to clear memory retention: %d\n", ret
);
2316 INIT_LIST_HEAD(&dsp
->alg_regions
);
2317 INIT_LIST_HEAD(&dsp
->ctl_list
);
2318 INIT_WORK(&dsp
->boot_work
, wm_adsp2_boot_work
);
2320 mutex_init(&dsp
->pwr_lock
);
2324 EXPORT_SYMBOL_GPL(wm_adsp2_init
);
2326 int wm_adsp_compr_open(struct wm_adsp
*dsp
, struct snd_compr_stream
*stream
)
2328 struct wm_adsp_compr
*compr
;
2331 mutex_lock(&dsp
->pwr_lock
);
2333 if (wm_adsp_fw
[dsp
->fw
].num_caps
== 0) {
2334 adsp_err(dsp
, "Firmware does not support compressed API\n");
2339 if (wm_adsp_fw
[dsp
->fw
].compr_direction
!= stream
->direction
) {
2340 adsp_err(dsp
, "Firmware does not support stream direction\n");
2346 /* It is expect this limitation will be removed in future */
2347 adsp_err(dsp
, "Only a single stream supported per DSP\n");
2352 compr
= kzalloc(sizeof(*compr
), GFP_KERNEL
);
2359 compr
->stream
= stream
;
2363 stream
->runtime
->private_data
= compr
;
2366 mutex_unlock(&dsp
->pwr_lock
);
2370 EXPORT_SYMBOL_GPL(wm_adsp_compr_open
);
2372 int wm_adsp_compr_free(struct snd_compr_stream
*stream
)
2374 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2375 struct wm_adsp
*dsp
= compr
->dsp
;
2377 mutex_lock(&dsp
->pwr_lock
);
2383 mutex_unlock(&dsp
->pwr_lock
);
2387 EXPORT_SYMBOL_GPL(wm_adsp_compr_free
);
2389 static int wm_adsp_compr_check_params(struct snd_compr_stream
*stream
,
2390 struct snd_compr_params
*params
)
2392 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2393 struct wm_adsp
*dsp
= compr
->dsp
;
2394 const struct wm_adsp_fw_caps
*caps
;
2395 const struct snd_codec_desc
*desc
;
2398 if (params
->buffer
.fragment_size
< WM_ADSP_MIN_FRAGMENT_SIZE
||
2399 params
->buffer
.fragment_size
> WM_ADSP_MAX_FRAGMENT_SIZE
||
2400 params
->buffer
.fragments
< WM_ADSP_MIN_FRAGMENTS
||
2401 params
->buffer
.fragments
> WM_ADSP_MAX_FRAGMENTS
||
2402 params
->buffer
.fragment_size
% WM_ADSP_DATA_WORD_SIZE
) {
2403 adsp_err(dsp
, "Invalid buffer fragsize=%d fragments=%d\n",
2404 params
->buffer
.fragment_size
,
2405 params
->buffer
.fragments
);
2410 for (i
= 0; i
< wm_adsp_fw
[dsp
->fw
].num_caps
; i
++) {
2411 caps
= &wm_adsp_fw
[dsp
->fw
].caps
[i
];
2414 if (caps
->id
!= params
->codec
.id
)
2417 if (stream
->direction
== SND_COMPRESS_PLAYBACK
) {
2418 if (desc
->max_ch
< params
->codec
.ch_out
)
2421 if (desc
->max_ch
< params
->codec
.ch_in
)
2425 if (!(desc
->formats
& (1 << params
->codec
.format
)))
2428 for (j
= 0; j
< desc
->num_sample_rates
; ++j
)
2429 if (desc
->sample_rates
[j
] == params
->codec
.sample_rate
)
2433 adsp_err(dsp
, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2434 params
->codec
.id
, params
->codec
.ch_in
, params
->codec
.ch_out
,
2435 params
->codec
.sample_rate
, params
->codec
.format
);
2439 int wm_adsp_compr_set_params(struct snd_compr_stream
*stream
,
2440 struct snd_compr_params
*params
)
2442 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2445 ret
= wm_adsp_compr_check_params(stream
, params
);
2449 compr
->size
= params
->buffer
;
2451 adsp_dbg(compr
->dsp
, "fragment_size=%d fragments=%d\n",
2452 compr
->size
.fragment_size
, compr
->size
.fragments
);
2456 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params
);
2458 int wm_adsp_compr_get_caps(struct snd_compr_stream
*stream
,
2459 struct snd_compr_caps
*caps
)
2461 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2462 int fw
= compr
->dsp
->fw
;
2465 if (wm_adsp_fw
[fw
].caps
) {
2466 for (i
= 0; i
< wm_adsp_fw
[fw
].num_caps
; i
++)
2467 caps
->codecs
[i
] = wm_adsp_fw
[fw
].caps
[i
].id
;
2469 caps
->num_codecs
= i
;
2470 caps
->direction
= wm_adsp_fw
[fw
].compr_direction
;
2472 caps
->min_fragment_size
= WM_ADSP_MIN_FRAGMENT_SIZE
;
2473 caps
->max_fragment_size
= WM_ADSP_MAX_FRAGMENT_SIZE
;
2474 caps
->min_fragments
= WM_ADSP_MIN_FRAGMENTS
;
2475 caps
->max_fragments
= WM_ADSP_MAX_FRAGMENTS
;
2480 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps
);
2482 static int wm_adsp_read_data_block(struct wm_adsp
*dsp
, int mem_type
,
2483 unsigned int mem_addr
,
2484 unsigned int num_words
, u32
*data
)
2486 struct wm_adsp_region
const *mem
= wm_adsp_find_region(dsp
, mem_type
);
2487 unsigned int i
, reg
;
2493 reg
= wm_adsp_region_to_reg(mem
, mem_addr
);
2495 ret
= regmap_raw_read(dsp
->regmap
, reg
, data
,
2496 sizeof(*data
) * num_words
);
2500 for (i
= 0; i
< num_words
; ++i
)
2501 data
[i
] = be32_to_cpu(data
[i
]) & 0x00ffffffu
;
2506 static inline int wm_adsp_read_data_word(struct wm_adsp
*dsp
, int mem_type
,
2507 unsigned int mem_addr
, u32
*data
)
2509 return wm_adsp_read_data_block(dsp
, mem_type
, mem_addr
, 1, data
);
2512 static int wm_adsp_write_data_word(struct wm_adsp
*dsp
, int mem_type
,
2513 unsigned int mem_addr
, u32 data
)
2515 struct wm_adsp_region
const *mem
= wm_adsp_find_region(dsp
, mem_type
);
2521 reg
= wm_adsp_region_to_reg(mem
, mem_addr
);
2523 data
= cpu_to_be32(data
& 0x00ffffffu
);
2525 return regmap_raw_write(dsp
->regmap
, reg
, &data
, sizeof(data
));
2528 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf
*buf
,
2529 unsigned int field_offset
, u32
*data
)
2531 return wm_adsp_read_data_word(buf
->dsp
, WMFW_ADSP2_XM
,
2532 buf
->host_buf_ptr
+ field_offset
, data
);
2535 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf
*buf
,
2536 unsigned int field_offset
, u32 data
)
2538 return wm_adsp_write_data_word(buf
->dsp
, WMFW_ADSP2_XM
,
2539 buf
->host_buf_ptr
+ field_offset
, data
);
2542 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf
*buf
)
2544 struct wm_adsp_alg_region
*alg_region
;
2545 struct wm_adsp
*dsp
= buf
->dsp
;
2546 u32 xmalg
, addr
, magic
;
2549 alg_region
= wm_adsp_find_alg_region(dsp
, WMFW_ADSP2_XM
, dsp
->fw_id
);
2550 xmalg
= sizeof(struct wm_adsp_system_config_xm_hdr
) / sizeof(__be32
);
2552 addr
= alg_region
->base
+ xmalg
+ ALG_XM_FIELD(magic
);
2553 ret
= wm_adsp_read_data_word(dsp
, WMFW_ADSP2_XM
, addr
, &magic
);
2557 if (magic
!= WM_ADSP_ALG_XM_STRUCT_MAGIC
)
2560 addr
= alg_region
->base
+ xmalg
+ ALG_XM_FIELD(host_buf_ptr
);
2561 for (i
= 0; i
< 5; ++i
) {
2562 ret
= wm_adsp_read_data_word(dsp
, WMFW_ADSP2_XM
, addr
,
2563 &buf
->host_buf_ptr
);
2567 if (buf
->host_buf_ptr
)
2570 usleep_range(1000, 2000);
2573 if (!buf
->host_buf_ptr
)
2576 adsp_dbg(dsp
, "host_buf_ptr=%x\n", buf
->host_buf_ptr
);
2581 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf
*buf
)
2583 const struct wm_adsp_fw_caps
*caps
= wm_adsp_fw
[buf
->dsp
->fw
].caps
;
2584 struct wm_adsp_buffer_region
*region
;
2588 for (i
= 0; i
< caps
->num_regions
; ++i
) {
2589 region
= &buf
->regions
[i
];
2591 region
->offset
= offset
;
2592 region
->mem_type
= caps
->region_defs
[i
].mem_type
;
2594 ret
= wm_adsp_buffer_read(buf
, caps
->region_defs
[i
].base_offset
,
2595 ®ion
->base_addr
);
2599 ret
= wm_adsp_buffer_read(buf
, caps
->region_defs
[i
].size_offset
,
2604 region
->cumulative_size
= offset
;
2607 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2608 i
, region
->mem_type
, region
->base_addr
,
2609 region
->offset
, region
->cumulative_size
);
2615 static int wm_adsp_buffer_init(struct wm_adsp
*dsp
)
2617 struct wm_adsp_compr_buf
*buf
;
2620 buf
= kzalloc(sizeof(*buf
), GFP_KERNEL
);
2626 ret
= wm_adsp_buffer_locate(buf
);
2628 adsp_err(dsp
, "Failed to acquire host buffer: %d\n", ret
);
2632 buf
->regions
= kcalloc(wm_adsp_fw
[dsp
->fw
].caps
->num_regions
,
2633 sizeof(*buf
->regions
), GFP_KERNEL
);
2634 if (!buf
->regions
) {
2639 ret
= wm_adsp_buffer_populate(buf
);
2641 adsp_err(dsp
, "Failed to populate host buffer: %d\n", ret
);
2650 kfree(buf
->regions
);
2656 static int wm_adsp_buffer_free(struct wm_adsp
*dsp
)
2659 kfree(dsp
->buffer
->regions
);
2668 static inline int wm_adsp_compr_attached(struct wm_adsp_compr
*compr
)
2670 return compr
->buf
!= NULL
;
2673 static int wm_adsp_compr_attach(struct wm_adsp_compr
*compr
)
2676 * Note this will be more complex once each DSP can support multiple
2679 if (!compr
->dsp
->buffer
)
2682 compr
->buf
= compr
->dsp
->buffer
;
2687 int wm_adsp_compr_trigger(struct snd_compr_stream
*stream
, int cmd
)
2689 struct wm_adsp_compr
*compr
= stream
->runtime
->private_data
;
2690 struct wm_adsp
*dsp
= compr
->dsp
;
2693 adsp_dbg(dsp
, "Trigger: %d\n", cmd
);
2695 mutex_lock(&dsp
->pwr_lock
);
2698 case SNDRV_PCM_TRIGGER_START
:
2699 if (wm_adsp_compr_attached(compr
))
2702 ret
= wm_adsp_compr_attach(compr
);
2704 adsp_err(dsp
, "Failed to link buffer and stream: %d\n",
2709 case SNDRV_PCM_TRIGGER_STOP
:
2716 mutex_unlock(&dsp
->pwr_lock
);
2720 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger
);
2722 MODULE_LICENSE("GPL v2");