2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
5 * Copyright (C) 2015 Intel Corp
6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
7 * Jeeja KP <jeeja.kp@intel.com>
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include "skl-sst-dsp.h"
25 #include "skl-sst-ipc.h"
27 #include "../common/sst-dsp.h"
28 #include "../common/sst-dsp-priv.h"
29 #include "skl-topology.h"
30 #include "skl-tplg-interface.h"
32 static int skl_alloc_dma_buf(struct device
*dev
,
33 struct snd_dma_buffer
*dmab
, size_t size
)
35 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
36 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
41 return bus
->io_ops
->dma_alloc_pages(bus
, SNDRV_DMA_TYPE_DEV
, size
, dmab
);
44 static int skl_free_dma_buf(struct device
*dev
, struct snd_dma_buffer
*dmab
)
46 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
47 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
52 bus
->io_ops
->dma_free_pages(bus
, dmab
);
57 #define NOTIFICATION_PARAM_ID 3
58 #define NOTIFICATION_MASK 0xf
60 /* disable notfication for underruns/overruns from firmware module */
61 static void skl_dsp_enable_notification(struct skl_sst
*ctx
, bool enable
)
63 struct notification_mask mask
;
64 struct skl_ipc_large_config_msg msg
= {0};
66 mask
.notify
= NOTIFICATION_MASK
;
69 msg
.large_param_id
= NOTIFICATION_PARAM_ID
;
70 msg
.param_data_size
= sizeof(mask
);
72 skl_ipc_set_large_config(&ctx
->ipc
, &msg
, (u32
*)&mask
);
75 static int skl_dsp_setup_spib(struct device
*dev
, unsigned int size
,
76 int stream_tag
, int enable
)
78 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
79 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
80 struct hdac_stream
*stream
= snd_hdac_get_stream(bus
,
81 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
82 struct hdac_ext_stream
*estream
;
87 estream
= stream_to_hdac_ext_stream(stream
);
88 /* enable/disable SPIB for this hdac stream */
89 snd_hdac_ext_stream_spbcap_enable(ebus
, enable
, stream
->index
);
91 /* set the spib value */
92 snd_hdac_ext_stream_set_spib(ebus
, estream
, size
);
97 static int skl_dsp_prepare(struct device
*dev
, unsigned int format
,
98 unsigned int size
, struct snd_dma_buffer
*dmab
)
100 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
101 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
102 struct hdac_ext_stream
*estream
;
103 struct hdac_stream
*stream
;
104 struct snd_pcm_substream substream
;
110 memset(&substream
, 0, sizeof(substream
));
111 substream
.stream
= SNDRV_PCM_STREAM_PLAYBACK
;
113 estream
= snd_hdac_ext_stream_assign(ebus
, &substream
,
114 HDAC_EXT_STREAM_TYPE_HOST
);
118 stream
= hdac_stream(estream
);
120 /* assign decouple host dma channel */
121 ret
= snd_hdac_dsp_prepare(stream
, format
, size
, dmab
);
125 skl_dsp_setup_spib(dev
, size
, stream
->stream_tag
, true);
127 return stream
->stream_tag
;
130 static int skl_dsp_trigger(struct device
*dev
, bool start
, int stream_tag
)
132 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
133 struct hdac_stream
*stream
;
134 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
139 stream
= snd_hdac_get_stream(bus
,
140 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
144 snd_hdac_dsp_trigger(stream
, start
);
149 static int skl_dsp_cleanup(struct device
*dev
,
150 struct snd_dma_buffer
*dmab
, int stream_tag
)
152 struct hdac_ext_bus
*ebus
= dev_get_drvdata(dev
);
153 struct hdac_stream
*stream
;
154 struct hdac_ext_stream
*estream
;
155 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
160 stream
= snd_hdac_get_stream(bus
,
161 SNDRV_PCM_STREAM_PLAYBACK
, stream_tag
);
165 estream
= stream_to_hdac_ext_stream(stream
);
166 skl_dsp_setup_spib(dev
, 0, stream_tag
, false);
167 snd_hdac_ext_stream_release(estream
, HDAC_EXT_STREAM_TYPE_HOST
);
169 snd_hdac_dsp_cleanup(stream
, dmab
);
174 static struct skl_dsp_loader_ops
skl_get_loader_ops(void)
176 struct skl_dsp_loader_ops loader_ops
;
178 memset(&loader_ops
, 0, sizeof(struct skl_dsp_loader_ops
));
180 loader_ops
.alloc_dma_buf
= skl_alloc_dma_buf
;
181 loader_ops
.free_dma_buf
= skl_free_dma_buf
;
186 static struct skl_dsp_loader_ops
bxt_get_loader_ops(void)
188 struct skl_dsp_loader_ops loader_ops
;
190 memset(&loader_ops
, 0, sizeof(loader_ops
));
192 loader_ops
.alloc_dma_buf
= skl_alloc_dma_buf
;
193 loader_ops
.free_dma_buf
= skl_free_dma_buf
;
194 loader_ops
.prepare
= skl_dsp_prepare
;
195 loader_ops
.trigger
= skl_dsp_trigger
;
196 loader_ops
.cleanup
= skl_dsp_cleanup
;
201 static const struct skl_dsp_ops dsp_ops
[] = {
204 .loader_ops
= skl_get_loader_ops
,
205 .init
= skl_sst_dsp_init
,
206 .init_fw
= skl_sst_init_fw
,
207 .cleanup
= skl_sst_dsp_cleanup
211 .loader_ops
= skl_get_loader_ops
,
212 .init
= skl_sst_dsp_init
,
213 .init_fw
= skl_sst_init_fw
,
214 .cleanup
= skl_sst_dsp_cleanup
218 .loader_ops
= bxt_get_loader_ops
,
219 .init
= bxt_sst_dsp_init
,
220 .init_fw
= bxt_sst_init_fw
,
221 .cleanup
= bxt_sst_dsp_cleanup
225 const struct skl_dsp_ops
*skl_get_dsp_ops(int pci_id
)
229 for (i
= 0; i
< ARRAY_SIZE(dsp_ops
); i
++) {
230 if (dsp_ops
[i
].id
== pci_id
)
237 int skl_init_dsp(struct skl
*skl
)
239 void __iomem
*mmio_base
;
240 struct hdac_ext_bus
*ebus
= &skl
->ebus
;
241 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
242 struct skl_dsp_loader_ops loader_ops
;
244 const struct skl_dsp_ops
*ops
;
247 /* enable ppcap interrupt */
248 snd_hdac_ext_bus_ppcap_enable(&skl
->ebus
, true);
249 snd_hdac_ext_bus_ppcap_int_enable(&skl
->ebus
, true);
251 /* read the BAR of the ADSP MMIO */
252 mmio_base
= pci_ioremap_bar(skl
->pci
, 4);
253 if (mmio_base
== NULL
) {
254 dev_err(bus
->dev
, "ioremap error\n");
258 ops
= skl_get_dsp_ops(skl
->pci
->device
);
262 loader_ops
= ops
->loader_ops();
263 ret
= ops
->init(bus
->dev
, mmio_base
, irq
,
264 skl
->fw_name
, loader_ops
,
270 dev_dbg(bus
->dev
, "dsp registration status=%d\n", ret
);
275 int skl_free_dsp(struct skl
*skl
)
277 struct hdac_ext_bus
*ebus
= &skl
->ebus
;
278 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
279 struct skl_sst
*ctx
= skl
->skl_sst
;
280 const struct skl_dsp_ops
*ops
;
282 /* disable ppcap interrupt */
283 snd_hdac_ext_bus_ppcap_int_enable(&skl
->ebus
, false);
285 ops
= skl_get_dsp_ops(skl
->pci
->device
);
289 ops
->cleanup(bus
->dev
, ctx
);
291 if (ctx
->dsp
->addr
.lpe
)
292 iounmap(ctx
->dsp
->addr
.lpe
);
297 int skl_suspend_dsp(struct skl
*skl
)
299 struct skl_sst
*ctx
= skl
->skl_sst
;
302 /* if ppcap is not supported return 0 */
303 if (!skl
->ebus
.bus
.ppcap
)
306 ret
= skl_dsp_sleep(ctx
->dsp
);
310 /* disable ppcap interrupt */
311 snd_hdac_ext_bus_ppcap_int_enable(&skl
->ebus
, false);
312 snd_hdac_ext_bus_ppcap_enable(&skl
->ebus
, false);
317 int skl_resume_dsp(struct skl
*skl
)
319 struct skl_sst
*ctx
= skl
->skl_sst
;
322 /* if ppcap is not supported return 0 */
323 if (!skl
->ebus
.bus
.ppcap
)
326 /* enable ppcap interrupt */
327 snd_hdac_ext_bus_ppcap_enable(&skl
->ebus
, true);
328 snd_hdac_ext_bus_ppcap_int_enable(&skl
->ebus
, true);
330 /* check if DSP 1st boot is done */
331 if (skl
->skl_sst
->is_first_boot
== true)
334 ret
= skl_dsp_wake(ctx
->dsp
);
338 skl_dsp_enable_notification(skl
->skl_sst
, false);
342 enum skl_bitdepth
skl_get_bit_depth(int params
)
346 return SKL_DEPTH_8BIT
;
349 return SKL_DEPTH_16BIT
;
352 return SKL_DEPTH_24BIT
;
355 return SKL_DEPTH_32BIT
;
358 return SKL_DEPTH_INVALID
;
364 * Each module in DSP expects a base module configuration, which consists of
365 * PCM format information, which we calculate in driver and resource values
366 * which are read from widget information passed through topology binary
367 * This is send when we create a module with INIT_INSTANCE IPC msg
369 static void skl_set_base_module_format(struct skl_sst
*ctx
,
370 struct skl_module_cfg
*mconfig
,
371 struct skl_base_cfg
*base_cfg
)
373 struct skl_module_fmt
*format
= &mconfig
->in_fmt
[0];
375 base_cfg
->audio_fmt
.number_of_channels
= (u8
)format
->channels
;
377 base_cfg
->audio_fmt
.s_freq
= format
->s_freq
;
378 base_cfg
->audio_fmt
.bit_depth
= format
->bit_depth
;
379 base_cfg
->audio_fmt
.valid_bit_depth
= format
->valid_bit_depth
;
380 base_cfg
->audio_fmt
.ch_cfg
= format
->ch_cfg
;
382 dev_dbg(ctx
->dev
, "bit_depth=%x valid_bd=%x ch_config=%x\n",
383 format
->bit_depth
, format
->valid_bit_depth
,
386 base_cfg
->audio_fmt
.channel_map
= format
->ch_map
;
388 base_cfg
->audio_fmt
.interleaving
= format
->interleaving_style
;
390 base_cfg
->cps
= mconfig
->mcps
;
391 base_cfg
->ibs
= mconfig
->ibs
;
392 base_cfg
->obs
= mconfig
->obs
;
393 base_cfg
->is_pages
= mconfig
->mem_pages
;
397 * Copies copier capabilities into copier module and updates copier module
400 static void skl_copy_copier_caps(struct skl_module_cfg
*mconfig
,
401 struct skl_cpr_cfg
*cpr_mconfig
)
403 if (mconfig
->formats_config
.caps_size
== 0)
406 memcpy(cpr_mconfig
->gtw_cfg
.config_data
,
407 mconfig
->formats_config
.caps
,
408 mconfig
->formats_config
.caps_size
);
410 cpr_mconfig
->gtw_cfg
.config_length
=
411 (mconfig
->formats_config
.caps_size
) / 4;
414 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
416 * Calculate the gatewat settings required for copier module, type of
417 * gateway and index of gateway to use
419 static u32
skl_get_node_id(struct skl_sst
*ctx
,
420 struct skl_module_cfg
*mconfig
)
422 union skl_connector_node_id node_id
= {0};
423 union skl_ssp_dma_node ssp_node
= {0};
424 struct skl_pipe_params
*params
= mconfig
->pipe
->p_params
;
426 switch (mconfig
->dev_type
) {
428 node_id
.node
.dma_type
=
429 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
430 SKL_DMA_I2S_LINK_OUTPUT_CLASS
:
431 SKL_DMA_I2S_LINK_INPUT_CLASS
;
432 node_id
.node
.vindex
= params
->host_dma_id
+
433 (mconfig
->vbus_id
<< 3);
437 node_id
.node
.dma_type
=
438 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
439 SKL_DMA_I2S_LINK_OUTPUT_CLASS
:
440 SKL_DMA_I2S_LINK_INPUT_CLASS
;
441 ssp_node
.dma_node
.time_slot_index
= mconfig
->time_slot
;
442 ssp_node
.dma_node
.i2s_instance
= mconfig
->vbus_id
;
443 node_id
.node
.vindex
= ssp_node
.val
;
446 case SKL_DEVICE_DMIC
:
447 node_id
.node
.dma_type
= SKL_DMA_DMIC_LINK_INPUT_CLASS
;
448 node_id
.node
.vindex
= mconfig
->vbus_id
+
449 (mconfig
->time_slot
);
452 case SKL_DEVICE_HDALINK
:
453 node_id
.node
.dma_type
=
454 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
455 SKL_DMA_HDA_LINK_OUTPUT_CLASS
:
456 SKL_DMA_HDA_LINK_INPUT_CLASS
;
457 node_id
.node
.vindex
= params
->link_dma_id
;
460 case SKL_DEVICE_HDAHOST
:
461 node_id
.node
.dma_type
=
462 (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
) ?
463 SKL_DMA_HDA_HOST_OUTPUT_CLASS
:
464 SKL_DMA_HDA_HOST_INPUT_CLASS
;
465 node_id
.node
.vindex
= params
->host_dma_id
;
469 node_id
.val
= 0xFFFFFFFF;
476 static void skl_setup_cpr_gateway_cfg(struct skl_sst
*ctx
,
477 struct skl_module_cfg
*mconfig
,
478 struct skl_cpr_cfg
*cpr_mconfig
)
480 cpr_mconfig
->gtw_cfg
.node_id
= skl_get_node_id(ctx
, mconfig
);
482 if (cpr_mconfig
->gtw_cfg
.node_id
== SKL_NON_GATEWAY_CPR_NODE_ID
) {
483 cpr_mconfig
->cpr_feature_mask
= 0;
487 if (SKL_CONN_SOURCE
== mconfig
->hw_conn_type
)
488 cpr_mconfig
->gtw_cfg
.dma_buffer_size
= 2 * mconfig
->obs
;
490 cpr_mconfig
->gtw_cfg
.dma_buffer_size
= 2 * mconfig
->ibs
;
492 cpr_mconfig
->cpr_feature_mask
= 0;
493 cpr_mconfig
->gtw_cfg
.config_length
= 0;
495 skl_copy_copier_caps(mconfig
, cpr_mconfig
);
498 #define DMA_CONTROL_ID 5
500 int skl_dsp_set_dma_control(struct skl_sst
*ctx
, struct skl_module_cfg
*mconfig
)
502 struct skl_dma_control
*dma_ctrl
;
503 struct skl_i2s_config_blob config_blob
;
504 struct skl_ipc_large_config_msg msg
= {0};
509 * if blob size is same as capablity size, then no dma control
512 if (mconfig
->formats_config
.caps_size
== sizeof(config_blob
))
515 msg
.large_param_id
= DMA_CONTROL_ID
;
516 msg
.param_data_size
= sizeof(struct skl_dma_control
) +
517 mconfig
->formats_config
.caps_size
;
519 dma_ctrl
= kzalloc(msg
.param_data_size
, GFP_KERNEL
);
520 if (dma_ctrl
== NULL
)
523 dma_ctrl
->node_id
= skl_get_node_id(ctx
, mconfig
);
526 dma_ctrl
->config_length
= sizeof(config_blob
) / 4;
528 memcpy(dma_ctrl
->config_data
, mconfig
->formats_config
.caps
,
529 mconfig
->formats_config
.caps_size
);
531 err
= skl_ipc_set_large_config(&ctx
->ipc
, &msg
, (u32
*)dma_ctrl
);
538 static void skl_setup_out_format(struct skl_sst
*ctx
,
539 struct skl_module_cfg
*mconfig
,
540 struct skl_audio_data_format
*out_fmt
)
542 struct skl_module_fmt
*format
= &mconfig
->out_fmt
[0];
544 out_fmt
->number_of_channels
= (u8
)format
->channels
;
545 out_fmt
->s_freq
= format
->s_freq
;
546 out_fmt
->bit_depth
= format
->bit_depth
;
547 out_fmt
->valid_bit_depth
= format
->valid_bit_depth
;
548 out_fmt
->ch_cfg
= format
->ch_cfg
;
550 out_fmt
->channel_map
= format
->ch_map
;
551 out_fmt
->interleaving
= format
->interleaving_style
;
552 out_fmt
->sample_type
= format
->sample_type
;
554 dev_dbg(ctx
->dev
, "copier out format chan=%d fre=%d bitdepth=%d\n",
555 out_fmt
->number_of_channels
, format
->s_freq
, format
->bit_depth
);
559 * DSP needs SRC module for frequency conversion, SRC takes base module
560 * configuration and the target frequency as extra parameter passed as src
563 static void skl_set_src_format(struct skl_sst
*ctx
,
564 struct skl_module_cfg
*mconfig
,
565 struct skl_src_module_cfg
*src_mconfig
)
567 struct skl_module_fmt
*fmt
= &mconfig
->out_fmt
[0];
569 skl_set_base_module_format(ctx
, mconfig
,
570 (struct skl_base_cfg
*)src_mconfig
);
572 src_mconfig
->src_cfg
= fmt
->s_freq
;
576 * DSP needs updown module to do channel conversion. updown module take base
577 * module configuration and channel configuration
578 * It also take coefficients and now we have defaults applied here
580 static void skl_set_updown_mixer_format(struct skl_sst
*ctx
,
581 struct skl_module_cfg
*mconfig
,
582 struct skl_up_down_mixer_cfg
*mixer_mconfig
)
584 struct skl_module_fmt
*fmt
= &mconfig
->out_fmt
[0];
587 skl_set_base_module_format(ctx
, mconfig
,
588 (struct skl_base_cfg
*)mixer_mconfig
);
589 mixer_mconfig
->out_ch_cfg
= fmt
->ch_cfg
;
591 /* Select F/W default coefficient */
592 mixer_mconfig
->coeff_sel
= 0x0;
594 /* User coeff, don't care since we are selecting F/W defaults */
595 for (i
= 0; i
< UP_DOWN_MIXER_MAX_COEFF
; i
++)
596 mixer_mconfig
->coeff
[i
] = 0xDEADBEEF;
600 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
601 * dma) or link (hda link, SSP, PDM)
602 * Here we calculate the copier module parameters, like PCM format, output
603 * format, gateway settings
604 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
606 static void skl_set_copier_format(struct skl_sst
*ctx
,
607 struct skl_module_cfg
*mconfig
,
608 struct skl_cpr_cfg
*cpr_mconfig
)
610 struct skl_audio_data_format
*out_fmt
= &cpr_mconfig
->out_fmt
;
611 struct skl_base_cfg
*base_cfg
= (struct skl_base_cfg
*)cpr_mconfig
;
613 skl_set_base_module_format(ctx
, mconfig
, base_cfg
);
615 skl_setup_out_format(ctx
, mconfig
, out_fmt
);
616 skl_setup_cpr_gateway_cfg(ctx
, mconfig
, cpr_mconfig
);
620 * Algo module are DSP pre processing modules. Algo module take base module
621 * configuration and params
624 static void skl_set_algo_format(struct skl_sst
*ctx
,
625 struct skl_module_cfg
*mconfig
,
626 struct skl_algo_cfg
*algo_mcfg
)
628 struct skl_base_cfg
*base_cfg
= (struct skl_base_cfg
*)algo_mcfg
;
630 skl_set_base_module_format(ctx
, mconfig
, base_cfg
);
632 if (mconfig
->formats_config
.caps_size
== 0)
635 memcpy(algo_mcfg
->params
,
636 mconfig
->formats_config
.caps
,
637 mconfig
->formats_config
.caps_size
);
642 * Mic select module allows selecting one or many input channels, thus
645 * Mic select module take base module configuration and out-format
648 static void skl_set_base_outfmt_format(struct skl_sst
*ctx
,
649 struct skl_module_cfg
*mconfig
,
650 struct skl_base_outfmt_cfg
*base_outfmt_mcfg
)
652 struct skl_audio_data_format
*out_fmt
= &base_outfmt_mcfg
->out_fmt
;
653 struct skl_base_cfg
*base_cfg
=
654 (struct skl_base_cfg
*)base_outfmt_mcfg
;
656 skl_set_base_module_format(ctx
, mconfig
, base_cfg
);
657 skl_setup_out_format(ctx
, mconfig
, out_fmt
);
660 static u16
skl_get_module_param_size(struct skl_sst
*ctx
,
661 struct skl_module_cfg
*mconfig
)
665 switch (mconfig
->m_type
) {
666 case SKL_MODULE_TYPE_COPIER
:
667 param_size
= sizeof(struct skl_cpr_cfg
);
668 param_size
+= mconfig
->formats_config
.caps_size
;
671 case SKL_MODULE_TYPE_SRCINT
:
672 return sizeof(struct skl_src_module_cfg
);
674 case SKL_MODULE_TYPE_UPDWMIX
:
675 return sizeof(struct skl_up_down_mixer_cfg
);
677 case SKL_MODULE_TYPE_ALGO
:
678 param_size
= sizeof(struct skl_base_cfg
);
679 param_size
+= mconfig
->formats_config
.caps_size
;
682 case SKL_MODULE_TYPE_BASE_OUTFMT
:
683 return sizeof(struct skl_base_outfmt_cfg
);
687 * return only base cfg when no specific module type is
690 return sizeof(struct skl_base_cfg
);
697 * DSP firmware supports various modules like copier, SRC, updown etc.
698 * These modules required various parameters to be calculated and sent for
699 * the module initialization to DSP. By default a generic module needs only
700 * base module format configuration
703 static int skl_set_module_format(struct skl_sst
*ctx
,
704 struct skl_module_cfg
*module_config
,
705 u16
*module_config_size
,
710 param_size
= skl_get_module_param_size(ctx
, module_config
);
712 *param_data
= kzalloc(param_size
, GFP_KERNEL
);
713 if (NULL
== *param_data
)
716 *module_config_size
= param_size
;
718 switch (module_config
->m_type
) {
719 case SKL_MODULE_TYPE_COPIER
:
720 skl_set_copier_format(ctx
, module_config
, *param_data
);
723 case SKL_MODULE_TYPE_SRCINT
:
724 skl_set_src_format(ctx
, module_config
, *param_data
);
727 case SKL_MODULE_TYPE_UPDWMIX
:
728 skl_set_updown_mixer_format(ctx
, module_config
, *param_data
);
731 case SKL_MODULE_TYPE_ALGO
:
732 skl_set_algo_format(ctx
, module_config
, *param_data
);
735 case SKL_MODULE_TYPE_BASE_OUTFMT
:
736 skl_set_base_outfmt_format(ctx
, module_config
, *param_data
);
740 skl_set_base_module_format(ctx
, module_config
, *param_data
);
745 dev_dbg(ctx
->dev
, "Module type=%d config size: %d bytes\n",
746 module_config
->id
.module_id
, param_size
);
747 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET
, 8, 4,
748 *param_data
, param_size
, false);
752 static int skl_get_queue_index(struct skl_module_pin
*mpin
,
753 struct skl_module_inst_id id
, int max
)
757 for (i
= 0; i
< max
; i
++) {
758 if (mpin
[i
].id
.module_id
== id
.module_id
&&
759 mpin
[i
].id
.instance_id
== id
.instance_id
)
767 * Allocates queue for each module.
768 * if dynamic, the pin_index is allocated 0 to max_pin.
769 * In static, the pin_index is fixed based on module_id and instance id
771 static int skl_alloc_queue(struct skl_module_pin
*mpin
,
772 struct skl_module_cfg
*tgt_cfg
, int max
)
775 struct skl_module_inst_id id
= tgt_cfg
->id
;
777 * if pin in dynamic, find first free pin
778 * otherwise find match module and instance id pin as topology will
779 * ensure a unique pin is assigned to this so no need to
782 for (i
= 0; i
< max
; i
++) {
783 if (mpin
[i
].is_dynamic
) {
784 if (!mpin
[i
].in_use
&&
785 mpin
[i
].pin_state
== SKL_PIN_UNBIND
) {
787 mpin
[i
].in_use
= true;
788 mpin
[i
].id
.module_id
= id
.module_id
;
789 mpin
[i
].id
.instance_id
= id
.instance_id
;
790 mpin
[i
].tgt_mcfg
= tgt_cfg
;
794 if (mpin
[i
].id
.module_id
== id
.module_id
&&
795 mpin
[i
].id
.instance_id
== id
.instance_id
&&
796 mpin
[i
].pin_state
== SKL_PIN_UNBIND
) {
798 mpin
[i
].tgt_mcfg
= tgt_cfg
;
807 static void skl_free_queue(struct skl_module_pin
*mpin
, int q_index
)
809 if (mpin
[q_index
].is_dynamic
) {
810 mpin
[q_index
].in_use
= false;
811 mpin
[q_index
].id
.module_id
= 0;
812 mpin
[q_index
].id
.instance_id
= 0;
814 mpin
[q_index
].pin_state
= SKL_PIN_UNBIND
;
815 mpin
[q_index
].tgt_mcfg
= NULL
;
818 /* Module state will be set to unint, if all the out pin state is UNBIND */
820 static void skl_clear_module_state(struct skl_module_pin
*mpin
, int max
,
821 struct skl_module_cfg
*mcfg
)
826 for (i
= 0; i
< max
; i
++) {
827 if (mpin
[i
].pin_state
== SKL_PIN_UNBIND
)
834 mcfg
->m_state
= SKL_MODULE_UNINIT
;
839 * A module needs to be instanataited in DSP. A mdoule is present in a
840 * collection of module referred as a PIPE.
841 * We first calculate the module format, based on module type and then
842 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
844 int skl_init_module(struct skl_sst
*ctx
,
845 struct skl_module_cfg
*mconfig
)
847 u16 module_config_size
= 0;
848 void *param_data
= NULL
;
850 struct skl_ipc_init_instance_msg msg
;
852 dev_dbg(ctx
->dev
, "%s: module_id = %d instance=%d\n", __func__
,
853 mconfig
->id
.module_id
, mconfig
->id
.instance_id
);
855 if (mconfig
->pipe
->state
!= SKL_PIPE_CREATED
) {
856 dev_err(ctx
->dev
, "Pipe not created state= %d pipe_id= %d\n",
857 mconfig
->pipe
->state
, mconfig
->pipe
->ppl_id
);
861 ret
= skl_set_module_format(ctx
, mconfig
,
862 &module_config_size
, ¶m_data
);
864 dev_err(ctx
->dev
, "Failed to set module format ret=%d\n", ret
);
868 msg
.module_id
= mconfig
->id
.module_id
;
869 msg
.instance_id
= mconfig
->id
.instance_id
;
870 msg
.ppl_instance_id
= mconfig
->pipe
->ppl_id
;
871 msg
.param_data_size
= module_config_size
;
872 msg
.core_id
= mconfig
->core_id
;
873 msg
.domain
= mconfig
->domain
;
875 ret
= skl_ipc_init_instance(&ctx
->ipc
, &msg
, param_data
);
877 dev_err(ctx
->dev
, "Failed to init instance ret=%d\n", ret
);
881 mconfig
->m_state
= SKL_MODULE_INIT_DONE
;
886 static void skl_dump_bind_info(struct skl_sst
*ctx
, struct skl_module_cfg
887 *src_module
, struct skl_module_cfg
*dst_module
)
889 dev_dbg(ctx
->dev
, "%s: src module_id = %d src_instance=%d\n",
890 __func__
, src_module
->id
.module_id
, src_module
->id
.instance_id
);
891 dev_dbg(ctx
->dev
, "%s: dst_module=%d dst_instacne=%d\n", __func__
,
892 dst_module
->id
.module_id
, dst_module
->id
.instance_id
);
894 dev_dbg(ctx
->dev
, "src_module state = %d dst module state = %d\n",
895 src_module
->m_state
, dst_module
->m_state
);
899 * On module freeup, we need to unbind the module with modules
900 * it is already bind.
901 * Find the pin allocated and unbind then using bind_unbind IPC
903 int skl_unbind_modules(struct skl_sst
*ctx
,
904 struct skl_module_cfg
*src_mcfg
,
905 struct skl_module_cfg
*dst_mcfg
)
908 struct skl_ipc_bind_unbind_msg msg
;
909 struct skl_module_inst_id src_id
= src_mcfg
->id
;
910 struct skl_module_inst_id dst_id
= dst_mcfg
->id
;
911 int in_max
= dst_mcfg
->max_in_queue
;
912 int out_max
= src_mcfg
->max_out_queue
;
913 int src_index
, dst_index
, src_pin_state
, dst_pin_state
;
915 skl_dump_bind_info(ctx
, src_mcfg
, dst_mcfg
);
917 /* get src queue index */
918 src_index
= skl_get_queue_index(src_mcfg
->m_out_pin
, dst_id
, out_max
);
922 msg
.src_queue
= src_index
;
924 /* get dst queue index */
925 dst_index
= skl_get_queue_index(dst_mcfg
->m_in_pin
, src_id
, in_max
);
929 msg
.dst_queue
= dst_index
;
931 src_pin_state
= src_mcfg
->m_out_pin
[src_index
].pin_state
;
932 dst_pin_state
= dst_mcfg
->m_in_pin
[dst_index
].pin_state
;
934 if (src_pin_state
!= SKL_PIN_BIND_DONE
||
935 dst_pin_state
!= SKL_PIN_BIND_DONE
)
938 msg
.module_id
= src_mcfg
->id
.module_id
;
939 msg
.instance_id
= src_mcfg
->id
.instance_id
;
940 msg
.dst_module_id
= dst_mcfg
->id
.module_id
;
941 msg
.dst_instance_id
= dst_mcfg
->id
.instance_id
;
944 ret
= skl_ipc_bind_unbind(&ctx
->ipc
, &msg
);
946 /* free queue only if unbind is success */
947 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
948 skl_free_queue(dst_mcfg
->m_in_pin
, dst_index
);
951 * check only if src module bind state, bind is
952 * always from src -> sink
954 skl_clear_module_state(src_mcfg
->m_out_pin
, out_max
, src_mcfg
);
961 * Once a module is instantiated it need to be 'bind' with other modules in
962 * the pipeline. For binding we need to find the module pins which are bind
964 * This function finds the pins and then sends bund_unbind IPC message to
965 * DSP using IPC helper
967 int skl_bind_modules(struct skl_sst
*ctx
,
968 struct skl_module_cfg
*src_mcfg
,
969 struct skl_module_cfg
*dst_mcfg
)
972 struct skl_ipc_bind_unbind_msg msg
;
973 int in_max
= dst_mcfg
->max_in_queue
;
974 int out_max
= src_mcfg
->max_out_queue
;
975 int src_index
, dst_index
;
977 skl_dump_bind_info(ctx
, src_mcfg
, dst_mcfg
);
979 if (src_mcfg
->m_state
< SKL_MODULE_INIT_DONE
||
980 dst_mcfg
->m_state
< SKL_MODULE_INIT_DONE
)
983 src_index
= skl_alloc_queue(src_mcfg
->m_out_pin
, dst_mcfg
, out_max
);
987 msg
.src_queue
= src_index
;
988 dst_index
= skl_alloc_queue(dst_mcfg
->m_in_pin
, src_mcfg
, in_max
);
990 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
994 msg
.dst_queue
= dst_index
;
996 dev_dbg(ctx
->dev
, "src queue = %d dst queue =%d\n",
997 msg
.src_queue
, msg
.dst_queue
);
999 msg
.module_id
= src_mcfg
->id
.module_id
;
1000 msg
.instance_id
= src_mcfg
->id
.instance_id
;
1001 msg
.dst_module_id
= dst_mcfg
->id
.module_id
;
1002 msg
.dst_instance_id
= dst_mcfg
->id
.instance_id
;
1005 ret
= skl_ipc_bind_unbind(&ctx
->ipc
, &msg
);
1008 src_mcfg
->m_state
= SKL_MODULE_BIND_DONE
;
1009 src_mcfg
->m_out_pin
[src_index
].pin_state
= SKL_PIN_BIND_DONE
;
1010 dst_mcfg
->m_in_pin
[dst_index
].pin_state
= SKL_PIN_BIND_DONE
;
1012 /* error case , if IPC fails, clear the queue index */
1013 skl_free_queue(src_mcfg
->m_out_pin
, src_index
);
1014 skl_free_queue(dst_mcfg
->m_in_pin
, dst_index
);
1020 static int skl_set_pipe_state(struct skl_sst
*ctx
, struct skl_pipe
*pipe
,
1021 enum skl_ipc_pipeline_state state
)
1023 dev_dbg(ctx
->dev
, "%s: pipe_satate = %d\n", __func__
, state
);
1025 return skl_ipc_set_pipeline_state(&ctx
->ipc
, pipe
->ppl_id
, state
);
1029 * A pipeline is a collection of modules. Before a module in instantiated a
1030 * pipeline needs to be created for it.
1031 * This function creates pipeline, by sending create pipeline IPC messages
1034 int skl_create_pipeline(struct skl_sst
*ctx
, struct skl_pipe
*pipe
)
1038 dev_dbg(ctx
->dev
, "%s: pipe_id = %d\n", __func__
, pipe
->ppl_id
);
1040 ret
= skl_ipc_create_pipeline(&ctx
->ipc
, pipe
->memory_pages
,
1041 pipe
->pipe_priority
, pipe
->ppl_id
);
1043 dev_err(ctx
->dev
, "Failed to create pipeline\n");
1047 pipe
->state
= SKL_PIPE_CREATED
;
1053 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
1054 * pause the pipeline first and then delete it
1055 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
1056 * DMA engines and releases resources
1058 int skl_delete_pipe(struct skl_sst
*ctx
, struct skl_pipe
*pipe
)
1062 dev_dbg(ctx
->dev
, "%s: pipe = %d\n", __func__
, pipe
->ppl_id
);
1064 /* If pipe is started, do stop the pipe in FW. */
1065 if (pipe
->state
> SKL_PIPE_STARTED
) {
1066 ret
= skl_set_pipe_state(ctx
, pipe
, PPL_PAUSED
);
1068 dev_err(ctx
->dev
, "Failed to stop pipeline\n");
1072 pipe
->state
= SKL_PIPE_PAUSED
;
1075 /* If pipe was not created in FW, do not try to delete it */
1076 if (pipe
->state
< SKL_PIPE_CREATED
)
1079 ret
= skl_ipc_delete_pipeline(&ctx
->ipc
, pipe
->ppl_id
);
1081 dev_err(ctx
->dev
, "Failed to delete pipeline\n");
1085 pipe
->state
= SKL_PIPE_INVALID
;
1091 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1092 * For processing data the pipe need to be run by sending IPC set pipe state
1095 int skl_run_pipe(struct skl_sst
*ctx
, struct skl_pipe
*pipe
)
1099 dev_dbg(ctx
->dev
, "%s: pipe = %d\n", __func__
, pipe
->ppl_id
);
1101 /* If pipe was not created in FW, do not try to pause or delete */
1102 if (pipe
->state
< SKL_PIPE_CREATED
)
1105 /* Pipe has to be paused before it is started */
1106 ret
= skl_set_pipe_state(ctx
, pipe
, PPL_PAUSED
);
1108 dev_err(ctx
->dev
, "Failed to pause pipe\n");
1112 pipe
->state
= SKL_PIPE_PAUSED
;
1114 ret
= skl_set_pipe_state(ctx
, pipe
, PPL_RUNNING
);
1116 dev_err(ctx
->dev
, "Failed to start pipe\n");
1120 pipe
->state
= SKL_PIPE_STARTED
;
1126 * Stop the pipeline by sending set pipe state IPC
1127 * DSP doesnt implement stop so we always send pause message
1129 int skl_stop_pipe(struct skl_sst
*ctx
, struct skl_pipe
*pipe
)
1133 dev_dbg(ctx
->dev
, "In %s pipe=%d\n", __func__
, pipe
->ppl_id
);
1135 /* If pipe was not created in FW, do not try to pause or delete */
1136 if (pipe
->state
< SKL_PIPE_PAUSED
)
1139 ret
= skl_set_pipe_state(ctx
, pipe
, PPL_PAUSED
);
1141 dev_dbg(ctx
->dev
, "Failed to stop pipe\n");
1145 pipe
->state
= SKL_PIPE_PAUSED
;
1151 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1154 int skl_reset_pipe(struct skl_sst
*ctx
, struct skl_pipe
*pipe
)
1158 /* If pipe was not created in FW, do not try to pause or delete */
1159 if (pipe
->state
< SKL_PIPE_PAUSED
)
1162 ret
= skl_set_pipe_state(ctx
, pipe
, PPL_RESET
);
1164 dev_dbg(ctx
->dev
, "Failed to reset pipe ret=%d\n", ret
);
1168 pipe
->state
= SKL_PIPE_RESET
;
1173 /* Algo parameter set helper function */
1174 int skl_set_module_params(struct skl_sst
*ctx
, u32
*params
, int size
,
1175 u32 param_id
, struct skl_module_cfg
*mcfg
)
1177 struct skl_ipc_large_config_msg msg
;
1179 msg
.module_id
= mcfg
->id
.module_id
;
1180 msg
.instance_id
= mcfg
->id
.instance_id
;
1181 msg
.param_data_size
= size
;
1182 msg
.large_param_id
= param_id
;
1184 return skl_ipc_set_large_config(&ctx
->ipc
, &msg
, params
);
1187 int skl_get_module_params(struct skl_sst
*ctx
, u32
*params
, int size
,
1188 u32 param_id
, struct skl_module_cfg
*mcfg
)
1190 struct skl_ipc_large_config_msg msg
;
1192 msg
.module_id
= mcfg
->id
.module_id
;
1193 msg
.instance_id
= mcfg
->id
.instance_id
;
1194 msg
.param_data_size
= size
;
1195 msg
.large_param_id
= param_id
;
1197 return skl_ipc_get_large_config(&ctx
->ipc
, &msg
, params
);