Merge remote-tracking branch 'asoc/fix/intel' into asoc-linus
[deliverable/linux.git] / sound / soc / intel / skylake / skl.c
1 /*
2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 */
23
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <sound/pcm.h>
30 #include "../common/sst-acpi.h"
31 #include "skl.h"
32 #include "skl-sst-dsp.h"
33 #include "skl-sst-ipc.h"
34
35 /*
36 * initialize the PCI registers
37 */
38 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
39 unsigned char mask, unsigned char val)
40 {
41 unsigned char data;
42
43 pci_read_config_byte(pci, reg, &data);
44 data &= ~mask;
45 data |= (val & mask);
46 pci_write_config_byte(pci, reg, data);
47 }
48
49 static void skl_init_pci(struct skl *skl)
50 {
51 struct hdac_ext_bus *ebus = &skl->ebus;
52
53 /*
54 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
55 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
56 * Ensuring these bits are 0 clears playback static on some HD Audio
57 * codecs.
58 * The PCI register TCSEL is defined in the Intel manuals.
59 */
60 dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
61 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
62 }
63
64 static void update_pci_dword(struct pci_dev *pci,
65 unsigned int reg, u32 mask, u32 val)
66 {
67 u32 data = 0;
68
69 pci_read_config_dword(pci, reg, &data);
70 data &= ~mask;
71 data |= (val & mask);
72 pci_write_config_dword(pci, reg, data);
73 }
74
75 /*
76 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
77 *
78 * @dev: device pointer
79 * @enable: enable/disable flag
80 */
81 static void skl_enable_miscbdcge(struct device *dev, bool enable)
82 {
83 struct pci_dev *pci = to_pci_dev(dev);
84 u32 val;
85
86 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
87
88 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
89 }
90
91 /*
92 * While performing reset, controller may not come back properly causing
93 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
94 * (init chip) and then again set CGCTL.MISCBDCGE to 1
95 */
96 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
97 {
98 int ret;
99
100 skl_enable_miscbdcge(bus->dev, false);
101 ret = snd_hdac_bus_init_chip(bus, full_reset);
102 skl_enable_miscbdcge(bus->dev, true);
103
104 return ret;
105 }
106
107 /* called from IRQ */
108 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
109 {
110 snd_pcm_period_elapsed(hstr->substream);
111 }
112
113 static irqreturn_t skl_interrupt(int irq, void *dev_id)
114 {
115 struct hdac_ext_bus *ebus = dev_id;
116 struct hdac_bus *bus = ebus_to_hbus(ebus);
117 u32 status;
118
119 if (!pm_runtime_active(bus->dev))
120 return IRQ_NONE;
121
122 spin_lock(&bus->reg_lock);
123
124 status = snd_hdac_chip_readl(bus, INTSTS);
125 if (status == 0 || status == 0xffffffff) {
126 spin_unlock(&bus->reg_lock);
127 return IRQ_NONE;
128 }
129
130 /* clear rirb int */
131 status = snd_hdac_chip_readb(bus, RIRBSTS);
132 if (status & RIRB_INT_MASK) {
133 if (status & RIRB_INT_RESPONSE)
134 snd_hdac_bus_update_rirb(bus);
135 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
136 }
137
138 spin_unlock(&bus->reg_lock);
139
140 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
141 }
142
143 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
144 {
145 struct hdac_ext_bus *ebus = dev_id;
146 struct hdac_bus *bus = ebus_to_hbus(ebus);
147 u32 status;
148
149 status = snd_hdac_chip_readl(bus, INTSTS);
150
151 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
152
153 return IRQ_HANDLED;
154 }
155
156 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
157 {
158 struct skl *skl = ebus_to_skl(ebus);
159 struct hdac_bus *bus = ebus_to_hbus(ebus);
160 int ret;
161
162 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
163 skl_threaded_handler,
164 IRQF_SHARED,
165 KBUILD_MODNAME, ebus);
166 if (ret) {
167 dev_err(bus->dev,
168 "unable to grab IRQ %d, disabling device\n",
169 skl->pci->irq);
170 return ret;
171 }
172
173 bus->irq = skl->pci->irq;
174 pci_intx(skl->pci, 1);
175
176 return 0;
177 }
178
179 #ifdef CONFIG_PM
180 static int _skl_suspend(struct hdac_ext_bus *ebus)
181 {
182 struct skl *skl = ebus_to_skl(ebus);
183 struct hdac_bus *bus = ebus_to_hbus(ebus);
184 int ret;
185
186 snd_hdac_ext_bus_link_power_down_all(ebus);
187
188 ret = skl_suspend_dsp(skl);
189 if (ret < 0)
190 return ret;
191
192 snd_hdac_bus_stop_chip(bus);
193 skl_enable_miscbdcge(bus->dev, false);
194 snd_hdac_bus_enter_link_reset(bus);
195 skl_enable_miscbdcge(bus->dev, true);
196
197 return 0;
198 }
199
200 static int _skl_resume(struct hdac_ext_bus *ebus)
201 {
202 struct skl *skl = ebus_to_skl(ebus);
203 struct hdac_bus *bus = ebus_to_hbus(ebus);
204
205 skl_init_pci(skl);
206 skl_init_chip(bus, true);
207
208 return skl_resume_dsp(skl);
209 }
210 #endif
211
212 #ifdef CONFIG_PM_SLEEP
213 /*
214 * power management
215 */
216 static int skl_suspend(struct device *dev)
217 {
218 struct pci_dev *pci = to_pci_dev(dev);
219 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
220 struct skl *skl = ebus_to_skl(ebus);
221 struct hdac_bus *bus = ebus_to_hbus(ebus);
222
223 /*
224 * Do not suspend if streams which are marked ignore suspend are
225 * running, we need to save the state for these and continue
226 */
227 if (skl->supend_active) {
228 snd_hdac_ext_bus_link_power_down_all(ebus);
229 enable_irq_wake(bus->irq);
230 pci_save_state(pci);
231 pci_disable_device(pci);
232 return 0;
233 } else {
234 return _skl_suspend(ebus);
235 }
236 }
237
238 static int skl_resume(struct device *dev)
239 {
240 struct pci_dev *pci = to_pci_dev(dev);
241 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
242 struct skl *skl = ebus_to_skl(ebus);
243 struct hdac_bus *bus = ebus_to_hbus(ebus);
244 int ret;
245
246 /*
247 * resume only when we are not in suspend active, otherwise need to
248 * restore the device
249 */
250 if (skl->supend_active) {
251 pci_restore_state(pci);
252 ret = pci_enable_device(pci);
253 snd_hdac_ext_bus_link_power_up_all(ebus);
254 disable_irq_wake(bus->irq);
255 } else {
256 ret = _skl_resume(ebus);
257 }
258
259 return ret;
260 }
261 #endif /* CONFIG_PM_SLEEP */
262
263 #ifdef CONFIG_PM
264 static int skl_runtime_suspend(struct device *dev)
265 {
266 struct pci_dev *pci = to_pci_dev(dev);
267 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
268 struct hdac_bus *bus = ebus_to_hbus(ebus);
269
270 dev_dbg(bus->dev, "in %s\n", __func__);
271
272 return _skl_suspend(ebus);
273 }
274
275 static int skl_runtime_resume(struct device *dev)
276 {
277 struct pci_dev *pci = to_pci_dev(dev);
278 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
279 struct hdac_bus *bus = ebus_to_hbus(ebus);
280
281 dev_dbg(bus->dev, "in %s\n", __func__);
282
283 return _skl_resume(ebus);
284 }
285 #endif /* CONFIG_PM */
286
287 static const struct dev_pm_ops skl_pm = {
288 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
289 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
290 };
291
292 /*
293 * destructor
294 */
295 static int skl_free(struct hdac_ext_bus *ebus)
296 {
297 struct skl *skl = ebus_to_skl(ebus);
298 struct hdac_bus *bus = ebus_to_hbus(ebus);
299
300 skl->init_failed = 1; /* to be sure */
301
302 snd_hdac_ext_stop_streams(ebus);
303
304 if (bus->irq >= 0)
305 free_irq(bus->irq, (void *)bus);
306 if (bus->remap_addr)
307 iounmap(bus->remap_addr);
308
309 snd_hdac_bus_free_stream_pages(bus);
310 snd_hdac_stream_free_all(ebus);
311 snd_hdac_link_free_all(ebus);
312 pci_release_regions(skl->pci);
313 pci_disable_device(skl->pci);
314
315 snd_hdac_ext_bus_exit(ebus);
316
317 return 0;
318 }
319
320 static int skl_machine_device_register(struct skl *skl, void *driver_data)
321 {
322 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
323 struct platform_device *pdev;
324 struct sst_acpi_mach *mach = driver_data;
325 int ret;
326
327 mach = sst_acpi_find_machine(mach);
328 if (mach == NULL) {
329 dev_err(bus->dev, "No matching machine driver found\n");
330 return -ENODEV;
331 }
332 skl->fw_name = mach->fw_filename;
333
334 pdev = platform_device_alloc(mach->drv_name, -1);
335 if (pdev == NULL) {
336 dev_err(bus->dev, "platform device alloc failed\n");
337 return -EIO;
338 }
339
340 ret = platform_device_add(pdev);
341 if (ret) {
342 dev_err(bus->dev, "failed to add machine device\n");
343 platform_device_put(pdev);
344 return -EIO;
345 }
346 skl->i2s_dev = pdev;
347
348 return 0;
349 }
350
351 static void skl_machine_device_unregister(struct skl *skl)
352 {
353 if (skl->i2s_dev)
354 platform_device_unregister(skl->i2s_dev);
355 }
356
357 static int skl_dmic_device_register(struct skl *skl)
358 {
359 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
360 struct platform_device *pdev;
361 int ret;
362
363 /* SKL has one dmic port, so allocate dmic device for this */
364 pdev = platform_device_alloc("dmic-codec", -1);
365 if (!pdev) {
366 dev_err(bus->dev, "failed to allocate dmic device\n");
367 return -ENOMEM;
368 }
369
370 ret = platform_device_add(pdev);
371 if (ret) {
372 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
373 platform_device_put(pdev);
374 return ret;
375 }
376 skl->dmic_dev = pdev;
377
378 return 0;
379 }
380
381 static void skl_dmic_device_unregister(struct skl *skl)
382 {
383 if (skl->dmic_dev)
384 platform_device_unregister(skl->dmic_dev);
385 }
386
387 /*
388 * Probe the given codec address
389 */
390 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
391 {
392 struct hdac_bus *bus = ebus_to_hbus(ebus);
393 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
394 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
395 unsigned int res;
396
397 mutex_lock(&bus->cmd_mutex);
398 snd_hdac_bus_send_cmd(bus, cmd);
399 snd_hdac_bus_get_response(bus, addr, &res);
400 mutex_unlock(&bus->cmd_mutex);
401 if (res == -1)
402 return -EIO;
403 dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
404
405 return snd_hdac_ext_bus_device_init(ebus, addr);
406 }
407
408 /* Codec initialization */
409 static int skl_codec_create(struct hdac_ext_bus *ebus)
410 {
411 struct hdac_bus *bus = ebus_to_hbus(ebus);
412 int c, max_slots;
413
414 max_slots = HDA_MAX_CODECS;
415
416 /* First try to probe all given codec slots */
417 for (c = 0; c < max_slots; c++) {
418 if ((bus->codec_mask & (1 << c))) {
419 if (probe_codec(ebus, c) < 0) {
420 /*
421 * Some BIOSen give you wrong codec addresses
422 * that don't exist
423 */
424 dev_warn(bus->dev,
425 "Codec #%d probe error; disabling it...\n", c);
426 bus->codec_mask &= ~(1 << c);
427 /*
428 * More badly, accessing to a non-existing
429 * codec often screws up the controller bus,
430 * and disturbs the further communications.
431 * Thus if an error occurs during probing,
432 * better to reset the controller bus to get
433 * back to the sanity state.
434 */
435 snd_hdac_bus_stop_chip(bus);
436 skl_init_chip(bus, true);
437 }
438 }
439 }
440
441 return 0;
442 }
443
444 static const struct hdac_bus_ops bus_core_ops = {
445 .command = snd_hdac_bus_send_cmd,
446 .get_response = snd_hdac_bus_get_response,
447 };
448
449 /*
450 * constructor
451 */
452 static int skl_create(struct pci_dev *pci,
453 const struct hdac_io_ops *io_ops,
454 struct skl **rskl)
455 {
456 struct skl *skl;
457 struct hdac_ext_bus *ebus;
458
459 int err;
460
461 *rskl = NULL;
462
463 err = pci_enable_device(pci);
464 if (err < 0)
465 return err;
466
467 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
468 if (!skl) {
469 pci_disable_device(pci);
470 return -ENOMEM;
471 }
472 ebus = &skl->ebus;
473 snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
474 ebus->bus.use_posbuf = 1;
475 skl->pci = pci;
476
477 ebus->bus.bdl_pos_adj = 0;
478
479 *rskl = skl;
480
481 return 0;
482 }
483
484 static int skl_first_init(struct hdac_ext_bus *ebus)
485 {
486 struct skl *skl = ebus_to_skl(ebus);
487 struct hdac_bus *bus = ebus_to_hbus(ebus);
488 struct pci_dev *pci = skl->pci;
489 int err;
490 unsigned short gcap;
491 int cp_streams, pb_streams, start_idx;
492
493 err = pci_request_regions(pci, "Skylake HD audio");
494 if (err < 0)
495 return err;
496
497 bus->addr = pci_resource_start(pci, 0);
498 bus->remap_addr = pci_ioremap_bar(pci, 0);
499 if (bus->remap_addr == NULL) {
500 dev_err(bus->dev, "ioremap error\n");
501 return -ENXIO;
502 }
503
504 snd_hdac_ext_bus_parse_capabilities(ebus);
505
506 if (skl_acquire_irq(ebus, 0) < 0)
507 return -EBUSY;
508
509 pci_set_master(pci);
510 synchronize_irq(bus->irq);
511
512 gcap = snd_hdac_chip_readw(bus, GCAP);
513 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
514
515 /* allow 64bit DMA address if supported by H/W */
516 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
517 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
518 } else {
519 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
520 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
521 }
522
523 /* read number of streams from GCAP register */
524 cp_streams = (gcap >> 8) & 0x0f;
525 pb_streams = (gcap >> 12) & 0x0f;
526
527 if (!pb_streams && !cp_streams)
528 return -EIO;
529
530 ebus->num_streams = cp_streams + pb_streams;
531
532 /* initialize streams */
533 snd_hdac_ext_stream_init_all
534 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
535 start_idx = cp_streams;
536 snd_hdac_ext_stream_init_all
537 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
538
539 err = snd_hdac_bus_alloc_stream_pages(bus);
540 if (err < 0)
541 return err;
542
543 /* initialize chip */
544 skl_init_pci(skl);
545
546 skl_init_chip(bus, true);
547
548 /* codec detection */
549 if (!bus->codec_mask) {
550 dev_info(bus->dev, "no hda codecs found!\n");
551 }
552
553 return 0;
554 }
555
556 static int skl_probe(struct pci_dev *pci,
557 const struct pci_device_id *pci_id)
558 {
559 struct skl *skl;
560 struct hdac_ext_bus *ebus = NULL;
561 struct hdac_bus *bus = NULL;
562 int err;
563
564 /* we use ext core ops, so provide NULL for ops here */
565 err = skl_create(pci, NULL, &skl);
566 if (err < 0)
567 return err;
568
569 ebus = &skl->ebus;
570 bus = ebus_to_hbus(ebus);
571
572 err = skl_first_init(ebus);
573 if (err < 0)
574 goto out_free;
575
576 skl->nhlt = skl_nhlt_init(bus->dev);
577
578 if (skl->nhlt == NULL)
579 goto out_free;
580
581 pci_set_drvdata(skl->pci, ebus);
582
583 /* check if dsp is there */
584 if (ebus->ppcap) {
585 err = skl_machine_device_register(skl,
586 (void *)pci_id->driver_data);
587 if (err < 0)
588 goto out_free;
589
590 err = skl_init_dsp(skl);
591 if (err < 0) {
592 dev_dbg(bus->dev, "error failed to register dsp\n");
593 goto out_mach_free;
594 }
595 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
596
597 }
598 if (ebus->mlcap)
599 snd_hdac_ext_bus_get_ml_capabilities(ebus);
600
601 /* create device for soc dmic */
602 err = skl_dmic_device_register(skl);
603 if (err < 0)
604 goto out_dsp_free;
605
606 /* register platform dai and controls */
607 err = skl_platform_register(bus->dev);
608 if (err < 0)
609 goto out_dmic_free;
610
611 /* create codec instances */
612 err = skl_codec_create(ebus);
613 if (err < 0)
614 goto out_unregister;
615
616 /*configure PM */
617 pm_runtime_put_noidle(bus->dev);
618 pm_runtime_allow(bus->dev);
619
620 return 0;
621
622 out_unregister:
623 skl_platform_unregister(bus->dev);
624 out_dmic_free:
625 skl_dmic_device_unregister(skl);
626 out_dsp_free:
627 skl_free_dsp(skl);
628 out_mach_free:
629 skl_machine_device_unregister(skl);
630 out_free:
631 skl->init_failed = 1;
632 skl_free(ebus);
633
634 return err;
635 }
636
637 static void skl_remove(struct pci_dev *pci)
638 {
639 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
640 struct skl *skl = ebus_to_skl(ebus);
641
642 if (skl->tplg)
643 release_firmware(skl->tplg);
644
645 if (pci_dev_run_wake(pci))
646 pm_runtime_get_noresume(&pci->dev);
647 pci_dev_put(pci);
648 skl_platform_unregister(&pci->dev);
649 skl_free_dsp(skl);
650 skl_machine_device_unregister(skl);
651 skl_dmic_device_unregister(skl);
652 skl_free(ebus);
653 dev_set_drvdata(&pci->dev, NULL);
654 }
655
656 static struct sst_acpi_mach sst_skl_devdata[] = {
657 { "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL },
658 { "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin",
659 NULL, NULL, NULL },
660 { "MX98357A", "skl_nau88l25_max98357a_i2s", "intel/dsp_fw_release.bin",
661 NULL, NULL, NULL },
662 {}
663 };
664
665 /* PCI IDs */
666 static const struct pci_device_id skl_ids[] = {
667 /* Sunrise Point-LP */
668 { PCI_DEVICE(0x8086, 0x9d70),
669 .driver_data = (unsigned long)&sst_skl_devdata},
670 { 0, }
671 };
672 MODULE_DEVICE_TABLE(pci, skl_ids);
673
674 /* pci_driver definition */
675 static struct pci_driver skl_driver = {
676 .name = KBUILD_MODNAME,
677 .id_table = skl_ids,
678 .probe = skl_probe,
679 .remove = skl_remove,
680 .driver = {
681 .pm = &skl_pm,
682 },
683 };
684 module_pci_driver(skl_driver);
685
686 MODULE_LICENSE("GPL v2");
687 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
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