ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
[deliverable/linux.git] / arch / arm / boot / dts / exynos5420.dtsi
index fa8bda836cef4a0d9aa667a402b59d5fe92342b5..2d9f43b8cc156ef6ed8d4f28b7110cda4a231e9e 100644 (file)
@@ -13,9 +13,8 @@
  * published by the Free Software Foundation.
  */
 
+#include "exynos54xx.dtsi"
 #include <dt-bindings/clock/exynos5420.h>
-#include "exynos5.dtsi"
-
 #include <dt-bindings/clock/exynos-audss-clk.h>
 
 / {
                        };
                };
 
-               sysram@02020000 {
-                       compatible = "mmio-sram";
-                       reg = <0x02020000 0x54000>;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0 0x02020000 0x54000>;
-
-                       smp-sysram@0 {
-                               compatible = "samsung,exynos4210-sysram";
-                               reg = <0x0 0x1000>;
-                       };
-
-                       smp-sysram@53000 {
-                               compatible = "samsung,exynos4210-sysram-ns";
-                               reg = <0x53000 0x1000>;
-                       };
-               };
-
                clock: clock-controller@10010000 {
                        compatible = "samsung,exynos5420-clock";
                        reg = <0x10010000 0x30000>;
                        status = "disabled";
                };
 
-               mct: mct@101C0000 {
-                       compatible = "samsung,exynos4210-mct";
-                       reg = <0x101C0000 0xB00>;
-                       interrupt-parent = <&mct_map>;
-                       interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
-                                       <8>, <9>, <10>, <11>;
-                       clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
-                       clock-names = "fin_pll", "mct";
-
-                       mct_map: mct-map {
-                               #interrupt-cells = <1>;
-                               #address-cells = <0>;
-                               #size-cells = <0>;
-                               interrupt-map = <0 &combiner 23 3>,
-                                               <1 &combiner 23 4>,
-                                               <2 &combiner 25 2>,
-                                               <3 &combiner 25 3>,
-                                               <4 &gic 0 120 0>,
-                                               <5 &gic 0 121 0>,
-                                               <6 &gic 0 122 0>,
-                                               <7 &gic 0 123 0>,
-                                               <8 &gic 0 128 0>,
-                                               <9 &gic 0 129 0>,
-                                               <10 &gic 0 130 0>,
-                                               <11 &gic 0 131 0>;
-                       };
-               };
-
                nocp_mem0_0: nocp@10CA1000 {
                        compatible = "samsung,exynos5420-nocp";
                        reg = <0x10CA1000 0x200>;
        pinctrl-0 = <&i2c3_bus>;
 };
 
+&mct {
+       clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
+       clock-names = "fin_pll", "mct";
+};
+
 &pwm {
        clocks = <&clock CLK_PWM>;
        clock-names = "timers";
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