Remove tic80 support

[deliverable/binutils-gdb.git] / cpu / lm32.cpu

diff --git a/cpu/lm32.cpu b/cpu/lm32.cpu
index 31b943d79eba79fde1d9e1235ed00cc6dbb16add..ecd8160816efce2ba20896089763c86cdc5a5f5b 100644 (file)
--- a/cpu/lm32.cpu
+++ b/cpu/lm32.cpu
@@ -1,5 +1,5 @@
 ; Lattice Mico32 CPU description.  -*- Scheme -*-
-; Copyright 2008, 2009  Free Software Foundation, Inc.
+; Copyright 2008-2013  Free Software Foundation, Inc.
 ; Contributed by Jon Beniston <jon@beniston.com>
 ;
 ; This file is part of the GNU Binutils.
@@ -101,9 +101,11 @@
                (EBA 7)
                (DC 8)
                (DEBA 9)
+              (CFG2 10)
                (JTX 14) (JRX 15)          
                (BP0 16) (BP1 17) (BP2 18) (BP3 19)
                (WP0 24) (WP1 25) (WP2 26) (WP3 27)     
+               (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31)
               )
   )
   () ()
@@ -126,11 +128,15 @@
 
 (df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT
         ((value pc) (sra SI (sub SI value pc) 2))
-        ((value pc) (add SI pc (sra SI (sll SI value 16) 14)))
+       ((value pc) (add SI pc (sub (xor (sll (and value #xffff) 2)
+                                        #x20000)
+                                   #x20000)))
 )
 (df f-call "call offset field" (PCREL-ADDR) 25 26 INT 
         ((value pc) (sra SI (sub SI value pc) 2))
-        ((value pc) (add SI pc (sra SI (sll SI value 6) 4)))
+       ((value pc) (add SI pc (sub (xor (sll (and value #x3ffffff) 2)
+                                        #x8000000)
+                                   #x8000000)))
 )
 
 \f