MSP430: Relax target glob for configuring GDB

[deliverable/binutils-gdb.git] / cpu / m32c.cpu

diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index 69eec8275d9598f8fb3f087fa835f360c24065c2..5a38f1bd5264a574ae95c8569dc3d02fd185466b 100644 (file)
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -1,6 +1,6 @@
 ; Renesas M32C CPU description.  -*- Scheme -*-
 ;
-; Copyright 2005, 2006 Free Software Foundation, Inc.
+; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
 ;
 ; Contributed by Red Hat Inc; developed under contract from Renesas.
 ;
@@ -8,7 +8,7 @@
 ;
 ; This program is free software; you can redistribute it and/or modify
 ; it under the terms of the GNU General Public License as published by
-; the Free Software Foundation; either version 2 of the License, or
+; the Free Software Foundation; either version 3 of the License, or
 ; (at your option) any later version.
 ;
 ; This program is distributed in the hope that it will be useful,
@@ -18,7 +18,8 @@
 ;
 ; You should have received a copy of the GNU General Public License
 ; along with this program; if not, write to the Free Software
-; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+; MA 02110-1301, USA.
 
 (include "simplify.inc")
 
@@ -571,10 +572,10 @@
 )
 (df  f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
      ((value pc) (or SI
-                    (or (srl value 16) (and value #xff00))
+                    (or (and (srl value 16) #xff) (and value #xff00))
                     (sll (ext INT (trunc QI (and value #xff))) 16)))
      ((value pc) (or SI
-                    (or (srl value 16) (and value #xff00))
+                    (or (and (srl value 16) #xff) (and value #xff00))
                     (sll (ext INT (trunc QI (and value #xff))) 16)))
  )
 
@@ -616,12 +617,12 @@
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #xff0000))) ; insert
+                    (and (sll value 16)     #xff0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #xff0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #xff0000))) ; extract
 )
 
 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT
@@ -629,24 +630,25 @@
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #x0f0000))) ; insert
+                    (and (sll value 16)     #x0f0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #x0f0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #x0f0000))) ; extract
 )
+
 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
      ((value pc) (or USI
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #xff0000))) ; insert
+                    (and (sll value 16)     #xff0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #xff0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #xff0000))) ; extract
 )
 
 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
@@ -954,9 +956,12 @@
 )
 (df  f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
      ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
-                    (srl (and (sub value (add pc 1)) #xffff) 8)))
-     ((value pc) (add SI (or (srl (and value #xffff) 8)
-                            (sra (sll (and value #xff) 24) 16)) (add pc 1)))
+                    (srl (and (sub value (add pc 1)) #xff00) 8)))
+     ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8)
+                                      (sll (and value #xff) 8))
+                                   #x8000)
+                              #x8000)
+                     (add pc 1)))
  )
 (df  f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
      ((value pc) (or SI