; Renesas M32C CPU description. -*- Scheme -*-
;
-; Copyright 2005, 2006 Free Software Foundation, Inc.
+; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc; developed under contract from Renesas.
;
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
-; the Free Software Foundation; either version 2 of the License, or
+; the Free Software Foundation; either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
-; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+; MA 02110-1301, USA.
(include "simplify.inc")
; r1l 10'b 11'b
; r1h 11'b 01'b
(df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
- ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
+ ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert
((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
)
; QI mode gr encoding for m32c is different than for m16c. The hardware
; r1l 10'b 11'b
; r1h 11'b 01'b
(df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
- ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
+ ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert
((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
)
; HI mode gr encoding for m32c is different than for m16c. The hardware
; r1l 10'b 11'b
; r1h 11'b 01'b
(df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
- ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
+ ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert
((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
)
(df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
- ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
+ ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert
((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
)
; HI mode gr encoding for m32c is different than for m16c. The hardware
(df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
(df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
(dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
(df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
(df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
(df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
(df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
((value pc) (or UHI
- (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))) ; insert
+ (and (srl value 8) #xff)
+ (sll (and value #xff) 8))) ; insert
((value pc) (or UHI
- (and UHI (srl UHI value 8) #x00ff)
- (and UHI (sll UHI value 8) #xff00))) ; extract
+ (and UHI (srl UHI value 8) #xff)
+ (sll UHI (and UHI value #xff) 8))) ; extract
)
(df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
- ((value pc) (or SI
- (or (srl value 16) (and value #xff00))
- (sll (ext INT (trunc QI (and value #xff))) 16)))
- ((value pc) (or SI
- (or (srl value 16) (and value #xff00))
- (sll (ext INT (trunc QI (and value #xff))) 16)))
+ ((value pc) (sub SI (xor (or SI (or (and (srl value 16) #xff)
+ (and value #xff00))
+ (sll (and value #xff) 16))
+ #x800000) #x800000))
+ ((value pc) (sub SI (xor (or SI
+ (or (and (srl value 16) #xff)
+ (and value #xff00))
+ (sll (and value #xff) 16))
+ #x800000) #x800000))
)
(df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
(or USI
(and (srl value 16) #x0000ff)
(and value #x00ff00))
- (and (sll value 16) #xff0000))) ; insert
+ (and (sll value 16) #xff0000))) ; insert
((value pc) (or USI
(or USI
- (and USI (srl UHI value 16) #x0000ff)
- (and USI value #x00ff00))
- (and USI (sll UHI value 16) #xff0000))) ; extract
+ (and USI (srl value 16) #x0000ff)
+ (and USI value #x00ff00))
+ (and USI (sll value 16) #xff0000))) ; extract
)
(df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT
(or USI
(and (srl value 16) #x0000ff)
(and value #x00ff00))
- (and (sll value 16) #x0f0000))) ; insert
+ (and (sll value 16) #x0f0000))) ; insert
((value pc) (or USI
(or USI
- (and USI (srl UHI value 16) #x0000ff)
- (and USI value #x00ff00))
- (and USI (sll UHI value 16) #x0f0000))) ; extract
+ (and USI (srl value 16) #x0000ff)
+ (and USI value #x00ff00))
+ (and USI (sll value 16) #x0f0000))) ; extract
)
+
(df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
((value pc) (or USI
(or USI
(and (srl value 16) #x0000ff)
(and value #x00ff00))
- (and (sll value 16) #xff0000))) ; insert
+ (and (sll value 16) #xff0000))) ; insert
((value pc) (or USI
(or USI
- (and USI (srl UHI value 16) #x0000ff)
- (and USI value #x00ff00))
- (and USI (sll UHI value 16) #xff0000))) ; extract
+ (and USI (srl value 16) #x0000ff)
+ (and USI value #x00ff00))
+ (and USI (sll value 16) #xff0000))) ; extract
)
(dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
(ext INT
(or SI
(or SI
- (and (srl value 24) #x000000ff)
- (and (srl value 8) #x0000ff00))
+ (and (srl value 24) #x00ff)
+ (and (srl value 8) #xff00))
(or SI
- (and (sll value 8) #x00ff0000)
- (and (sll value 24) #xff000000)))))
+ (sll (and value #xff00) 8)
+ (sll (and value #x00ff) 24)))))
;; extract
((value pc)
(ext INT
(or SI
(or SI
- (and (srl value 24) #x000000ff)
- (and (srl value 8) #x0000ff00))
+ (and (srl value 24) #x00ff)
+ (and (srl value 8) #xff00))
(or SI
- (and (sll value 8) #x00ff0000)
- (and (sll value 24) #xff000000)))))
+ (sll (and value #xff00) 8)
+ (sll (and value #x00ff) 24)))))
)
(dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
)
(sequence () ; extract
(set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
- (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
+ (sll (and (ifield f-dsp-64-u16) #xffff) 16)))
)
)
)
(sequence () ; extract
(set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
- (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
+ (sll (and (ifield f-dsp-64-u16) #xffff) 16)))
)
)
(df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; insert
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT
(trunc HI
- (or (and (srl value 8) #x00ff)
- (and (sll value 8) #xff00))))) ; extract
+ (or (and (srl value 8) #xff)
+ (sll (and value #xff) 8))))) ; extract
)
;-------------------------------------------------------------
(set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
)
(sequence () ; extract
- (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
+ (set (ifield f-bitbase32-16-s11-unprefixed) (or (mul (ifield f-dsp-16-s8) 8)
(ifield f-bitno32-unprefixed)))
)
)
(set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
)
(sequence () ; extract
- (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
+ (set (ifield f-bitbase32-16-s19-unprefixed) (or (mul (ifield f-dsp-16-s16) 8)
(ifield f-bitno32-unprefixed)))
)
)
(set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
)
(sequence () ; extract
- (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
+ (set (ifield f-bitbase32-24-s11-prefixed) (or (mul (ifield f-dsp-24-s8) 8)
(ifield f-bitno32-prefixed)))
)
)
)
(sequence () ; extract
(set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
- (or (sll (ifield f-dsp-32-s8) 11)
+ (or (mul (ifield f-dsp-32-s8) 2048)
(ifield f-bitno32-prefixed))))
)
)
)
(df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
- (srl (and (sub value (add pc 1)) #xffff) 8)))
- ((value pc) (add SI (or (srl (and value #xffff) 8)
- (sra (sll (and value #xff) 24) 16)) (add pc 1)))
+ (srl (and (sub value (add pc 1)) #xff00) 8)))
+ ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8)
+ (sll (and value #xff) 8))
+ #x8000)
+ #x8000)
+ (add pc 1)))
)
(df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
((value pc) (or SI
(indices keyword "" (("r2r0" 0) ("r3r1" 1)))
(get (index) (or SI
(and (reg h-gr index) #xffff)
- (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
+ (sll (and (reg h-gr (add index 2)) #xffff) 16)))
(set (index newval) (sequence ()
(set (reg h-gr index) (and newval #xffff))
(set (reg h-gr (add index 2)) (srl newval 16)))))
projects / deliverable / binutils-gdb.git / blobdiff