arch: Mass conversion of smp_mb__*()

[deliverable/linux.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_main.c

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index a78edaccceee92d8f2439ac40f3b3ba887ec0000..16391db2e8c9c35d8579e5032e60d9a5435ee477 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -1858,10 +1858,10 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe)
                return;
 #endif
 
-       smp_mb__before_atomic_inc();
+       smp_mb__before_atomic();
        atomic_inc(&bp->cq_spq_left);
        /* push the change in bp->spq_left and towards the memory */
-       smp_mb__after_atomic_inc();
+       smp_mb__after_atomic();
 
        DP(BNX2X_MSG_SP, "bp->cq_spq_left %x\n", atomic_read(&bp->cq_spq_left));
 
@@ -1876,11 +1876,11 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe)
                 * sp_state is cleared, and this order prevents
                 * races
                 */
-               smp_mb__before_clear_bit();
+               smp_mb__before_atomic();
                set_bit(BNX2X_AFEX_PENDING_VIFSET_MCP_ACK, &bp->sp_state);
                wmb();
                clear_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);
-               smp_mb__after_clear_bit();
+               smp_mb__after_atomic();
 
                /* schedule the sp task as mcp ack is required */
                bnx2x_schedule_sp_task(bp);
@@ -5272,9 +5272,9 @@ static void bnx2x_after_function_update(struct bnx2x *bp)
                __clear_bit(RAMROD_COMP_WAIT, &queue_params.ramrod_flags);
 
                /* mark latest Q bit */
-               smp_mb__before_clear_bit();
+               smp_mb__before_atomic();
                set_bit(BNX2X_AFEX_FCOE_Q_UPDATE_PENDING, &bp->sp_state);
-               smp_mb__after_clear_bit();
+               smp_mb__after_atomic();
 
                /* send Q update ramrod for FCoE Q */
                rc = bnx2x_queue_state_change(bp, &queue_params);
@@ -5500,7 +5500,7 @@ next_spqe:
                spqe_cnt++;
        } /* for */
 
-       smp_mb__before_atomic_inc();
+       smp_mb__before_atomic();
        atomic_add(spqe_cnt, &bp->eq_spq_left);
 
        bp->eq_cons = sw_cons;
@@ -13869,9 +13869,9 @@ static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl)
        case DRV_CTL_RET_L2_SPQ_CREDIT_CMD: {
                int count = ctl->data.credit.credit_count;
 
-               smp_mb__before_atomic_inc();
+               smp_mb__before_atomic();
                atomic_add(count, &bp->cq_spq_left);
-               smp_mb__after_atomic_inc();
+               smp_mb__after_atomic();
                break;
        }
        case DRV_CTL_ULP_REGISTER_CMD: {