gdb: add target_ops::supports_displaced_step

[deliverable/binutils-gdb.git] / gas / NEWS

diff --git a/gas/NEWS b/gas/NEWS
index aaf857292c3e1e138d1a227264cabd0a6e2ca7aa..815359b08fb029bd3503749c9daa10078db97ccd 100644 (file)
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,37 @@
 -*- text -*-
 
+* Extend .symver directive to update visibility of the original symbol
+  and assign one original symbol to different versioned symbols.
+
+* Add support for Intel SERIALIZE and TSXLDTRK instructions.
+
+* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
+  -mlfence-before-ret= options to x86 assembler to help mitigate
+  CVE-2020-0551.
+
+* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
+  (if such output is being generated).  Added the ability to generate
+  version 5 .debug_line sections.
+
+* Add -mbig-obj support to i386 MingW targets.
+
+Changes in 2.34:
+
+* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
+  -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
+  options to x86 assembler to align branches within a fixed boundary
+  with segment prefixes or NOPs.
+
+* Add support for Zilog eZ80 and Zilog Z180 CPUs.
+
+* Add support for z80-elf target.
+
+* Add support for relocation of each byte or word of multibyte value to Z80
+  targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
+  with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
+
+* Add SDCC support for Z80 targets.
+
 Changes in 2.33:
 
 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
@@ -797,7 +829,7 @@ Changes in 1.93.01:
   of new CPUs and formats, lots of bugs fixed.
 
 \f
-Copyright (C) 2012-2019 Free Software Foundation, Inc.
+Copyright (C) 2012-2020 Free Software Foundation, Inc.
 
 Copying and distribution of this file, with or without modification,
 are permitted in any medium without royalty provided the copyright