Fix AArch64 encodings for by element instructions.

[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / advsimd-armv8_3.s

diff --git a/gas/testsuite/gas/aarch64/advsimd-armv8_3.s b/gas/testsuite/gas/aarch64/advsimd-armv8_3.s
index bfb94e546b3f89a21176a49fe764bf4365f5619d..93332daf58ce34b9ee8b4e84ef794d5b8fd4094a 100644 (file)
--- a/gas/testsuite/gas/aarch64/advsimd-armv8_3.s
+++ b/gas/testsuite/gas/aarch64/advsimd-armv8_3.s
@@ -1,36 +1,64 @@
 /* Test file for ARMv8.3 complex arithmetics instructions.  */
        .text
 
-       /* Three-same operands FCMLA.  */
-       fcmla   v1.2d, v2.2d, v3.2d, #0
-       fcmla   v1.2d, v2.2d, v3.2d, #90
-       fcmla   v1.2d, v2.2d, v3.2d, #180
-       fcmla   v1.2d, v2.2d, v3.2d, #270
+       .macro three_same op, sz
+       .irp rot, 0, 90, 180, 270
+       .irp d, 1.\sz, 2.\sz, 5.\sz, 13.\sz, 27.\sz
+       .irp m, 2.\sz, 3.\sz, 5.\sz, 14.\sz, 31.\sz
+       .irp n, 3.\sz, 4.\sz, 6.\sz, 15.\sz, 30.\sz
+               \op v\d, v\m, v\n, #\rot
+       .endr
+       .endr
+       .endr
+       .endr
+       .endm
+
+       .macro three_element op, sz1, sz2, idx
+       .irp rot, 0, 90, 180, 270
+       .irp d, 1.\sz1, 2.\sz1, 5.\sz1, 13.\sz1, 27.\sz1
+       .irp m, 2.\sz1, 3.\sz1, 5.\sz1, 14.\sz1, 31.\sz1
+       .irp n, 3.\sz2, 4.\sz2, 6.\sz2, 15.\sz2, 30.\sz2
+               \op v\d, v\m, v\n[\idx], #\rot
+       .endr
+       .endr
+       .endr
+       .endr
+       .endm
 
-       fcmla   v1.2s, v2.2s, v3.2s, #90
-       fcmla   v1.4s, v2.4s, v3.4s, #90
-       fcmla   v1.4h, v2.4h, v3.4h, #90
-       fcmla   v1.8h, v2.8h, v3.8h, #90
+       .macro three_same_rot op, sz
+       .irp rot, 90, 270
+       .irp d, 1.\sz, 2.\sz, 5.\sz, 13.\sz, 27.\sz
+       .irp m, 2.\sz, 3.\sz, 5.\sz, 14.\sz, 31.\sz
+       .irp n, 3.\sz, 4.\sz, 6.\sz, 15.\sz, 30.\sz
+               \op v\d, v\m, v\n, #\rot
+       .endr
+       .endr
+       .endr
+       .endr
+       .endm
+
+       /* Three-same operands FCMLA.  */
+       three_same fcmla, 2d
+       three_same fcmla, 2s
+       three_same fcmla, 4s
+       three_same fcmla, 4h
+       three_same fcmla, 8h
 
        /* Indexed element FCMLA.  */
-       fcmla   v1.4s, v2.4s, v3.s[0], #0
-       fcmla   v1.4s, v2.4s, v3.s[0], #90
-       fcmla   v1.4s, v2.4s, v3.s[0], #180
-       fcmla   v1.4s, v2.4s, v3.s[0], #270
-       fcmla   v1.4s, v2.4s, v3.s[1], #90
-
-       fcmla   v1.4h, v2.4h, v3.h[0], #90
-       fcmla   v1.4h, v2.4h, v3.h[1], #90
-       fcmla   v1.8h, v2.8h, v3.h[0], #90
-       fcmla   v1.8h, v2.8h, v3.h[1], #90
-       fcmla   v1.8h, v2.8h, v3.h[2], #90
-       fcmla   v1.8h, v2.8h, v3.h[3], #90
+       three_element fcmla, 4s, s, 0
+       three_element fcmla, 4s, s, 1
 
-       /* Three-same operands FADD.  */
-       fcadd   v1.2d, v2.2d, v3.2d, #90
-       fcadd   v1.2d, v2.2d, v3.2d, #270
+       three_element fcmla, 4h, h, 0
+       three_element fcmla, 4h, h, 1
+
+       three_element fcmla, 8h, h, 0
+       three_element fcmla, 8h, h, 1
+       three_element fcmla, 8h, h, 2
+       three_element fcmla, 8h, h, 3
 
-       fcadd   v1.2s, v2.2s, v3.2s, #90
-       fcadd   v1.4s, v2.4s, v3.4s, #90
-       fcadd   v1.4h, v2.4h, v3.4h, #90
-       fcadd   v1.8h, v2.8h, v3.8h, #90
+       /* Three-same operands FADD.  */
+       three_same_rot fcadd, 2d
+       three_same_rot fcadd, 2s
+       three_same_rot fcadd, 4s
+       three_same_rot fcadd, 4h
+       three_same_rot fcadd, 8h