Improve -mlfence-after-load

[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-lfence-ret-a.d

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
index 26e5b48bec337f617a223177e3f0bc3ffad9a6a2..345217b17c725358b2f98265a22551c3db52a4ba 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-a.d
@@ -1,6 +1,7 @@
-#source: lfence-ret.s
+#source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=or
-#objdump: -dw
+#warning_output: x86-64-lfence-ret.e
+#objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=or
 
 .*: +file format .*
@@ -9,10 +10,40 @@
 Disassembly of section .text:
 
 0+ <_start>:
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 c3                   data16 retq 
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 c2 14 00             data16 retq \$0x14
  +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c3                      retq   
  +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                retq   \$0x1e
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 48 c3                data16 rex.W retq 
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
+ +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 cb                   lretw  
+ +[a-f0-9]+:   66 83 0c 24 00          orw    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
+ +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   cb                      lret   
+ +[a-f0-9]+:   83 0c 24 00             orl    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   ca 28 00                lret   \$0x28
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   48 cb                   lretq  
+ +[a-f0-9]+:   48 83 0c 24 00          orq    \$0x0,\(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass