/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
- Copyright (C) 1993-2015 Free Software Foundation, Inc.
+ Copyright (C) 1993-2020 Free Software Foundation, Inc.
This file is part of GDB.
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
-#include "doublest.h"
#include "frame.h"
#include "frame-unwind.h"
#include "frame-base.h"
-#include "dwarf2-frame.h"
+#include "dwarf2/frame.h"
#include "inferior.h"
#include "symtab.h"
#include "value.h"
#include "elf-bfd.h"
#include "alpha-tdep.h"
+#include <algorithm>
/* Instruction decoding. The notations for registers, immediates and
opcodes are the same as the one used in Compaq's Alpha architecture
alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- ULONGEST mem = extract_unsigned_integer (in, 4, byte_order);
+ ULONGEST mem
+ = extract_unsigned_integer ((const gdb_byte *) in, 4, byte_order);
ULONGEST frac = (mem >> 0) & 0x7fffff;
ULONGEST sign = (mem >> 31) & 1;
ULONGEST exp_msb = (mem >> 30) & 1;
}
reg = (sign << 63) | (exp << 52) | (frac << 29);
- store_unsigned_integer (out, 8, byte_order, reg);
+ store_unsigned_integer ((gdb_byte *) out, 8, byte_order, reg);
}
/* Similarly, this represents exactly the conversion performed by
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST reg, mem;
- reg = extract_unsigned_integer (in, 8, byte_order);
+ reg = extract_unsigned_integer ((const gdb_byte *) in, 8, byte_order);
mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
- store_unsigned_integer (out, 4, byte_order, mem);
+ store_unsigned_integer ((gdb_byte *) out, 4, byte_order, mem);
}
/* The alpha needs a conversion between register and memory format if the
register is a floating point register and memory format is float, as the
register format must be double or memory format is an integer with 4
- bytes or less, as the representation of integers in floating point
+ bytes, as the representation of integers in floating point
registers is different. */
static int
struct type *type)
{
return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
- && TYPE_LENGTH (type) != 8);
+ && TYPE_LENGTH (type) == 4);
}
static int
int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
- gdb_byte in[MAX_REGISTER_SIZE];
+ struct value *value = get_frame_register_value (frame, regnum);
- /* Convert to TYPE. */
- if (!get_frame_register_bytes (frame, regnum, 0,
- register_size (gdbarch, regnum),
- in, optimizedp, unavailablep))
- return 0;
+ gdb_assert (value != NULL);
+ *optimizedp = value_optimized_out (value);
+ *unavailablep = !value_entirely_available (value);
- if (TYPE_LENGTH (valtype) == 4)
+ if (*optimizedp || *unavailablep)
{
- alpha_sts (gdbarch, out, in);
- *optimizedp = *unavailablep = 0;
- return 1;
+ release_value (value);
+ return 0;
}
- error (_("Cannot retrieve value from floating point register"));
+ /* Convert to VALTYPE. */
+
+ gdb_assert (TYPE_LENGTH (valtype) == 4);
+ alpha_sts (gdbarch, out, value_contents_all (value));
+
+ release_value (value);
+ return 1;
}
static void
alpha_value_to_register (struct frame_info *frame, int regnum,
struct type *valtype, const gdb_byte *in)
{
- gdb_byte out[MAX_REGISTER_SIZE];
+ gdb_byte out[ALPHA_REGISTER_SIZE];
+
+ gdb_assert (TYPE_LENGTH (valtype) == 4);
+ gdb_assert (register_size (get_frame_arch (frame), regnum)
+ <= ALPHA_REGISTER_SIZE);
+ alpha_lds (get_frame_arch (frame), out, in);
- switch (TYPE_LENGTH (valtype))
- {
- case 4:
- alpha_lds (get_frame_arch (frame), out, in);
- break;
- default:
- error (_("Cannot store value in floating point register"));
- }
put_frame_register (frame, regnum, out);
}
alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int i;
- int accumulate_size = struct_return ? 8 : 0;
+ int accumulate_size = (return_method == return_method_struct) ? 8 : 0;
struct alpha_arg
{
const gdb_byte *contents;
int len;
int offset;
};
- struct alpha_arg *alpha_args
- = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
+ struct alpha_arg *alpha_args = XALLOCAVEC (struct alpha_arg, nargs);
struct alpha_arg *m_arg;
gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
int required_arg_regs;
struct type *arg_type = check_typedef (value_type (arg));
/* Cast argument to long if necessary as the compiler does it too. */
- switch (TYPE_CODE (arg_type))
+ switch (arg_type->code ())
{
case TYPE_CODE_INT:
case TYPE_CODE_BOOL:
/* Everything else goes to the stack. */
write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
}
- if (struct_return)
+ if (return_method == return_method_struct)
store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE,
byte_order, struct_addr);
/* Load the argument registers. */
for (i = 0; i < required_arg_regs; i++)
{
- regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
- arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
- regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
- arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
+ regcache->cooked_write (ALPHA_A0_REGNUM + i,
+ arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
+ regcache->cooked_write (ALPHA_FPA0_REGNUM + i,
+ arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
}
/* Finally, update the stack pointer. */
alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
ULONGEST l;
- switch (TYPE_CODE (valtype))
+ switch (valtype->code ())
{
case TYPE_CODE_FLT:
switch (TYPE_LENGTH (valtype))
{
case 4:
- regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
+ regcache->cooked_read (ALPHA_FP0_REGNUM, raw_buffer);
alpha_sts (gdbarch, valbuf, raw_buffer);
break;
case 8:
- regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_read (ALPHA_FP0_REGNUM, valbuf);
break;
case 16:
{
case 8:
/* ??? This isn't correct wrt the ABI, but it's what GCC does. */
- regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_read (ALPHA_FP0_REGNUM, valbuf);
break;
case 16:
- regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
- regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
+ regcache->cooked_read (ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_read (ALPHA_FP0_REGNUM + 1, valbuf + 8);
break;
case 32:
alpha_store_return_value (struct type *valtype, struct regcache *regcache,
const gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
ULONGEST l;
- switch (TYPE_CODE (valtype))
+ switch (valtype->code ())
{
case TYPE_CODE_FLT:
switch (TYPE_LENGTH (valtype))
{
case 4:
alpha_lds (gdbarch, raw_buffer, valbuf);
- regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
+ regcache->cooked_write (ALPHA_FP0_REGNUM, raw_buffer);
break;
case 8:
- regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_write (ALPHA_FP0_REGNUM, valbuf);
break;
case 16:
{
case 8:
/* ??? This isn't correct wrt the ABI, but it's what GCC does. */
- regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_write (ALPHA_FP0_REGNUM, valbuf);
break;
case 16:
- regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
- regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
+ regcache->cooked_write (ALPHA_FP0_REGNUM, valbuf);
+ regcache->cooked_write (ALPHA_FP0_REGNUM + 1, valbuf + 8);
break;
case 32:
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- enum type_code code = TYPE_CODE (type);
+ enum type_code code = type->code ();
if ((code == TYPE_CODE_STRUCT
|| code == TYPE_CODE_UNION
return 1;
}
\f
-static const gdb_byte *
-alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
-{
- static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
- *len = sizeof(break_insn);
- return break_insn;
-}
+constexpr gdb_byte alpha_break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
+
+typedef BP_MANIPULATION (alpha_break_insn) alpha_breakpoint;
\f
/* This returns the PC of the first insn after the prologue.
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[ALPHA_INSN_SIZE];
- int status;
+ int res;
- status = target_read_memory (pc, buf, sizeof (buf));
- if (status)
- memory_error (status, pc);
+ res = target_read_memory (pc, buf, sizeof (buf));
+ if (res != 0)
+ memory_error (TARGET_XFER_E_IO, pc);
return extract_unsigned_integer (buf, sizeof (buf), byte_order);
}
post_prologue_pc = alpha_after_prologue (pc);
if (post_prologue_pc != 0)
- return max (pc, post_prologue_pc);
+ return std::max (pc, post_prologue_pc);
/* Can't determine prologue from the symbol table, need to examine
instructions. */
is found, attempt to step through it. A breakpoint is placed at the end of
the sequence. */
-static int
-alpha_deal_with_atomic_sequence (struct frame_info *frame)
+static std::vector<CORE_ADDR>
+alpha_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_frame_arch (frame);
- struct address_space *aspace = get_frame_address_space (frame);
- CORE_ADDR pc = get_frame_pc (frame);
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR loc = pc;
CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
unsigned int insn = alpha_read_insn (gdbarch, loc);
/* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
if (INSN_OPCODE (insn) != ldl_l_opcode
&& INSN_OPCODE (insn) != ldq_l_opcode)
- return 0;
+ return {};
/* Assume that no atomic sequence is longer than "atomic_sequence_length"
instructions. */
immediate = (immediate ^ 0x400000) - 0x400000;
if (bc_insn_count >= 1)
- return 0; /* More than one branch found, fallback
- to the standard single-step code. */
+ return {}; /* More than one branch found, fallback
+ to the standard single-step code. */
breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
/* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
if (INSN_OPCODE (insn) != stl_c_opcode
&& INSN_OPCODE (insn) != stq_c_opcode)
- return 0;
+ return {};
closing_insn = loc;
loc += ALPHA_INSN_SIZE;
|| (breaks[1] >= pc && breaks[1] <= closing_insn)))
last_breakpoint = 0;
- /* Effectively inserts the breakpoints. */
+ std::vector<CORE_ADDR> next_pcs;
+
for (index = 0; index <= last_breakpoint; index++)
- insert_single_step_breakpoint (gdbarch, aspace, breaks[index]);
+ next_pcs.push_back (breaks[index]);
- return 1;
+ return next_pcs;
}
\f
struct gdbarch_tdep *tdep;
if (*this_prologue_cache)
- return *this_prologue_cache;
+ return (struct alpha_sigtramp_unwind_cache *) *this_prologue_cache;
info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
*this_prologue_cache = info;
const char *name;
/* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
- look at tramp-frame.h and other simplier per-architecture
+ look at tramp-frame.h and other simpler per-architecture
sigtramp unwinders. */
/* We shouldn't even bother to try if the OSABI didn't register a
- sigcontext_addr handler or pc_in_sigtramp hander. */
+ sigcontext_addr handler or pc_in_sigtramp handler. */
if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
return 0;
if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
int frame_reg, frame_size, return_reg, reg;
if (*this_prologue_cache)
- return *this_prologue_cache;
+ return (struct alpha_heuristic_unwind_cache *) *this_prologue_cache;
info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
*this_prologue_cache = info;
callable as an sfunc. Used by the "set heuristic-fence-post" command. */
static void
-reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
+reinit_frame_cache_sfunc (const char *args,
+ int from_tty, struct cmd_list_element *c)
{
reinit_frame_cache ();
}
-
-\f
-/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
- dummy frame. The frame ID's base needs to match the TOS value
- saved by save_dummy_frame_tos(), and the PC match the dummy frame's
- breakpoint. */
-
-static struct frame_id
-alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
-{
- ULONGEST base;
- base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
- return frame_id_build (base, get_frame_pc (this_frame));
-}
-
-static CORE_ADDR
-alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
-{
- ULONGEST pc;
- pc = frame_unwind_register_unsigned (next_frame, ALPHA_PC_REGNUM);
- return pc;
-}
-
\f
/* Helper routines for alpha*-nat.c files to move register sets to and
from core files. The UNIQUE pointer is allowed to be NULL, as most
alpha_supply_int_regs (struct regcache *regcache, int regno,
const void *r0_r30, const void *pc, const void *unique)
{
- const gdb_byte *regs = r0_r30;
+ const gdb_byte *regs = (const gdb_byte *) r0_r30;
int i;
for (i = 0; i < 31; ++i)
if (regno == i || regno == -1)
- regcache_raw_supply (regcache, i, regs + i * 8);
+ regcache->raw_supply (i, regs + i * 8);
if (regno == ALPHA_ZERO_REGNUM || regno == -1)
{
const gdb_byte zero[8] = { 0 };
- regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero);
+ regcache->raw_supply (ALPHA_ZERO_REGNUM, zero);
}
if (regno == ALPHA_PC_REGNUM || regno == -1)
- regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
+ regcache->raw_supply (ALPHA_PC_REGNUM, pc);
if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
- regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
+ regcache->raw_supply (ALPHA_UNIQUE_REGNUM, unique);
}
void
alpha_fill_int_regs (const struct regcache *regcache,
int regno, void *r0_r30, void *pc, void *unique)
{
- gdb_byte *regs = r0_r30;
+ gdb_byte *regs = (gdb_byte *) r0_r30;
int i;
for (i = 0; i < 31; ++i)
if (regno == i || regno == -1)
- regcache_raw_collect (regcache, i, regs + i * 8);
+ regcache->raw_collect (i, regs + i * 8);
if (regno == ALPHA_PC_REGNUM || regno == -1)
- regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
+ regcache->raw_collect (ALPHA_PC_REGNUM, pc);
if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
- regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
+ regcache->raw_collect (ALPHA_UNIQUE_REGNUM, unique);
}
void
alpha_supply_fp_regs (struct regcache *regcache, int regno,
const void *f0_f30, const void *fpcr)
{
- const gdb_byte *regs = f0_f30;
+ const gdb_byte *regs = (const gdb_byte *) f0_f30;
int i;
for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
if (regno == i || regno == -1)
- regcache_raw_supply (regcache, i,
- regs + (i - ALPHA_FP0_REGNUM) * 8);
+ regcache->raw_supply (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
if (regno == ALPHA_FPCR_REGNUM || regno == -1)
- regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
+ regcache->raw_supply (ALPHA_FPCR_REGNUM, fpcr);
}
void
alpha_fill_fp_regs (const struct regcache *regcache,
int regno, void *f0_f30, void *fpcr)
{
- gdb_byte *regs = f0_f30;
+ gdb_byte *regs = (gdb_byte *) f0_f30;
int i;
for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
if (regno == i || regno == -1)
- regcache_raw_collect (regcache, i,
- regs + (i - ALPHA_FP0_REGNUM) * 8);
+ regcache->raw_collect (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
if (regno == ALPHA_FPCR_REGNUM || regno == -1)
- regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
+ regcache->raw_collect (ALPHA_FPCR_REGNUM, fpcr);
}
\f
the target of the coming instruction and breakpoint it. */
static CORE_ADDR
-alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
+alpha_next_pc (struct regcache *regcache, CORE_ADDR pc)
{
- struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct gdbarch *gdbarch = regcache->arch ();
unsigned int insn;
unsigned int op;
int regno;
{
/* Jump format: target PC is:
RB & ~3 */
- return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
+ return (regcache_raw_get_unsigned (regcache, (insn >> 16) & 0x1f) & ~3);
}
if ((op & 0x30) == 0x30)
regno += gdbarch_fp0_regnum (gdbarch);
}
- rav = get_frame_register_signed (frame, regno);
+ rav = regcache_raw_get_signed (regcache, regno);
switch (op)
{
return (pc + ALPHA_INSN_SIZE);
}
-int
-alpha_software_single_step (struct frame_info *frame)
+std::vector<CORE_ADDR>
+alpha_software_single_step (struct regcache *regcache)
{
- struct gdbarch *gdbarch = get_frame_arch (frame);
- struct address_space *aspace = get_frame_address_space (frame);
- CORE_ADDR pc, next_pc;
+ struct gdbarch *gdbarch = regcache->arch ();
- pc = get_frame_pc (frame);
- next_pc = alpha_next_pc (frame, pc);
+ CORE_ADDR pc = regcache_read_pc (regcache);
- insert_single_step_breakpoint (gdbarch, aspace, next_pc);
- return 1;
+ std::vector<CORE_ADDR> next_pcs
+ = alpha_deal_with_atomic_sequence (gdbarch, pc);
+ if (!next_pcs.empty ())
+ return next_pcs;
+
+ CORE_ADDR next_pc = alpha_next_pc (regcache, pc);
+ return {next_pc};
}
\f
if (arches != NULL)
return arches->gdbarch;
- tdep = xmalloc (sizeof (struct gdbarch_tdep));
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* Lowest text address. This is used by heuristic_proc_start()
set_gdbarch_int_bit (gdbarch, 32);
set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_long_long_bit (gdbarch, 64);
+ set_gdbarch_wchar_bit (gdbarch, 64);
+ set_gdbarch_wchar_signed (gdbarch, 0);
set_gdbarch_float_bit (gdbarch, 32);
set_gdbarch_double_bit (gdbarch, 64);
set_gdbarch_long_double_bit (gdbarch, 64);
/* Prologue heuristics. */
set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
- /* Disassembler. */
- set_gdbarch_print_insn (gdbarch, print_insn_alpha);
-
/* Call info. */
set_gdbarch_return_value (gdbarch, alpha_return_value);
/* Settings for calling functions in the inferior. */
set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
- /* Methods for saving / extracting a dummy frame's ID. */
- set_gdbarch_dummy_id (gdbarch, alpha_dummy_id);
-
- /* Return the unwound PC value. */
- set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
-
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
- set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch,
+ alpha_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ alpha_breakpoint::bp_from_kind);
set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
/* Handles single stepping of atomic sequences. */
- set_gdbarch_software_single_step (gdbarch, alpha_deal_with_atomic_sequence);
+ set_gdbarch_software_single_step (gdbarch, alpha_software_single_step);
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
}
-extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
-
+void _initialize_alpha_tdep ();
void
-_initialize_alpha_tdep (void)
+_initialize_alpha_tdep ()
{
- struct cmd_list_element *c;
gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
projects / deliverable / binutils-gdb.git / blobdiff