static bool
amd64_has_unaligned_fields (struct type *type)
{
- if (TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION)
+ if (type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION)
{
- for (int i = 0; i < TYPE_NFIELDS (type); i++)
+ for (int i = 0; i < type->num_fields (); i++)
{
struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
int bitpos = TYPE_FIELD_BITPOS (type, i);
/* Ignore static fields, empty fields (for example nested
empty structures), and bitfields (these are handled by
the caller). */
- if (field_is_static (&TYPE_FIELD (type, i))
+ if (field_is_static (&type->field (i))
|| (TYPE_FIELD_BITSIZE (type, i) == 0
&& TYPE_LENGTH (subtype) == 0)
|| TYPE_FIELD_PACKED (type, i))
/* Ignore static fields, or empty fields, for example nested
empty structures.*/
- if (field_is_static (&TYPE_FIELD (type, i)) || bitsize == 0)
+ if (field_is_static (&type->field (i)) || bitsize == 0)
return;
- if (TYPE_CODE (subtype) == TYPE_CODE_STRUCT
- || TYPE_CODE (subtype) == TYPE_CODE_UNION)
+ if (subtype->code () == TYPE_CODE_STRUCT
+ || subtype->code () == TYPE_CODE_UNION)
{
/* Each field of an object is classified recursively. */
int j;
- for (j = 0; j < TYPE_NFIELDS (subtype); j++)
+ for (j = 0; j < subtype->num_fields (); j++)
amd64_classify_aggregate_field (subtype, j, theclass, bitpos);
return;
}
calculated according to the classes of the fields in the
eightbyte: */
- if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
+ if (type->code () == TYPE_CODE_ARRAY)
{
struct type *subtype = check_typedef (TYPE_TARGET_TYPE (type));
int i;
/* Structure or union. */
- gdb_assert (TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION);
+ gdb_assert (type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION);
- for (i = 0; i < TYPE_NFIELDS (type); i++)
+ for (i = 0; i < type->num_fields (); i++)
amd64_classify_aggregate_field (type, i, theclass, 0);
}
static void
amd64_classify (struct type *type, enum amd64_reg_class theclass[2])
{
- enum type_code code = TYPE_CODE (type);
+ enum type_code code = type->code ();
int len = TYPE_LENGTH (type);
theclass[0] = theclass[1] = AMD64_NO_CLASS;
gdb_byte *raw_insn;
};
-struct amd64_displaced_step_closure : public displaced_step_closure
+struct amd64_displaced_step_copy_insn_closure : public displaced_step_copy_insn_closure
{
- amd64_displaced_step_closure (int insn_buf_len)
+ amd64_displaced_step_copy_insn_closure (int insn_buf_len)
: insn_buf (insn_buf_len, 0)
{}
gdb::byte_vector insn_buf;
};
+typedef std::unique_ptr<amd64_displaced_step_copy_insn_closure>
+ amd64_displaced_step_copy_insn_closure_up;
+
/* WARNING: Keep onebyte_has_modrm, twobyte_has_modrm in sync with
../opcodes/i386-dis.c (until libopcodes exports them, or an alternative,
at which point delete these in favor of libopcodes' versions). */
We set base = pc + insn_length so we can leave disp unchanged. */
static void
-fixup_riprel (struct gdbarch *gdbarch, amd64_displaced_step_closure *dsc,
+fixup_riprel (struct gdbarch *gdbarch, amd64_displaced_step_copy_insn_closure *dsc,
CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
{
const struct amd64_insn *insn_details = &dsc->insn_details;
static void
fixup_displaced_copy (struct gdbarch *gdbarch,
- amd64_displaced_step_closure *dsc,
+ amd64_displaced_step_copy_insn_closure *dsc,
CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
{
const struct amd64_insn *details = &dsc->insn_details;
}
}
-displaced_step_closure_up
+displaced_step_copy_insn_closure_up
amd64_displaced_step_copy_insn (struct gdbarch *gdbarch,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
/* Extra space for sentinels so fixup_{riprel,displaced_copy} don't have to
continually watch for running off the end of the buffer. */
int fixup_sentinel_space = len;
- std::unique_ptr<amd64_displaced_step_closure> dsc
- (new amd64_displaced_step_closure (len + fixup_sentinel_space));
+ std::unique_ptr<amd64_displaced_step_copy_insn_closure> dsc
+ (new amd64_displaced_step_copy_insn_closure (len + fixup_sentinel_space));
gdb_byte *buf = &dsc->insn_buf[0];
struct amd64_insn *details = &dsc->insn_details;
}
/* This is a work around for a problem with g++ 4.8. */
- return displaced_step_closure_up (dsc.release ());
+ return displaced_step_copy_insn_closure_up (dsc.release ());
}
static int
void
amd64_displaced_step_fixup (struct gdbarch *gdbarch,
- struct displaced_step_closure *dsc_,
+ struct displaced_step_copy_insn_closure *dsc_,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
- amd64_displaced_step_closure *dsc = (amd64_displaced_step_closure *) dsc_;
+ amd64_displaced_step_copy_insn_closure *dsc = (amd64_displaced_step_copy_insn_closure *) dsc_;
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* The offset we applied to the instruction's address. */
ULONGEST insn_offset = to - from;
pushq %rbp 0x55
movl %esp, %ebp 0x89 0xe5 (or 0x8b 0xec)
+ The `endbr64` instruction can be found before these sequences, and will be
+ skipped if found.
+
Any function that doesn't start with one of these sequences will be
assumed to have no prologue and thus no valid frame pointer in
%rbp. */
struct amd64_frame_cache *cache)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ /* The `endbr64` instruction. */
+ static const gdb_byte endbr64[4] = { 0xf3, 0x0f, 0x1e, 0xfa };
/* There are two variations of movq %rsp, %rbp. */
static const gdb_byte mov_rsp_rbp_1[3] = { 0x48, 0x89, 0xe5 };
static const gdb_byte mov_rsp_rbp_2[3] = { 0x48, 0x8b, 0xec };
op = read_code_unsigned_integer (pc, 1, byte_order);
+ /* Check for the `endbr64` instruction, skip it if found. */
+ if (op == endbr64[0])
+ {
+ read_code (pc + 1, buf, 3);
+
+ if (memcmp (buf, &endbr64[1], 3) == 0)
+ pc += 4;
+
+ op = read_code_unsigned_integer (pc, 1, byte_order);
+ }
+
+ if (current_pc <= pc)
+ return current_pc;
+
if (op == 0x55) /* pushq %rbp */
{
/* Take into account that we've executed the `pushq %rbp' that
projects / deliverable / binutils-gdb.git / blobdiff