have_ptrace_getvrregs = 0;
return;
}
- perror_with_name ("Unable to fetch AltiVec register");
+ perror_with_name (_("Unable to fetch AltiVec register"));
}
/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
have_ptrace_getsetevrregs = 0;
else
/* Anything else needs to be reported. */
- perror_with_name ("Unable to fetch SPE registers");
+ perror_with_name (_("Unable to fetch SPE registers"));
}
}
}
else
internal_error (__FILE__, __LINE__,
- "fetch_register: unexpected byte order: %d",
+ _("fetch_register: unexpected byte order: %d"),
gdbarch_byte_order (current_gdbarch));
}
have_ptrace_getvrregs = 0;
return;
}
- perror_with_name ("Unable to fetch AltiVec registers");
+ perror_with_name (_("Unable to fetch AltiVec registers"));
}
supply_vrregset (®s);
}
have_ptrace_getvrregs = 0;
return;
}
- perror_with_name ("Unable to fetch AltiVec register");
+ perror_with_name (_("Unable to fetch AltiVec register"));
}
/* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
if (ret < 0)
- perror_with_name ("Unable to store AltiVec register");
+ perror_with_name (_("Unable to store AltiVec register"));
}
/* Assuming TID referrs to an SPE process, set the top halves of TID's
have_ptrace_getsetevrregs = 0;
else
/* Anything else needs to be reported. */
- perror_with_name ("Unable to set SPE registers");
+ perror_with_name (_("Unable to set SPE registers"));
}
}
}
have_ptrace_getvrregs = 0;
return;
}
- perror_with_name ("Couldn't get AltiVec registers");
+ perror_with_name (_("Couldn't get AltiVec registers"));
}
fill_vrregset (®s);
if (ptrace (PTRACE_SETVRREGS, tid, 0, ®s) < 0)
- perror_with_name ("Couldn't write AltiVec registers");
+ perror_with_name (_("Couldn't write AltiVec registers"));
}
static void