/* tic80.h -- Header file for TI TMS320C80 (MV) opcode table
- Copyright 1996, 1997, 1999 Free Software Foundation, Inc.
+ Copyright (C) 1996-2019 Free Software Foundation, Inc.
Written by Fred Fish (fnf@cygnus.com), Cygnus Support
-This file is part of GDB, GAS, and the GNU binutils.
+ This file is part of GDB, GAS, and the GNU binutils.
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
+ GDB, GAS, and the GNU binutils are free software; you can redistribute
+ them and/or modify them under the terms of the GNU General Public
+ License as published by the Free Software Foundation; either version 3,
+ or (at your option) any later version.
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
+ GDB, GAS, and the GNU binutils are distributed in the hope that they
+ will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+ the GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this file; see the file COPYING3. If not, write to the Free
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
#ifndef TIC80_H
#define TIC80_H
operand value is legal, *ERRMSG will be unchanged (most operands
can accept any value). */
- unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
- const char **errmsg));
+ unsigned long (*insert)
+ (unsigned long instruction, long op, const char **errmsg);
/* Extraction function. This is used by the disassembler. To
extract this operand type from an instruction, check this field.
this operand (i.e., the instruction does not match). If the
operand is valid, *INVALID will not be changed. */
- long (*extract) PARAMS ((unsigned long instruction, int *invalid));
+ long (*extract) (unsigned long instruction, int *invalid);
/* One bit syntax flags. */
/* This operand must be an even register number. Floating point numbers
for example are stored in even/odd register pairs. */
-#define TIC80_OPERAND_EVEN (1 << 0)
+#define TIC80_OPERAND_EVEN (1u << 0)
/* This operand must be an odd register number and must be one greater than
the register number of the previous operand. I.E. the second register in
an even/odd register pair. */
-#define TIC80_OPERAND_ODD (1 << 1)
+#define TIC80_OPERAND_ODD (1u << 1)
/* This operand takes signed values. */
-#define TIC80_OPERAND_SIGNED (1 << 2)
+#define TIC80_OPERAND_SIGNED (1u << 2)
/* This operand may be either a predefined constant name or a numeric value.
An example would be a condition code like "eq0.b" which has the numeric
value 0x2. */
-#define TIC80_OPERAND_NUM (1 << 3)
+#define TIC80_OPERAND_NUM (1u << 3)
/* This operand should be wrapped in parentheses rather than separated
from the previous one by a comma. This is used for various
instructions, like the load and store instructions, which want
their operands to look like "displacement(reg)" */
-#define TIC80_OPERAND_PARENS (1 << 4)
+#define TIC80_OPERAND_PARENS (1u << 4)
/* This operand is a PC relative branch offset. The disassembler prints
these symbolically if possible. Note that the offsets are taken as word
offsets. */
-#define TIC80_OPERAND_PCREL (1 << 5)
+#define TIC80_OPERAND_PCREL (1u << 5)
/* This flag is a hint to the disassembler for using hex as the prefered
printing format, even for small positive or negative immediate values.
Normally values in the range -999 to 999 are printed as signed decimal
values and other values are printed in hex. */
-#define TIC80_OPERAND_BITFIELD (1 << 6)
+#define TIC80_OPERAND_BITFIELD (1u << 6)
/* This operand may have a ":m" modifier specified by bit 17 in a short
immediate form instruction. */
-#define TIC80_OPERAND_M_SI (1 << 7)
+#define TIC80_OPERAND_M_SI (1u << 7)
/* This operand may have a ":m" modifier specified by bit 15 in a long
immediate or register form instruction. */
-#define TIC80_OPERAND_M_LI (1 << 8)
+#define TIC80_OPERAND_M_LI (1u << 8)
/* This operand may have a ":s" modifier specified in bit 11 in a long
immediate or register form instruction. */
-#define TIC80_OPERAND_SCALED (1 << 9)
+#define TIC80_OPERAND_SCALED (1u << 9)
/* This operand is a floating point value */
-#define TIC80_OPERAND_FLOAT (1 << 10)
+#define TIC80_OPERAND_FLOAT (1u << 10)
/* This operand is an byte offset from a base relocation. The lower
two bits of the final relocated address are ignored when the value is
written to the program counter. */
-#define TIC80_OPERAND_BASEREL (1 << 11)
+#define TIC80_OPERAND_BASEREL (1u << 11)
/* This operand is an "endmask" field for a shift instruction.
It is treated special in that it can have values of 0-32,
has no way of knowing from the instruction which value was
given at assembly time, so it just uses '0'. */
-#define TIC80_OPERAND_ENDMASK (1 << 12)
+#define TIC80_OPERAND_ENDMASK (1u << 12)
/* This operand is one of the 32 general purpose registers.
The disassembler prints these with a leading 'r'. */
-#define TIC80_OPERAND_GPR (1 << 27)
+#define TIC80_OPERAND_GPR (1u << 27)
/* This operand is a floating point accumulator register.
The disassembler prints these with a leading 'a'. */
-#define TIC80_OPERAND_FPA ( 1 << 28)
+#define TIC80_OPERAND_FPA (1u << 28)
/* This operand is a control register number, either numeric or
symbolic (like "EIF", "EPC", etc).
The disassembler prints these symbolically. */
-#define TIC80_OPERAND_CR (1 << 29)
+#define TIC80_OPERAND_CR (1u << 29)
/* This operand is a condition code, either numeric or
symbolic (like "eq0.b", "ne0.w", etc).
The disassembler prints these symbolically. */
-#define TIC80_OPERAND_CC (1 << 30)
+#define TIC80_OPERAND_CC (1u << 30)
/* This operand is a bit number, either numeric or
symbolic (like "eq.b", "or.f", etc).
Note that they appear in the instruction in 1's complement relative
to the values given in the manual. */
-#define TIC80_OPERAND_BITNUM (1 << 31)
+#define TIC80_OPERAND_BITNUM (1u << 31)
/* This mask is used to strip operand bits from an int that contains
both operand bits and a numeric value in the lsbs. */
#define PDS_NAME(pdsp) ((pdsp) -> name)
#define PDS_VALUE(pdsp) ((pdsp) -> value)
-extern const struct predefined_symbol tic80_predefined_symbols[]; /* Translation array */
-extern const int tic80_num_predefined_symbols; /* How many members in the array */
+/* Translation array. */
+extern const struct predefined_symbol tic80_predefined_symbols[];
+/* How many members in the array. */
+extern const int tic80_num_predefined_symbols;
-const char *tic80_value_to_symbol PARAMS ((int val, int class)); /* Translate value to symbolic name */
-int tic80_symbol_to_value PARAMS ((char *name, int class)); /* Translate symbolic name to value */
+/* Translate value to symbolic name. */
+const char *tic80_value_to_symbol (int val, int class);
-const struct predefined_symbol *
-tic80_next_predefined_symbol PARAMS ((const struct predefined_symbol *));
+/* Translate symbolic name to value. */
+int tic80_symbol_to_value (char *name, int class);
+
+const struct predefined_symbol *tic80_next_predefined_symbol
+ (const struct predefined_symbol *);
#endif /* TIC80_H */