RISC-V: Optimize lui and auipc relaxations for undefweak symbol.

[deliverable/binutils-gdb.git] / ld / testsuite / ld-riscv-elf / weakref32.d

diff --git a/ld/testsuite/ld-riscv-elf/weakref32.d b/ld/testsuite/ld-riscv-elf/weakref32.d
index 5ede7cb7f657db7ddabdb7755e7032a23178ba78..eaeb6dae7e358aa93eac557e45fc522351bfb128 100644 (file)
--- a/ld/testsuite/ld-riscv-elf/weakref32.d
+++ b/ld/testsuite/ld-riscv-elf/weakref32.d
@@ -5,15 +5,16 @@
 Disassembly of section \.text:
 
 90000000 <_start>:
-90000000:      70000797                auipc   a5,0x70000
-90000004:      00078793                mv      a5,a5
-90000008:      02078263                beqz    a5,9000002c <_start\+0x2c>
-9000000c:      ff010113                addi    sp,sp,-16
-90000010:      00112623                sw      ra,12\(sp\)
-90000014:      00000097                auipc   ra,0x0
-90000018:      000000e7                jalr    zero # 0 <_start\-0x90000000>
-9000001c:      00c12083                lw      ra,12\(sp\)
-90000020:      01010113                addi    sp,sp,16
-90000024:      00000317                auipc   t1,0x0
-90000028:      00000067                jr      zero # 0 <_start\-0x90000000>
-9000002c:      00008067                ret
+90000000:      00000793                li      a5,0
+90000004:      02078663                beqz    a5,90000030 <_start\+0x30>
+90000008:      00000793                li      a5,0
+9000000c:      02078263                beqz    a5,90000030 <_start\+0x30>
+90000010:      ff010113                addi    sp,sp,-16
+90000014:      00112623                sw      ra,12\(sp\)
+90000018:      00000097                auipc   ra,0x0
+9000001c:      000000e7                jalr    zero # 0 <_start\-0x90000000>
+90000020:      00c12083                lw      ra,12\(sp\)
+90000024:      01010113                addi    sp,sp,16
+90000028:      00000317                auipc   t1,0x0
+9000002c:      00000067                jr      zero # 0 <_start\-0x90000000>
+90000030:      00008067                ret