[AArch64, Binutils] Add missing TSB instruction

[deliverable/binutils-gdb.git] / opcodes / aarch64-tbl.h

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 3c3731d6d0e30e6fa2dc2d144e39ca0bb56d0f91..46c0386eedf97bf0a938c793dce3de68133d3eec 100644 (file)
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -3841,6 +3841,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
   CORE_INSN ("autib1716", 0xd50321df, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
   CORE_INSN ("esb", 0xd503221f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
   CORE_INSN ("psb", 0xd503223f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
+  CORE_INSN ("tsb", 0xd503225f, 0xffffffff, ic_system, 0, OP1 (BARRIER_PSB), {}, F_ALIAS),
   CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
   CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
   CORE_INSN ("ssbb", 0xd503309f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
@@ -5314,8 +5315,8 @@ struct aarch64_opcode aarch64_opcode_table[] =
       "the ISB option name SY or an optional 4-bit unsigned immediate")        \
     Y(SYSTEM, prfop, "PRFOP", 0, F(),                                  \
       "a prefetch operation specifier")                                        \
-    Y(SYSTEM, hint, "BARRIER_PSB", 0, F (),                            \
-      "the PSB option name CSYNC")                                     \
+    Y(SYSTEM, none, "BARRIER_PSB", 0, F (),                            \
+      "the PSB/TSB option name CSYNC")                                 \
     Y(SYSTEM, hint, "BTI", 0, F (),                                    \
       "BTI targets j/c/jc")                                            \
     Y(ADDRESS, sve_addr_ri_s4, "SVE_ADDR_RI_S4x16",                    \