static void OP_XS (int, int);
static void OP_M (int, int);
static void OP_VEX (int, int);
+static void OP_VexW (int, int);
static void OP_EX_Vex (int, int);
-static void OP_EX_VexW (int, int);
-static void OP_EX_VexImmW (int, int);
static void OP_XMM_Vex (int, int);
-static void OP_XMM_VexW (int, int);
static void OP_Rounding (int, int);
static void OP_REG_VexI4 (int, int);
+static void OP_VexI4 (int, int);
static void PCLMUL_Fixup (int, int);
static void VCMP_Fixup (int, int);
static void VPCMP_Fixup (int, int);
static void PCMPESTR_Fixup (int, int);
static void OP_LWPCB_E (int, int);
static void OP_LWP_E (int, int);
-static void OP_Vex_2src_1 (int, int);
-static void OP_Vex_2src_2 (int, int);
static void MOVBE_Fixup (int, int);
static void MOVSXD_Fixup (int, int);
#define CMP { CMP_Fixup, 0 }
#define XMM0 { XMM_Fixup, 0 }
#define FXSAVE { FXSAVE_Fixup, 0 }
-#define Vex_2src_1 { OP_Vex_2src_1, 0 }
-#define Vex_2src_2 { OP_Vex_2src_2, 0 }
#define Vex { OP_VEX, vex_mode }
+#define VexW { OP_VexW, vex_mode }
#define VexScalar { OP_VEX, vex_scalar_mode }
#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
#define Vex128 { OP_VEX, vex128_mode }
#define VexGdq { OP_VEX, dq_mode }
#define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode }
#define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode }
-#define EXVexW { OP_EX_VexW, x_mode }
-#define EXdVexW { OP_EX_VexW, d_mode }
-#define EXqVexW { OP_EX_VexW, q_mode }
-#define EXVexImmW { OP_EX_VexImmW, x_mode }
#define XMVexScalar { OP_XMM_Vex, scalar_mode }
-#define XMVexW { OP_XMM_VexW, 0 }
#define XMVexI4 { OP_REG_VexI4, x_mode }
+#define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
+#define VexI4 { OP_VexI4, 0 }
#define PCLMUL { PCLMUL_Fixup, 0 }
#define VCMP { VCMP_Fixup, 0 }
#define VPCMP { VPCMP_Fixup, 0 }
MOD_EVEX_0F16_PREFIX_2,
MOD_EVEX_0F17,
MOD_EVEX_0F2B,
+ MOD_EVEX_0F381A_P_2_W_0,
+ MOD_EVEX_0F381A_P_2_W_1,
+ MOD_EVEX_0F381B_P_2_W_0,
+ MOD_EVEX_0F381B_P_2_W_1,
+ MOD_EVEX_0F385A_P_2_W_0,
+ MOD_EVEX_0F385A_P_2_W_1,
+ MOD_EVEX_0F385B_P_2_W_0,
+ MOD_EVEX_0F385B_P_2_W_1,
MOD_EVEX_0F38C6_REG_1,
MOD_EVEX_0F38C6_REG_2,
MOD_EVEX_0F38C6_REG_5,
PREFIX_EVEX_0F5D,
PREFIX_EVEX_0F5E,
PREFIX_EVEX_0F5F,
- PREFIX_EVEX_0F62,
PREFIX_EVEX_0F64,
PREFIX_EVEX_0F65,
PREFIX_EVEX_0F66,
- PREFIX_EVEX_0F6A,
- PREFIX_EVEX_0F6B,
- PREFIX_EVEX_0F6C,
- PREFIX_EVEX_0F6D,
PREFIX_EVEX_0F6E,
PREFIX_EVEX_0F6F,
PREFIX_EVEX_0F70,
PREFIX_EVEX_0FC2,
PREFIX_EVEX_0FC4,
PREFIX_EVEX_0FC5,
- PREFIX_EVEX_0FD2,
- PREFIX_EVEX_0FD3,
- PREFIX_EVEX_0FD4,
PREFIX_EVEX_0FD6,
PREFIX_EVEX_0FDB,
PREFIX_EVEX_0FDF,
PREFIX_EVEX_0FE7,
PREFIX_EVEX_0FEB,
PREFIX_EVEX_0FEF,
- PREFIX_EVEX_0FF2,
- PREFIX_EVEX_0FF3,
- PREFIX_EVEX_0FF4,
- PREFIX_EVEX_0FFA,
- PREFIX_EVEX_0FFB,
- PREFIX_EVEX_0FFE,
PREFIX_EVEX_0F380D,
PREFIX_EVEX_0F3810,
PREFIX_EVEX_0F3811,
PREFIX_EVEX_0F3828,
PREFIX_EVEX_0F3829,
PREFIX_EVEX_0F382A,
- PREFIX_EVEX_0F382B,
PREFIX_EVEX_0F382C,
PREFIX_EVEX_0F382D,
PREFIX_EVEX_0F3830,
PREFIX_EVEX_0F3A19,
PREFIX_EVEX_0F3A1A,
PREFIX_EVEX_0F3A1B,
- PREFIX_EVEX_0F3A1D,
PREFIX_EVEX_0F3A1E,
PREFIX_EVEX_0F3A1F,
PREFIX_EVEX_0F3A20,
VEX_LEN_0F3A61_P_2,
VEX_LEN_0F3A62_P_2,
VEX_LEN_0F3A63_P_2,
- VEX_LEN_0F3A6A_P_2,
- VEX_LEN_0F3A6B_P_2,
- VEX_LEN_0F3A6E_P_2,
- VEX_LEN_0F3A6F_P_2,
- VEX_LEN_0F3A7A_P_2,
- VEX_LEN_0F3A7B_P_2,
- VEX_LEN_0F3A7E_P_2,
- VEX_LEN_0F3A7F_P_2,
VEX_LEN_0F3ADF_P_2,
VEX_LEN_0F3AF0_P_3,
VEX_LEN_0FXOP_08_CC,
VEX_LEN_0FXOP_08_ED,
VEX_LEN_0FXOP_08_EE,
VEX_LEN_0FXOP_08_EF,
- VEX_LEN_0FXOP_09_80,
- VEX_LEN_0FXOP_09_81
+ VEX_LEN_0FXOP_09_82_W_0,
+ VEX_LEN_0FXOP_09_83_W_0,
};
enum
EVEX_LEN_0F6E_P_2 = 0,
EVEX_LEN_0F7E_P_1,
EVEX_LEN_0F7E_P_2,
+ EVEX_LEN_0FC4_P_2,
+ EVEX_LEN_0FC5_P_2,
EVEX_LEN_0FD6_P_2,
+ EVEX_LEN_0F3816_P_2,
EVEX_LEN_0F3819_P_2_W_0,
EVEX_LEN_0F3819_P_2_W_1,
- EVEX_LEN_0F381A_P_2_W_0,
- EVEX_LEN_0F381A_P_2_W_1,
- EVEX_LEN_0F381B_P_2_W_0,
- EVEX_LEN_0F381B_P_2_W_1,
- EVEX_LEN_0F385A_P_2_W_0,
- EVEX_LEN_0F385A_P_2_W_1,
- EVEX_LEN_0F385B_P_2_W_0,
- EVEX_LEN_0F385B_P_2_W_1,
+ EVEX_LEN_0F381A_P_2_W_0_M_0,
+ EVEX_LEN_0F381A_P_2_W_1_M_0,
+ EVEX_LEN_0F381B_P_2_W_0_M_0,
+ EVEX_LEN_0F381B_P_2_W_1_M_0,
+ EVEX_LEN_0F3836_P_2,
+ EVEX_LEN_0F385A_P_2_W_0_M_0,
+ EVEX_LEN_0F385A_P_2_W_1_M_0,
+ EVEX_LEN_0F385B_P_2_W_0_M_0,
+ EVEX_LEN_0F385B_P_2_W_1_M_0,
EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2,
EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C7_R_5_P_2_W_1,
EVEX_LEN_0F38C7_R_6_P_2_W_0,
EVEX_LEN_0F38C7_R_6_P_2_W_1,
+ EVEX_LEN_0F3A00_P_2_W_1,
+ EVEX_LEN_0F3A01_P_2_W_1,
+ EVEX_LEN_0F3A14_P_2,
+ EVEX_LEN_0F3A15_P_2,
+ EVEX_LEN_0F3A16_P_2,
+ EVEX_LEN_0F3A17_P_2,
EVEX_LEN_0F3A18_P_2_W_0,
EVEX_LEN_0F3A18_P_2_W_1,
EVEX_LEN_0F3A19_P_2_W_0,
EVEX_LEN_0F3A1A_P_2_W_1,
EVEX_LEN_0F3A1B_P_2_W_0,
EVEX_LEN_0F3A1B_P_2_W_1,
+ EVEX_LEN_0F3A20_P_2,
+ EVEX_LEN_0F3A21_P_2_W_0,
+ EVEX_LEN_0F3A22_P_2,
EVEX_LEN_0F3A23_P_2_W_0,
EVEX_LEN_0F3A23_P_2_W_1,
EVEX_LEN_0F3A38_P_2_W_0,
VEX_W_0F380D_P_2,
VEX_W_0F380E_P_2,
VEX_W_0F380F_P_2,
+ VEX_W_0F3813_P_2,
VEX_W_0F3816_P_2,
VEX_W_0F3818_P_2,
VEX_W_0F3819_P_2,
VEX_W_0F3A06_P_2,
VEX_W_0F3A18_P_2,
VEX_W_0F3A19_P_2,
+ VEX_W_0F3A1D_P_2,
VEX_W_0F3A30_P_2_LEN_0,
VEX_W_0F3A31_P_2_LEN_0,
VEX_W_0F3A32_P_2_LEN_0,
VEX_W_0F3A38_P_2,
VEX_W_0F3A39_P_2,
VEX_W_0F3A46_P_2,
- VEX_W_0F3A48_P_2,
- VEX_W_0F3A49_P_2,
VEX_W_0F3A4A_P_2,
VEX_W_0F3A4B_P_2,
VEX_W_0F3A4C_P_2,
VEX_W_0F3ACE_P_2,
VEX_W_0F3ACF_P_2,
+ VEX_W_0FXOP_09_80,
+ VEX_W_0FXOP_09_81,
+ VEX_W_0FXOP_09_82,
+ VEX_W_0FXOP_09_83,
+
EVEX_W_0F10_P_1,
EVEX_W_0F10_P_3,
EVEX_W_0F11_P_1,
EVEX_W_0F5E_P_3,
EVEX_W_0F5F_P_1,
EVEX_W_0F5F_P_3,
- EVEX_W_0F62_P_2,
+ EVEX_W_0F62,
EVEX_W_0F66_P_2,
- EVEX_W_0F6A_P_2,
- EVEX_W_0F6B_P_2,
- EVEX_W_0F6C_P_2,
- EVEX_W_0F6D_P_2,
+ EVEX_W_0F6A,
+ EVEX_W_0F6B,
+ EVEX_W_0F6C,
+ EVEX_W_0F6D,
EVEX_W_0F6F_P_1,
EVEX_W_0F6F_P_2,
EVEX_W_0F6F_P_3,
EVEX_W_0F7F_P_3,
EVEX_W_0FC2_P_1,
EVEX_W_0FC2_P_3,
- EVEX_W_0FD2_P_2,
- EVEX_W_0FD3_P_2,
- EVEX_W_0FD4_P_2,
+ EVEX_W_0FD2,
+ EVEX_W_0FD3,
+ EVEX_W_0FD4,
EVEX_W_0FD6_P_2,
EVEX_W_0FE6_P_1,
EVEX_W_0FE6_P_2,
EVEX_W_0FE6_P_3,
EVEX_W_0FE7_P_2,
- EVEX_W_0FF2_P_2,
- EVEX_W_0FF3_P_2,
- EVEX_W_0FF4_P_2,
- EVEX_W_0FFA_P_2,
- EVEX_W_0FFB_P_2,
- EVEX_W_0FFE_P_2,
+ EVEX_W_0FF2,
+ EVEX_W_0FF3,
+ EVEX_W_0FF4,
+ EVEX_W_0FFA,
+ EVEX_W_0FFB,
+ EVEX_W_0FFE,
EVEX_W_0F380D_P_2,
EVEX_W_0F3810_P_1,
EVEX_W_0F3810_P_2,
EVEX_W_0F3824_P_1,
EVEX_W_0F3825_P_1,
EVEX_W_0F3825_P_2,
- EVEX_W_0F3826_P_1,
- EVEX_W_0F3826_P_2,
- EVEX_W_0F3828_P_1,
EVEX_W_0F3828_P_2,
- EVEX_W_0F3829_P_1,
EVEX_W_0F3829_P_2,
EVEX_W_0F382A_P_1,
EVEX_W_0F382A_P_2,
- EVEX_W_0F382B_P_2,
+ EVEX_W_0F382B,
EVEX_W_0F3830_P_1,
EVEX_W_0F3831_P_1,
EVEX_W_0F3832_P_1,
EVEX_W_0F3835_P_1,
EVEX_W_0F3835_P_2,
EVEX_W_0F3837_P_2,
- EVEX_W_0F3838_P_1,
- EVEX_W_0F3839_P_1,
EVEX_W_0F383A_P_1,
- EVEX_W_0F3840_P_2,
EVEX_W_0F3852_P_1,
- EVEX_W_0F3854_P_2,
- EVEX_W_0F3855_P_2,
EVEX_W_0F3859_P_2,
EVEX_W_0F385A_P_2,
EVEX_W_0F385B_P_2,
EVEX_W_0F3862_P_2,
EVEX_W_0F3863_P_2,
- EVEX_W_0F3866_P_2,
- EVEX_W_0F3868_P_3,
EVEX_W_0F3870_P_2,
- EVEX_W_0F3871_P_2,
EVEX_W_0F3872_P_1,
EVEX_W_0F3872_P_2,
EVEX_W_0F3872_P_3,
- EVEX_W_0F3873_P_2,
- EVEX_W_0F3875_P_2,
EVEX_W_0F387A_P_2,
EVEX_W_0F387B_P_2,
- EVEX_W_0F387D_P_2,
EVEX_W_0F3883_P_2,
- EVEX_W_0F388D_P_2,
EVEX_W_0F3891_P_2,
EVEX_W_0F3893_P_2,
EVEX_W_0F38A1_P_2,
EVEX_W_0F3A19_P_2,
EVEX_W_0F3A1A_P_2,
EVEX_W_0F3A1B_P_2,
- EVEX_W_0F3A1D_P_2,
EVEX_W_0F3A21_P_2,
EVEX_W_0F3A23_P_2,
EVEX_W_0F3A38_P_2,
EVEX_W_0F3A39_P_2,
EVEX_W_0F3A3A_P_2,
EVEX_W_0F3A3B_P_2,
- EVEX_W_0F3A3E_P_2,
- EVEX_W_0F3A3F_P_2,
EVEX_W_0F3A42_P_2,
EVEX_W_0F3A43_P_2,
- EVEX_W_0F3A50_P_2,
- EVEX_W_0F3A51_P_2,
- EVEX_W_0F3A56_P_2,
- EVEX_W_0F3A57_P_2,
- EVEX_W_0F3A66_P_2,
- EVEX_W_0F3A67_P_2,
EVEX_W_0F3A70_P_2,
- EVEX_W_0F3A71_P_2,
EVEX_W_0F3A72_P_2,
- EVEX_W_0F3A73_P_2,
};
typedef void (*op_rtn) (int bytemode, int sizeflag);
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
"LW" => print 'd', 'q' depending on the VEX.W bit
+ "BW" => print 'b' or 'w' depending on the EVEX.W bit
"LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
an operand size prefix, or suffix_always is true. print
'q' if rex prefix is present.
vex;
static unsigned char need_vex;
static unsigned char need_vex_reg;
-static unsigned char vex_w_done;
struct op
{
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vcvtph2ps", { XM, EXxmmq }, 0 },
+ { VEX_W_TABLE (VEX_W_0F3813_P_2) },
},
/* PREFIX_VEX_0F3816 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vcvtps2ph", { EXxmmq, XM, Ib }, 0 },
+ { VEX_W_TABLE (VEX_W_0F3A1D_P_2) },
},
/* PREFIX_VEX_0F3A20 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A48_P_2) },
+ { "vpermil2ps", { XM, Vex, EXx, XMVexI4, VexI4 }, 0 },
},
/* PREFIX_VEX_0F3A49 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A49_P_2) },
+ { "vpermil2pd", { XM, Vex, EXx, XMVexI4, VexI4 }, 0 },
},
/* PREFIX_VEX_0F3A4A */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmaddsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmaddsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A5D */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmaddsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmaddsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A5E */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsubaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmsubaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A5F */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsubaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmsubaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A60 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A69 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A6A */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6A_P_2) },
+ { "vfmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A6B */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6B_P_2) },
+ { "vfmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A6C */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A6D */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfmsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfmsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A6E */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6E_P_2) },
+ { "vfmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A6F */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A6F_P_2) },
+ { "vfmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A78 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfnmaddps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfnmaddps", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A79 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfnmaddpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfnmaddpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A7A */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7A_P_2) },
+ { "vfnmaddss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A7B */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7B_P_2) },
+ { "vfnmaddsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A7C */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfnmsubps", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfnmsubps", { XM, Vex, EXx, XMVexI4 }, 0 },
{ Bad_Opcode },
},
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfnmsubpd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vfnmsubpd", { XM, Vex, EXx, XMVexI4 }, 0 },
},
/* PREFIX_VEX_0F3A7E */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7E_P_2) },
+ { "vfnmsubss", { XMScalar, VexScalar, EXxmm_md, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3A7F */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3A7F_P_2) },
+ { "vfnmsubsd", { XMScalar, VexScalar, EXxmm_mq, XMVexScalarI4 }, 0 },
},
/* PREFIX_VEX_0F3ACE */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacssww", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacssdql", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmacssww", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacsswd", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacssdql", { XM, Vex, EXx, XMVexI4 }, 0 },
/* 88 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacssdd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacssdqh", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmacssdd", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacssdqh", { XM, Vex, EXx, XMVexI4 }, 0 },
/* 90 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacsww", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsdql", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmacsww", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacswd", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacsdql", { XM, Vex, EXx, XMVexI4 }, 0 },
/* 98 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmacsdd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpmacsdqh", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmacsdd", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpmacsdqh", { XM, Vex, EXx, XMVexI4 }, 0 },
/* a0 */
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpcmov", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
- { "vpperm", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpcmov", { XM, Vex, EXx, XMVexI4 }, 0 },
+ { "vpperm", { XM, Vex, EXx, XMVexI4 }, 0 },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmadcsswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmadcsswd", { XM, Vex, EXx, XMVexI4 }, 0 },
{ Bad_Opcode },
/* a8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpmadcswd", { XMVexW, Vex, EXVexW, EXVexW }, 0 },
+ { "vpmadcswd", { XM, Vex, EXx, XMVexI4 }, 0 },
{ Bad_Opcode },
/* b8 */
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* c0 */
- { "vprotb", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotw", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotd", { XM, Vex_2src_1, Ib }, 0 },
- { "vprotq", { XM, Vex_2src_1, Ib }, 0 },
+ { "vprotb", { XM, EXx, Ib }, 0 },
+ { "vprotw", { XM, EXx, Ib }, 0 },
+ { "vprotd", { XM, EXx, Ib }, 0 },
+ { "vprotq", { XM, EXx, Ib }, 0 },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 80 */
- { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_80) },
- { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_81) },
- { "vfrczss", { XM, EXd }, 0 },
- { "vfrczsd", { XM, EXq }, 0 },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_80) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_81) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_82) },
+ { VEX_W_TABLE (VEX_W_0FXOP_09_83) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
/* 90 */
- { "vprotb", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotd", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vprotq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlb", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshld", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshlq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
+ { "vprotb", { XM, EXx, VexW }, 0 },
+ { "vprotw", { XM, EXx, VexW }, 0 },
+ { "vprotd", { XM, EXx, VexW }, 0 },
+ { "vprotq", { XM, EXx, VexW }, 0 },
+ { "vpshlb", { XM, EXx, VexW }, 0 },
+ { "vpshlw", { XM, EXx, VexW }, 0 },
+ { "vpshld", { XM, EXx, VexW }, 0 },
+ { "vpshlq", { XM, EXx, VexW }, 0 },
/* 98 */
- { "vpshab", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshaw", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshad", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
- { "vpshaq", { XM, Vex_2src_1, Vex_2src_2 }, 0 },
+ { "vpshab", { XM, EXx, VexW }, 0 },
+ { "vpshaw", { XM, EXx, VexW }, 0 },
+ { "vpshad", { XM, EXx, VexW }, 0 },
+ { "vpshaq", { XM, EXx, VexW }, 0 },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ "vpcmpistri", { XM, EXx, Ib }, 0 },
},
- /* VEX_LEN_0F3A6A_P_2 */
- {
- { "vfmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A6B_P_2 */
- {
- { "vfmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A6E_P_2 */
- {
- { "vfmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A6F_P_2 */
- {
- { "vfmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A7A_P_2 */
- {
- { "vfnmaddss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A7B_P_2 */
- {
- { "vfnmaddsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A7E_P_2 */
- {
- { "vfnmsubss", { XMVexW, Vex128, EXdVexW, EXdVexW }, 0 },
- },
-
- /* VEX_LEN_0F3A7F_P_2 */
- {
- { "vfnmsubsd", { XMVexW, Vex128, EXqVexW, EXqVexW }, 0 },
- },
-
/* VEX_LEN_0F3ADF_P_2 */
{
{ "vaeskeygenassist", { XM, EXx, Ib }, 0 },
{ "vpcomuq", { XM, Vex128, EXx, VPCOM }, 0 },
},
- /* VEX_LEN_0FXOP_09_80 */
+ /* VEX_LEN_0FXOP_09_82_W_0 */
{
- { "vfrczps", { XM, EXxmm }, 0 },
- { "vfrczps", { XM, EXymmq }, 0 },
+ { "vfrczss", { XM, EXd }, 0 },
},
- /* VEX_LEN_0FXOP_09_81 */
+ /* VEX_LEN_0FXOP_09_83_W_0 */
{
- { "vfrczpd", { XM, EXxmm }, 0 },
- { "vfrczpd", { XM, EXymmq }, 0 },
+ { "vfrczsd", { XM, EXq }, 0 },
},
};
/* VEX_W_0F380F_P_2 */
{ "vtestpd", { XM, EXx }, 0 },
},
+ {
+ /* VEX_W_0F3813_P_2 */
+ { "vcvtph2ps", { XM, EXxmmq }, 0 },
+ },
{
/* VEX_W_0F3816_P_2 */
{ "vpermps", { XM, Vex, EXx }, 0 },
/* VEX_W_0F3A19_P_2 */
{ "vextractf128", { EXxmm, XM, Ib }, 0 },
},
+ {
+ /* VEX_W_0F3A1D_P_2 */
+ { "vcvtps2ph", { EXxmmq, XM, EXxEVexS, Ib }, 0 },
+ },
{
/* VEX_W_0F3A30_P_2_LEN_0 */
{ MOD_TABLE (MOD_VEX_W_0_0F3A30_P_2_LEN_0) },
/* VEX_W_0F3A46_P_2 */
{ "vperm2i128", { XM, Vex256, EXx, Ib }, 0 },
},
- {
- /* VEX_W_0F3A48_P_2 */
- { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- },
- {
- /* VEX_W_0F3A49_P_2 */
- { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, EXVexImmW }, 0 },
- },
{
/* VEX_W_0F3A4A_P_2 */
{ "vblendvps", { XM, Vex, EXx, XMVexI4 }, 0 },
{ Bad_Opcode },
{ "vgf2p8affineinvqb", { XM, Vex, EXx, Ib }, 0 },
},
+ /* VEX_W_0FXOP_09_80 */
+ {
+ { "vfrczps", { XM, EXx }, 0 },
+ },
+ /* VEX_W_0FXOP_09_81 */
+ {
+ { "vfrczpd", { XM, EXx }, 0 },
+ },
+ /* VEX_W_0FXOP_09_82 */
+ {
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_82_W_0) },
+ },
+ /* VEX_W_0FXOP_09_83 */
+ {
+ { VEX_LEN_TABLE (VEX_LEN_0FXOP_09_83_W_0) },
+ },
#include "i386-dis-evex-w.h"
};
modrm.mod = (*codep >> 6) & 3;
modrm.reg = (*codep >> 3) & 7;
modrm.rm = *codep & 7;
+
+ /* No XOP encoding so far allows for a non-zero embedded prefix. Avoid
+ having to decode the bits for every otherwise valid encoding. */
+ if (vex.prefix)
+ return &bad_opcode;
break;
case USE_VEX_C4_TABLE:
need_vex = 0;
need_vex_reg = 0;
- vex_w_done = 0;
memset (&vex, 0, sizeof (vex));
if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
const char *p;
int alt = 0;
int cond = 1;
- unsigned int l = 0, len = 1;
+ unsigned int l = 0, len = 0;
char last[4];
-#define SAVE_LAST(c) \
- if (l < len && l < sizeof (last)) \
- last[l++] = c; \
- else \
- abort ();
-
for (p = in_template; *p; p++)
{
+ if (len > l)
+ {
+ if (l >= sizeof (last) || !ISUPPER (*p))
+ abort ();
+ last[l++] = *p;
+ continue;
+ }
switch (*p)
{
default:
*obufp++ = 'b';
break;
case 'B':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_B:
if (intel_syntax)
if (sizeflag & SUFFIX_ALWAYS)
*obufp++ = 'b';
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
if (address_mode == mode_64bit
&& !(prefixes & PREFIX_ADDR))
{
goto case_B;
}
+ else
+ abort ();
break;
case 'C':
if (intel_syntax && !alt)
*obufp++ = 'd';
break;
case 'Z':
- if (l != 0 || len != 1)
+ if (l != 0)
{
- if (l != 1 || len != 2 || last[0] != 'X')
- {
- SAVE_LAST (*p);
- break;
- }
+ if (l != 1 || last[0] != 'X')
+ abort ();
if (!need_vex || !vex.evex)
abort ();
if (intel_syntax
/* Fall through. */
goto case_L;
case 'L':
- if (l != 0 || len != 1)
- {
- SAVE_LAST (*p);
- break;
- }
+ if (l != 0)
+ abort ();
case_L:
if (intel_syntax)
break;
/* Fall through. */
goto case_P;
case 'P':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_P:
if (intel_syntax)
}
}
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1 || len != 2 || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
if ((prefixes & PREFIX_DATA)
|| (rex & REX_W)
|| (sizeflag & SUFFIX_ALWAYS))
}
}
}
+ else
+ abort ();
break;
case 'U':
if (intel_syntax)
/* Fall through. */
goto case_Q;
case 'Q':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_Q:
if (intel_syntax && !alt)
}
}
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1 || len != 2 || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
if ((intel_syntax && need_modrm)
|| (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
break;
|| (sizeflag & SUFFIX_ALWAYS))
*obufp++ = intel_syntax? 'd' : 'l';
}
+ else
+ abort ();
break;
case 'R':
USED_REX (REX_W);
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case 'V':
- if (l == 0 && len == 1)
+ if (l == 0)
{
if (intel_syntax)
break;
break;
}
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
if (rex & REX_W)
{
*obufp++ = 'a';
*obufp++ = 's';
}
}
+ else
+ abort ();
/* Fall through. */
goto case_S;
case 'S':
- if (l == 0 && len == 1)
+ if (l == 0)
{
case_S:
if (intel_syntax)
}
}
}
- else
+ else if (l == 1 && last[0] == 'L')
{
- if (l != 1
- || len != 2
- || last[0] != 'L')
- {
- SAVE_LAST (*p);
- break;
- }
-
if (address_mode == mode_64bit
&& !(prefixes & PREFIX_ADDR))
{
goto case_S;
}
+ else
+ abort ();
break;
case 'X':
- if (l != 0 || len != 1)
- {
- SAVE_LAST (*p);
- break;
- }
+ if (l != 0)
+ abort ();
if (need_vex
? vex.prefix == DATA_PREFIX_OPCODE
: prefixes & PREFIX_DATA)
*obufp++ = 's';
break;
case 'Y':
- if (l == 0 && len == 1)
- abort ();
- else
+ if (l == 1 && last[0] == 'X')
{
- if (l != 1 || len != 2 || last[0] != 'X')
- {
- SAVE_LAST (*p);
- break;
- }
if (!need_vex)
abort ();
if (intel_syntax
abort ();
}
}
+ else
+ abort ();
break;
case 'W':
- if (l == 0 && len == 1)
+ if (l == 0)
{
/* operand size flag for cwtl, cbtw */
USED_REX (REX_W);
if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
}
- else
+ else if (l == 1)
{
- if (l != 1
- || len != 2
- || (last[0] != 'X'
- && last[0] != 'L'))
- {
- SAVE_LAST (*p);
- break;
- }
if (!need_vex)
abort ();
if (last[0] == 'X')
*obufp++ = vex.w ? 'd': 's';
- else
+ else if (last[0] == 'L')
*obufp++ = vex.w ? 'q': 'd';
+ else if (last[0] == 'B')
+ *obufp++ = vex.w ? 'w': 'b';
+ else
+ abort ();
}
+ else
+ abort ();
break;
case '^':
if (intel_syntax)
}
break;
}
+
+ if (len == l)
+ len = l = 0;
}
*obufp = 0;
mnemonicendp = obufp;
oappend (names[reg]);
}
-/* Get the VEX immediate byte without moving codep. */
-
-static unsigned char
-get_vex_imm8 (int sizeflag, int opnum)
-{
- int bytes_before_imm = 0;
-
- if (modrm.mod != 3)
- {
- /* There are SIB/displacement bytes. */
- if ((sizeflag & AFLAG) || address_mode == mode_64bit)
- {
- /* 32/64 bit address mode */
- int base = modrm.rm;
-
- /* Check SIB byte. */
- if (base == 4)
- {
- FETCH_DATA (the_info, codep + 1);
- base = *codep & 7;
- /* When decoding the third source, don't increase
- bytes_before_imm as this has already been incremented
- by one in OP_E_memory while decoding the second
- source operand. */
- if (opnum == 0)
- bytes_before_imm++;
- }
-
- /* Don't increase bytes_before_imm when decoding the third source,
- it has already been incremented by OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- {
- switch (modrm.mod)
- {
- case 0:
- /* When modrm.rm == 5 or modrm.rm == 4 and base in
- SIB == 5, there is a 4 byte displacement. */
- if (base != 5)
- /* No displacement. */
- break;
- /* Fall through. */
- case 2:
- /* 4 byte displacement. */
- bytes_before_imm += 4;
- break;
- case 1:
- /* 1 byte displacement. */
- bytes_before_imm++;
- break;
- }
- }
- }
- else
- {
- /* 16 bit address mode */
- /* Don't increase bytes_before_imm when decoding the third source,
- it has already been incremented by OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- {
- switch (modrm.mod)
- {
- case 0:
- /* When modrm.rm == 6, there is a 2 byte displacement. */
- if (modrm.rm != 6)
- /* No displacement. */
- break;
- /* Fall through. */
- case 2:
- /* 2 byte displacement. */
- bytes_before_imm += 2;
- break;
- case 1:
- /* 1 byte displacement: when decoding the third source,
- don't increase bytes_before_imm as this has already
- been incremented by one in OP_E_memory while decoding
- the second source operand. */
- if (opnum == 0)
- bytes_before_imm++;
-
- break;
- }
- }
- }
- }
-
- FETCH_DATA (the_info, codep + bytes_before_imm + 1);
- return codep [bytes_before_imm];
-}
-
-static void
-OP_EX_VexReg (int bytemode, int sizeflag, int reg)
-{
- const char **names;
-
- if (reg == -1 && modrm.mod != 3)
- {
- OP_E_memory (bytemode, sizeflag);
- return;
- }
- else
- {
- if (reg == -1)
- {
- reg = modrm.rm;
- USED_REX (REX_B);
- if (rex & REX_B)
- reg += 8;
- }
- if (address_mode != mode_64bit)
- reg &= 7;
- }
-
- switch (vex.length)
- {
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- default:
- abort ();
- }
- oappend (names[reg]);
-}
-
-static void
-OP_EX_VexImmW (int bytemode, int sizeflag)
-{
- int reg = -1;
- static unsigned char vex_imm8;
-
- if (vex_w_done == 0)
- {
- vex_w_done = 1;
-
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- vex_imm8 = get_vex_imm8 (sizeflag, 0);
-
- if (vex.w)
- reg = vex_imm8 >> 4;
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
- }
- else if (vex_w_done == 1)
- {
- vex_w_done = 2;
-
- if (!vex.w)
- reg = vex_imm8 >> 4;
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
- }
- else
- {
- /* Output the imm8 directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, vex_imm8 & 0xf);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
- codep++;
- }
-}
-
-static void
-OP_Vex_2src (int bytemode, int sizeflag)
-{
- if (modrm.mod == 3)
- {
- int reg = modrm.rm;
- USED_REX (REX_B);
- if (rex & REX_B)
- reg += 8;
- oappend (names_xmm[reg]);
- }
- else
- {
- if (intel_syntax
- && (bytemode == v_mode || bytemode == v_swap_mode))
- {
- bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- OP_E (bytemode, sizeflag);
- }
-}
-
static void
-OP_Vex_2src_1 (int bytemode, int sizeflag)
+OP_VexW (int bytemode, int sizeflag)
{
- if (modrm.mod == 3)
- {
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
- }
+ OP_VEX (bytemode, sizeflag);
if (vex.w)
{
- unsigned int reg = vex.register_specifier;
- vex.register_specifier = 0;
-
- if (address_mode != mode_64bit)
- reg &= 7;
- oappend (names_xmm[reg]);
+ /* Swap 2nd and 3rd operands. */
+ strcpy (scratchbuf, op_out[2]);
+ strcpy (op_out[2], op_out[1]);
+ strcpy (op_out[1], scratchbuf);
}
- else
- OP_Vex_2src (bytemode, sizeflag);
-}
-
-static void
-OP_Vex_2src_2 (int bytemode, int sizeflag)
-{
- if (vex.w)
- OP_Vex_2src (bytemode, sizeflag);
- else
- {
- unsigned int reg = vex.register_specifier;
- vex.register_specifier = 0;
-
- if (address_mode != mode_64bit)
- reg &= 7;
- oappend (names_xmm[reg]);
- }
-}
-
-static void
-OP_EX_VexW (int bytemode, int sizeflag)
-{
- int reg = -1;
-
- if (!vex_w_done)
- {
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- if (vex.w)
- reg = get_vex_imm8 (sizeflag, 0) >> 4;
- }
- else
- {
- if (!vex.w)
- reg = get_vex_imm8 (sizeflag, 1) >> 4;
- }
-
- OP_EX_VexReg (bytemode, sizeflag, reg);
-
- if (vex_w_done)
- codep++;
- vex_w_done = 1;
}
static void
OP_REG_VexI4 (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
int reg;
- const char **names;
+ const char **names = names_xmm;
FETCH_DATA (the_info, codep + 1);
reg = *codep++;
- if (bytemode != x_mode)
+ if (bytemode != x_mode && bytemode != scalar_mode)
abort ();
reg >>= 4;
if (address_mode != mode_64bit)
reg &= 7;
- switch (vex.length)
+ if (bytemode == x_mode && vex.length == 256)
+ names = names_ymm;
+
+ oappend (names[reg]);
+
+ if (vex.w)
{
- case 128:
- names = names_xmm;
- break;
- case 256:
- names = names_ymm;
- break;
- default:
- abort ();
+ /* Swap 3rd and 4th operands. */
+ strcpy (scratchbuf, op_out[3]);
+ strcpy (op_out[3], op_out[2]);
+ strcpy (op_out[2], scratchbuf);
}
- oappend (names[reg]);
}
static void
-OP_XMM_VexW (int bytemode, int sizeflag)
+OP_VexI4 (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- /* Turn off the REX.W bit since it is used for swapping operands
- now. */
- rex &= ~REX_W;
- OP_XMM (bytemode, sizeflag);
+ scratchbuf[0] = '$';
+ print_operand_value (scratchbuf + 1, 1, codep[-1] & 0xf);
+ oappend_maybe_intel (scratchbuf);
}
static void
projects / deliverable / binutils-gdb.git / blobdiff