x86: refine when to trigger optimizations

[deliverable/binutils-gdb.git] / opcodes / ia64-waw.tbl

diff --git a/opcodes/ia64-waw.tbl b/opcodes/ia64-waw.tbl
index 82b9e839a58eaf1dd7468f42fc414578f7acb715..6fe9a843506c16e6573fcea60f338021047306ee 100644 (file)
--- a/opcodes/ia64-waw.tbl
+++ b/opcodes/ia64-waw.tbl
@@ -44,7 +44,7 @@ CFM;  IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi; IC:
 CPUID#;        IC:none;        IC:none;        none
 CR[CMCV];      IC:mov-to-CR-CMCV;      IC:mov-to-CR-CMCV;      impliedF
 CR[DCR];       IC:mov-to-CR-DCR;       IC:mov-to-CR-DCR;       impliedF
-CR[EOI];       IC:mov-to-CR-EOI;       IC:mov-to-CR-EOI;       SC Section 5.8.3.4, "End of External Interrupt Register (EOI Ð CR67)" on page 2:119
+CR[EOI];       IC:mov-to-CR-EOI;       IC:mov-to-CR-EOI;       SC Section 5.8.3.4, "End of External Interrupt Register (EOI - CR67)" on page 2:119
 CR[GPTA];      IC:mov-to-CR-GPTA;      IC:mov-to-CR-GPTA;      impliedF
 CR[IFA];       IC:mov-to-CR-IFA;       IC:mov-to-CR-IFA;       impliedF
 CR[IFS];       IC:mov-to-CR-IFS, cover;        IC:mov-to-CR-IFS, cover;        impliedF
@@ -67,6 +67,7 @@ CR[PMV];      IC:mov-to-CR-PMV;       IC:mov-to-CR-PMV;       impliedF
 CR[PTA];       IC:mov-to-CR-PTA;       IC:mov-to-CR-PTA;       impliedF
 CR[TPR];       IC:mov-to-CR-TPR;       IC:mov-to-CR-TPR;       impliedF
 CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127;        IC:none;        IC:none;        none
+DAHR%, % in 0-7;       IC:br.call, brl.call, br.ret, IC:mov-to-AR-BSPSTORE, IC:mov-to-DAHR, rfi;       IC:br.call, brl.call, br.ret, IC:mov-to-AR-BSPSTORE, IC:mov-to-DAHR, rfi;       implied
 DBR#;  IC:mov-to-IND-DBR+3;    IC:mov-to-IND-DBR+3;    impliedF
 DTC;   ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;      ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d;      none
 DTC;   ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d;  itc.i, itc.d, itr.i, itr.d;     impliedF