gdb: add target_ops::supports_displaced_step

[deliverable/binutils-gdb.git] / opcodes / m10200-opc.c

diff --git a/opcodes/m10200-opc.c b/opcodes/m10200-opc.c
index 7cb1bfe248493366d8efbec23dd61b043d6cf51d..c103e1d88a54bfe3f19780e8d99b10d5944eecce 100644 (file)
--- a/opcodes/m10200-opc.c
+++ b/opcodes/m10200-opc.c
@@ -1,5 +1,5 @@
 /* Assemble Matsushita MN10200 instructions.
-   Copyright 1996, 1997, 2000, 2005, 2007 Free Software Foundation, Inc.
+   Copyright (C) 1996-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -24,7 +24,7 @@
 \f
 const struct mn10200_operand mn10200_operands[] = {
 #define UNUSED 0
-  {0, 0, 0}, 
+  {0, 0, 0},
 
 /* dn register in the first register operand position.  */
 #define DN0      (UNUSED+1)
@@ -130,7 +130,7 @@ const struct mn10200_operand mn10200_operands[] = {
 
 /* Either an open paren or close paren.  */
 #define PAREN  (SIMM16N+1)
-  {0, 0, MN10200_OPERAND_PAREN}, 
+  {0, 0, MN10200_OPERAND_PAREN},
 
 /* dn register that appears in the first and second register positions.  */
 #define DN01     (PAREN+1)
@@ -139,10 +139,10 @@ const struct mn10200_operand mn10200_operands[] = {
 /* an register that appears in the first and second register positions.  */
 #define AN01     (DN01+1)
   {2, 0, MN10200_OPERAND_AREG | MN10200_OPERAND_REPEATED},
-} ; 
+} ;
 
-#define MEM(ADDR) PAREN, ADDR, PAREN 
-#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN 
+#define MEM(ADDR) PAREN, ADDR, PAREN
+#define MEM2(ADDR1,ADDR2) PAREN, ADDR1, ADDR2, PAREN
 \f
 /* The opcode table.