/* Instruction building/extraction support for m32c. -*- C -*-
-THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
-- the resultant file is machine generated, cgen-ibld.in isn't
+ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
+ - the resultant file is machine generated, cgen-ibld.in isn't
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
#include "opintl.h"
#include "safe-ctype.h"
-#undef min
+#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
-#undef max
+#undef max
#define max(a,b) ((a) > (b) ? (a) : (b))
/* Used by the ifield rtx function. */
if (length == 0)
return NULL;
-#if 0
- if (CGEN_INT_INSN_P
- && word_offset != 0)
- abort ();
-#endif
-
if (word_length > 32)
abort ();
#if CGEN_INT_INSN_P
/* Cover function to store an insn value into an integral insn. Must go here
- because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
+
because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
static void
put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
int shift = insn_length - length;
/* Written this way to avoid undefined behaviour. */
CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
*buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
}
}
{
unsigned long x;
int shift;
-#if 0
- int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
-#endif
+
x = cgen_get_insn_value (cd, bufp, word_length);
if (CGEN_INSN_LSB0_P)
return 1;
}
-#if 0
- if (CGEN_INT_INSN_P
- && word_offset != 0)
- abort ();
-#endif
-
if (word_length > 32)
abort ();
return CGEN_INSN_BITSIZE (insn);
}
\f
-/* machine generated code added here */
+/* Machine generated code added here. */
const char * m32c_cgen_insert_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
+ (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
/* Main entry point for operand insertion.
resolved during parsing. */
const char *
-m32c_cgen_insert_operand (cd, opindex, fields, buffer, pc)
- CGEN_CPU_DESC cd;
- int opindex;
- CGEN_FIELDS * fields;
- CGEN_INSN_BYTES_PTR buffer;
- bfd_vma pc ATTRIBUTE_UNUSED;
+m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc ATTRIBUTE_UNUSED)
{
const char * errmsg = NULL;
unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
}
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ {
+ long value = fields->f_dsp_8_u24;
+ value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+ errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
+ }
+ break;
case M32C_OPERAND_DSP_8_U6 :
errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
break;
{
long value = fields->f_lab_5_3;
value = ((value) - (((pc) + (2))));
- errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
+ errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
}
break;
case M32C_OPERAND_LAB_8_16 :
case M32C_OPERAND_LAB32_JMP_S :
{
{
- FLD (f_7_1) = ((((FLD (f_lab32_jmp_s)) - (pc))) & (1));
- FLD (f_2_2) = ((unsigned int) (((FLD (f_lab32_jmp_s)) - (pc))) >> (1));
+ SI tmp_val;
+ tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
+ FLD (f_7_1) = ((tmp_val) & (1));
+ FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
}
errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
if (errmsg)
}
int m32c_cgen_extract_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
- CGEN_FIELDS *, bfd_vma));
+ (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
/* Main entry point for operand extraction.
The result is <= 0 for error, >0 for success.
the handlers. */
int
-m32c_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc)
- CGEN_CPU_DESC cd;
- int opindex;
- CGEN_EXTRACT_INFO *ex_info;
- CGEN_INSN_INT insn_value;
- CGEN_FIELDS * fields;
- bfd_vma pc;
+m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS * fields,
+ bfd_vma pc)
{
/* Assume success (for those operands that are nops). */
int length = 1;
fields->f_dsp_8_u16 = value;
}
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ {
+ long value;
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
+ value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+ fields->f_dsp_8_u24 = value;
+ }
+ break;
case M32C_OPERAND_DSP_8_U6 :
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
break;
case M32C_OPERAND_LAB_5_3 :
{
long value;
- length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
+ length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
value = ((value) + (((pc) + (2))));
fields->f_lab_5_3 = value;
}
extract_insn_normal,
};
-int m32c_cgen_get_int_operand
- PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
-bfd_vma m32c_cgen_get_vma_operand
- PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
+int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
/* Getting values from cgen_fields is handled by a collection of functions.
They are distinguished by the type of the VALUE argument they return.
not appropriate. */
int
-m32c_cgen_get_int_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- const CGEN_FIELDS * fields;
+m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
{
int value;
case M32C_OPERAND_DSP_8_U16 :
value = fields->f_dsp_8_u16;
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ value = fields->f_dsp_8_u24;
+ break;
case M32C_OPERAND_DSP_8_U6 :
value = fields->f_dsp_8_u6;
break;
}
bfd_vma
-m32c_cgen_get_vma_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- const CGEN_FIELDS * fields;
+m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
{
bfd_vma value;
case M32C_OPERAND_DSP_8_U16 :
value = fields->f_dsp_8_u16;
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ value = fields->f_dsp_8_u24;
+ break;
case M32C_OPERAND_DSP_8_U6 :
value = fields->f_dsp_8_u6;
break;
return value;
}
-void m32c_cgen_set_int_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int));
-void m32c_cgen_set_vma_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma));
+void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
+void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
/* Stuffing values in cgen_fields is handled by a collection of functions.
They are distinguished by the type of the VALUE argument they accept.
not appropriate. */
void
-m32c_cgen_set_int_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- CGEN_FIELDS * fields;
- int value;
+m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ int value)
{
switch (opindex)
{
case M32C_OPERAND_DSP_8_U16 :
fields->f_dsp_8_u16 = value;
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ fields->f_dsp_8_u24 = value;
+ break;
case M32C_OPERAND_DSP_8_U6 :
fields->f_dsp_8_u6 = value;
break;
}
void
-m32c_cgen_set_vma_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- CGEN_FIELDS * fields;
- bfd_vma value;
+m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ bfd_vma value)
{
switch (opindex)
{
case M32C_OPERAND_DSP_8_U16 :
fields->f_dsp_8_u16 = value;
break;
+ case M32C_OPERAND_DSP_8_U24 :
+ fields->f_dsp_8_u24 = value;
+ break;
case M32C_OPERAND_DSP_8_U6 :
fields->f_dsp_8_u6 = value;
break;
/* Function to call before using the instruction builder tables. */
void
-m32c_cgen_init_ibld_table (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
{
cd->insert_handlers = & m32c_cgen_insert_handlers[0];
cd->extract_handlers = & m32c_cgen_extract_handlers[0];
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