+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
- Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
- Free Software Foundation, Inc.
+ Copyright (C) 1996-2020 Free Software Foundation, Inc.
- This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of libopcodes.
- This program is free software; you can redistribute it and/or modify
+ This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
+ the Free Software Foundation; either version 3, or (at your option)
any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "bfd.h"
#include "symcat.h"
#include "libiberty.h"
/* -- disassembler routines inserted here. */
/* -- dis.c */
-/* Immediate values are prefixed with '#'. */
-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
- do \
- { \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
- (*info->fprintf_func) (info->stream, "#"); \
- } \
- while (0)
+/* Print signed operands with '#' prefixes. */
+
+static void
+print_signed_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ (*info->fprintf_func) (info->stream, "#");
+ (*info->fprintf_func) (info->stream, "%ld", value);
+}
+
+/* Print unsigned operands with '#' prefixes. */
+
+static void
+print_unsigned_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ (*info->fprintf_func) (info->stream, "#");
+ (*info->fprintf_func) (info->stream, "0x%lx", value);
+}
/* Handle '#' prefixes as operands. */
/* Read the base part of the insn. */
status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0),
- buf, buflen, info);
+ buf, buflen, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
print_normal (cd, info, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
break;
case M32R_OPERAND_IMM1 :
- print_normal (cd, info, fields->f_imm1, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_imm1, 0, pc, length);
break;
case M32R_OPERAND_SCR :
print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r2, 0);
break;
case M32R_OPERAND_SIMM16 :
- print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_signed_with_hash_prefix (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32R_OPERAND_SIMM8 :
- print_normal (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_signed_with_hash_prefix (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
break;
case M32R_OPERAND_SLO16 :
print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r2, 0);
break;
case M32R_OPERAND_UIMM16 :
- print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_uimm16, 0, pc, length);
break;
case M32R_OPERAND_UIMM24 :
- print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
+ print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
case M32R_OPERAND_UIMM3 :
- print_normal (cd, info, fields->f_uimm3, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_uimm3, 0, pc, length);
break;
case M32R_OPERAND_UIMM4 :
- print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_uimm4, 0, pc, length);
break;
case M32R_OPERAND_UIMM5 :
- print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_uimm5, 0, pc, length);
break;
case M32R_OPERAND_UIMM8 :
- print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ print_unsigned_with_hash_prefix (cd, info, fields->f_uimm8, 0, pc, length);
break;
case M32R_OPERAND_ULO16 :
print_normal (cd, info, fields->f_uimm16, 0, pc, length);
default :
/* xgettext:c-format */
- fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
- opindex);
- abort ();
+ opcodes_error_handler
+ (_("internal error: unrecognized field %d while printing insn"),
+ opindex);
+ abort ();
}
}
-cgen_print_fn * const m32r_cgen_print_handlers[] =
+cgen_print_fn * const m32r_cgen_print_handlers[] =
{
print_insn_normal,
};
{
disassemble_info *info = (disassemble_info *) dis_info;
-#ifdef CGEN_PRINT_NORMAL
- CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
-#endif
-
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* nothing to do */
{
disassemble_info *info = (disassemble_info *) dis_info;
-#ifdef CGEN_PRINT_ADDRESS
- CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
-#endif
-
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
; /* Nothing to do. */
/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
basesize = cd->base_insn_bitsize < buflen * 8 ?
cd->base_insn_bitsize : buflen * 8;
- insn_value = cgen_get_insn_value (cd, buf, basesize);
+ insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
/* Fill in ex_info fields like read_insn would. Don't actually call
int length;
unsigned long insn_value_cropped;
-#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
/* Not needed as insn shouldn't be in hash lists if not supported. */
/* Supported by this cpu? */
if (! m32r_cgen_insn_supported (cd, insn))
relevant part from the buffer. */
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
- insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
+ insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
info->endian == BFD_ENDIAN_BIG);
else
insn_value_cropped = insn_value;
CGEN_BITSET *isa;
int mach;
int endian;
+ int insn_endian;
CGEN_CPU_DESC cd;
} cpu_desc_list;
static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
+ static int prev_insn_endian;
int length;
CGEN_BITSET *isa;
int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
+ int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
+ ? CGEN_ENDIAN_BIG
+ : CGEN_ENDIAN_LITTLE);
enum bfd_architecture arch;
/* ??? gdb will set mach but leave the architecture as "unknown" */
arch = info->arch;
if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH;
-
+
/* There's no standard way to compute the machine or isa number
so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
}
#else
- isa = info->insn_sets;
+ isa = info->private_data;
#endif
/* If we've switched cpu's, try to find a handle we've used before */
break;
}
}
- }
+ }
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
+ prev_insn_endian = insn_endian;
cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, prev_endian,
+ CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
CGEN_CPU_OPEN_END);
if (!cd)
abort ();
projects / deliverable / binutils-gdb.git / blobdiff