gdb: add target_ops::supports_displaced_step

[deliverable/binutils-gdb.git] / opcodes / rl78-dis.c

diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index 25d0baf12be83a4151aebe8575c9117dbb2f17ec..ef7d9490169e23d3673f5af99714014048488c43 100644 (file)
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -1,5 +1,5 @@
 /* Disassembler code for Renesas RL78.
-   Copyright (C) 2011-2015 Free Software Foundation, Inc.
+   Copyright (C) 2011-2020 Free Software Foundation, Inc.
    Contributed by Red Hat.
    Written by DJ Delorie.
 
@@ -25,10 +25,12 @@
 
 #include "bfd.h"
 #include "elf-bfd.h"
-#include "dis-asm.h"
+#include "disassemble.h"
 #include "opcode/rl78.h"
 #include "elf/rl78.h"
 
+#include <setjmp.h>
+
 #define DEBUG_SEMANTICS 0
 
 typedef struct
@@ -37,16 +39,30 @@ typedef struct
   disassemble_info * dis;
 } RL78_Data;
 
+struct private
+{
+  OPCODES_SIGJMP_BUF bailout;
+};
+
 static int
 rl78_get_byte (void * vdata)
 {
   bfd_byte buf[1];
   RL78_Data *rl78_data = (RL78_Data *) vdata;
+  int status;
 
-  rl78_data->dis->read_memory_func (rl78_data->pc,
-                                 buf,
-                                 1,
-                                 rl78_data->dis);
+  status = rl78_data->dis->read_memory_func (rl78_data->pc,
+                                            buf,
+                                            1,
+                                            rl78_data->dis);
+  if (status != 0)
+    {
+      struct private *priv = (struct private *) rl78_data->dis->private_data;
+
+      rl78_data->dis->memory_error_func (status, rl78_data->pc,
+                                        rl78_data->dis);
+      OPCODES_SIGLONGJMP (priv->bailout, 1);
+    }
 
   rl78_data->pc ++;
   return buf[0];
@@ -92,10 +108,18 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
 #if DEBUG_SEMANTICS
   static char buf[200];
 #endif
+  struct private priv;
 
+  dis->private_data = (PTR) &priv;
   rl78_data.pc = addr;
   rl78_data.dis = dis;
 
+  if (OPCODES_SIGSETJMP (priv.bailout) != 0)
+    {
+      /* Error return.  */
+      return -1;
+    }
+
   rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data, isa);
 
   dis->bytes_per_line = 10;
@@ -204,7 +228,7 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
                {
                  char *comma = "";
                  PR (PS, "  \033[35m");
-             
+
                  if (opcode.flags & RL78_PSW_Z)
                    { PR (PS, "Z"); comma = ","; }
                  if (opcode.flags & RL78_PSW_AC)
@@ -227,7 +251,18 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
              }
 
            if (do_bang)
-             PC ('!');
+             {
+               /* If we are going to display SP by name, we must omit the bang.  */
+               if ((oper->type == RL78_Operand_Indirect
+                    || oper->type == RL78_Operand_BitIndirect)
+                   && oper->reg == RL78_Reg_None
+                   && do_sfr
+                   && ((oper->addend == 0xffff8 && opcode.size == RL78_Word)
+                       || (oper->addend == 0x0fff8 && do_es && opcode.size == RL78_Word)))
+                 ;
+               else
+                 PC ('!');
+             }
 
            if (do_cond)
              {
@@ -265,6 +300,20 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
                      PR (PS, "psw");
                    else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word)
                      PR (PS, "sp");
+                   else if (oper->addend == 0x0fff8 && do_sfr && do_es && opcode.size == RL78_Word)
+                     PR (PS, "sp");
+                    else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "spl");
+                    else if (oper->addend == 0xffff9 && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "sph");
+                    else if (oper->addend == 0xffffc && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "cs");
+                    else if (oper->addend == 0xffffd && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "es");
+                    else if (oper->addend == 0xffffe && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "pmc");
+                    else if (oper->addend == 0xfffff && do_sfr && opcode.size == RL78_Byte)
+                      PR (PS, "mem");
                    else if (oper->addend >= 0xffe20)
                      PR (PS, "%#x", oper->addend);
                    else
@@ -290,7 +339,7 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
                      PR (PS, "+%d", oper->addend);
                    PC (']');
                    break;
-                     
+
                  }
                if (oper->type == RL78_Operand_BitIndirect)
                  PR (PS, ".%d", oper->bit_number);
@@ -357,7 +406,11 @@ print_insn_rl78_g14 (bfd_vma addr, disassemble_info * dis)
 disassembler_ftype
 rl78_get_disassembler (bfd *abfd)
 {
-  int cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
+  int cpu = E_FLAG_RL78_ANY_CPU;
+
+  if (abfd != NULL)
+    cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
+
   switch (cpu)
     {
     case E_FLAG_RL78_G10: